2019-05-27 06:55:01 +00:00
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// SPDX-License-Identifier: GPL-2.0-or-later
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2017-01-22 14:23:48 +00:00
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/*
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* DRM driver for Multi-Inno MI0283QT panels
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*
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* Copyright 2016 Noralf Trønnes
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*/
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2018-01-24 16:36:09 +00:00
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#include <linux/backlight.h>
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2017-01-22 14:23:48 +00:00
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#include <linux/delay.h>
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#include <linux/gpio/consumer.h>
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#include <linux/module.h>
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#include <linux/property.h>
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#include <linux/regulator/consumer.h>
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#include <linux/spi/spi.h>
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2018-01-10 18:59:34 +00:00
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2019-02-10 13:10:33 +00:00
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#include <drm/drm_atomic_helper.h>
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2019-01-08 19:29:38 +00:00
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#include <drm/drm_drv.h>
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2019-02-25 14:42:30 +00:00
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#include <drm/drm_fb_helper.h>
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2018-11-10 14:56:47 +00:00
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#include <drm/drm_gem_cma_helper.h>
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2018-04-05 15:44:42 +00:00
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#include <drm/drm_gem_framebuffer_helper.h>
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2020-03-23 14:49:04 +00:00
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#include <drm/drm_managed.h>
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2019-07-22 10:43:11 +00:00
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#include <drm/drm_mipi_dbi.h>
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2018-11-10 14:56:47 +00:00
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#include <drm/drm_modeset_helper.h>
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2017-01-22 14:23:48 +00:00
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#include <video/mipi_display.h>
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2018-01-10 18:59:35 +00:00
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#define ILI9341_FRMCTR1 0xb1
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#define ILI9341_DISCTRL 0xb6
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#define ILI9341_ETMOD 0xb7
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#define ILI9341_PWCTRL1 0xc0
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#define ILI9341_PWCTRL2 0xc1
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#define ILI9341_VMCTRL1 0xc5
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#define ILI9341_VMCTRL2 0xc7
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#define ILI9341_PWCTRLA 0xcb
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#define ILI9341_PWCTRLB 0xcf
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#define ILI9341_PGAMCTRL 0xe0
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#define ILI9341_NGAMCTRL 0xe1
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#define ILI9341_DTCTRLA 0xe8
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#define ILI9341_DTCTRLB 0xea
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#define ILI9341_PWRSEQ 0xed
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#define ILI9341_EN3GAM 0xf2
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#define ILI9341_PUMPCTRL 0xf7
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#define ILI9341_MADCTL_BGR BIT(3)
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#define ILI9341_MADCTL_MV BIT(5)
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#define ILI9341_MADCTL_MX BIT(6)
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#define ILI9341_MADCTL_MY BIT(7)
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2018-01-10 18:59:38 +00:00
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static void mi0283qt_enable(struct drm_simple_display_pipe *pipe,
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2018-03-22 20:27:37 +00:00
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struct drm_crtc_state *crtc_state,
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struct drm_plane_state *plane_state)
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2017-01-22 14:23:48 +00:00
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{
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2019-07-22 10:43:07 +00:00
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struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(pipe->crtc.dev);
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struct mipi_dbi *dbi = &dbidev->dbi;
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2017-01-22 14:23:48 +00:00
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u8 addr_mode;
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2019-02-25 14:42:32 +00:00
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int ret, idx;
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if (!drm_dev_enter(pipe->crtc.dev, &idx))
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return;
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2017-01-22 14:23:48 +00:00
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DRM_DEBUG_KMS("\n");
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2019-07-22 10:43:06 +00:00
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ret = mipi_dbi_poweron_conditional_reset(dbidev);
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2018-01-10 18:59:37 +00:00
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if (ret < 0)
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2019-02-25 14:42:32 +00:00
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goto out_exit;
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2018-01-10 18:59:37 +00:00
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if (ret == 1)
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2018-01-10 18:59:38 +00:00
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goto out_enable;
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2017-01-22 14:23:48 +00:00
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2019-07-22 10:43:05 +00:00
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mipi_dbi_command(dbi, MIPI_DCS_SET_DISPLAY_OFF);
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2017-01-22 14:23:48 +00:00
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2019-07-22 10:43:05 +00:00
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mipi_dbi_command(dbi, ILI9341_PWCTRLB, 0x00, 0x83, 0x30);
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mipi_dbi_command(dbi, ILI9341_PWRSEQ, 0x64, 0x03, 0x12, 0x81);
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mipi_dbi_command(dbi, ILI9341_DTCTRLA, 0x85, 0x01, 0x79);
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mipi_dbi_command(dbi, ILI9341_PWCTRLA, 0x39, 0x2c, 0x00, 0x34, 0x02);
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mipi_dbi_command(dbi, ILI9341_PUMPCTRL, 0x20);
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mipi_dbi_command(dbi, ILI9341_DTCTRLB, 0x00, 0x00);
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2017-01-22 14:23:48 +00:00
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/* Power Control */
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2019-07-22 10:43:05 +00:00
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mipi_dbi_command(dbi, ILI9341_PWCTRL1, 0x26);
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mipi_dbi_command(dbi, ILI9341_PWCTRL2, 0x11);
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2017-01-22 14:23:48 +00:00
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/* VCOM */
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2019-07-22 10:43:05 +00:00
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mipi_dbi_command(dbi, ILI9341_VMCTRL1, 0x35, 0x3e);
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mipi_dbi_command(dbi, ILI9341_VMCTRL2, 0xbe);
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2017-01-22 14:23:48 +00:00
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/* Memory Access Control */
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2019-07-22 10:43:05 +00:00
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mipi_dbi_command(dbi, MIPI_DCS_SET_PIXEL_FORMAT, MIPI_DCS_PIXEL_FMT_16BIT);
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2017-01-22 14:23:48 +00:00
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/* Frame Rate */
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2019-07-22 10:43:05 +00:00
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mipi_dbi_command(dbi, ILI9341_FRMCTR1, 0x00, 0x1b);
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2017-01-22 14:23:48 +00:00
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/* Gamma */
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2019-07-22 10:43:05 +00:00
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mipi_dbi_command(dbi, ILI9341_EN3GAM, 0x08);
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mipi_dbi_command(dbi, MIPI_DCS_SET_GAMMA_CURVE, 0x01);
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mipi_dbi_command(dbi, ILI9341_PGAMCTRL,
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2017-01-22 14:23:48 +00:00
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0x1f, 0x1a, 0x18, 0x0a, 0x0f, 0x06, 0x45, 0x87,
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0x32, 0x0a, 0x07, 0x02, 0x07, 0x05, 0x00);
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2019-07-22 10:43:05 +00:00
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mipi_dbi_command(dbi, ILI9341_NGAMCTRL,
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2017-01-22 14:23:48 +00:00
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0x00, 0x25, 0x27, 0x05, 0x10, 0x09, 0x3a, 0x78,
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0x4d, 0x05, 0x18, 0x0d, 0x38, 0x3a, 0x1f);
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/* DDRAM */
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2019-07-22 10:43:05 +00:00
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mipi_dbi_command(dbi, ILI9341_ETMOD, 0x07);
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2017-01-22 14:23:48 +00:00
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/* Display */
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2019-07-22 10:43:05 +00:00
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mipi_dbi_command(dbi, ILI9341_DISCTRL, 0x0a, 0x82, 0x27, 0x00);
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mipi_dbi_command(dbi, MIPI_DCS_EXIT_SLEEP_MODE);
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2017-01-22 14:23:48 +00:00
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msleep(100);
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2019-07-22 10:43:05 +00:00
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mipi_dbi_command(dbi, MIPI_DCS_SET_DISPLAY_ON);
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2017-01-22 14:23:48 +00:00
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msleep(100);
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2018-01-10 18:59:38 +00:00
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out_enable:
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2018-04-23 16:16:39 +00:00
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/* The PiTFT (ili9340) has a hardware reset circuit that
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* resets only on power-on and not on each reboot through
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* a gpio like the rpi-display does.
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* As a result, we need to always apply the rotation value
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* regardless of the display "on/off" state.
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*/
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2019-07-22 10:43:06 +00:00
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switch (dbidev->rotation) {
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2018-04-23 16:16:39 +00:00
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default:
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addr_mode = ILI9341_MADCTL_MV | ILI9341_MADCTL_MY |
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ILI9341_MADCTL_MX;
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break;
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case 90:
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addr_mode = ILI9341_MADCTL_MY;
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break;
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case 180:
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addr_mode = ILI9341_MADCTL_MV;
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break;
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case 270:
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addr_mode = ILI9341_MADCTL_MX;
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break;
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}
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addr_mode |= ILI9341_MADCTL_BGR;
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2019-07-22 10:43:05 +00:00
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mipi_dbi_command(dbi, MIPI_DCS_SET_ADDRESS_MODE, addr_mode);
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2019-07-22 10:43:06 +00:00
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mipi_dbi_enable_flush(dbidev, crtc_state, plane_state);
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2019-02-25 14:42:32 +00:00
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out_exit:
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drm_dev_exit(idx);
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2017-01-22 14:23:48 +00:00
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}
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static const struct drm_simple_display_pipe_funcs mi0283qt_pipe_funcs = {
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2018-01-10 18:59:38 +00:00
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.enable = mi0283qt_enable,
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2017-01-22 14:23:48 +00:00
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.disable = mipi_dbi_pipe_disable,
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2019-01-15 04:36:42 +00:00
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.update = mipi_dbi_pipe_update,
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2018-04-05 15:44:42 +00:00
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.prepare_fb = drm_gem_fb_simple_display_pipe_prepare_fb,
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2017-01-22 14:23:48 +00:00
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};
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static const struct drm_display_mode mi0283qt_mode = {
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2019-02-10 13:10:31 +00:00
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DRM_SIMPLE_MODE(320, 240, 58, 43),
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2017-01-22 14:23:48 +00:00
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};
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2017-03-26 14:25:29 +00:00
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DEFINE_DRM_GEM_CMA_FOPS(mi0283qt_fops);
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2017-01-22 14:23:48 +00:00
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static struct drm_driver mi0283qt_driver = {
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2019-06-17 15:39:24 +00:00
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.driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC,
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2017-03-26 14:25:29 +00:00
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.fops = &mi0283qt_fops,
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2020-06-05 07:32:06 +00:00
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DRM_GEM_CMA_DRIVER_OPS_VMAP,
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2017-01-22 14:23:48 +00:00
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.debugfs_init = mipi_dbi_debugfs_init,
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.name = "mi0283qt",
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.desc = "Multi-Inno MI0283QT",
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.date = "20160614",
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.major = 1,
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.minor = 0,
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};
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static const struct of_device_id mi0283qt_of_match[] = {
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{ .compatible = "multi-inno,mi0283qt" },
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{},
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};
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MODULE_DEVICE_TABLE(of, mi0283qt_of_match);
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static const struct spi_device_id mi0283qt_id[] = {
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{ "mi0283qt", 0 },
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{ },
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};
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MODULE_DEVICE_TABLE(spi, mi0283qt_id);
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static int mi0283qt_probe(struct spi_device *spi)
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{
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struct device *dev = &spi->dev;
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2019-07-22 10:43:07 +00:00
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struct mipi_dbi_dev *dbidev;
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2019-02-25 14:42:30 +00:00
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struct drm_device *drm;
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2019-07-22 10:43:05 +00:00
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struct mipi_dbi *dbi;
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2017-01-22 14:23:48 +00:00
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struct gpio_desc *dc;
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u32 rotation = 0;
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int ret;
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2020-04-15 07:39:51 +00:00
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dbidev = devm_drm_dev_alloc(dev, &mi0283qt_driver,
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struct mipi_dbi_dev, drm);
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if (IS_ERR(dbidev))
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return PTR_ERR(dbidev);
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2017-01-22 14:23:48 +00:00
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2019-07-22 10:43:07 +00:00
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dbi = &dbidev->dbi;
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2019-07-22 10:43:06 +00:00
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drm = &dbidev->drm;
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2019-02-25 14:42:30 +00:00
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2019-07-22 10:43:05 +00:00
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dbi->reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH);
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if (IS_ERR(dbi->reset)) {
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2017-10-06 22:17:38 +00:00
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DRM_DEV_ERROR(dev, "Failed to get gpio 'reset'\n");
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2019-07-22 10:43:05 +00:00
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return PTR_ERR(dbi->reset);
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2017-01-22 14:23:48 +00:00
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}
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dc = devm_gpiod_get_optional(dev, "dc", GPIOD_OUT_LOW);
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if (IS_ERR(dc)) {
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2017-10-06 22:17:38 +00:00
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DRM_DEV_ERROR(dev, "Failed to get gpio 'dc'\n");
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2017-01-22 14:23:48 +00:00
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return PTR_ERR(dc);
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}
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2019-07-22 10:43:06 +00:00
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dbidev->regulator = devm_regulator_get(dev, "power");
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if (IS_ERR(dbidev->regulator))
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return PTR_ERR(dbidev->regulator);
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2017-01-22 14:23:48 +00:00
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2019-07-22 10:43:06 +00:00
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dbidev->backlight = devm_of_find_backlight(dev);
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if (IS_ERR(dbidev->backlight))
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return PTR_ERR(dbidev->backlight);
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2017-01-22 14:23:48 +00:00
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device_property_read_u32(dev, "rotation", &rotation);
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2019-07-22 10:43:05 +00:00
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ret = mipi_dbi_spi_init(spi, dbi, dc);
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2017-08-03 22:33:45 +00:00
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if (ret)
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return ret;
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2019-07-22 10:43:07 +00:00
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ret = mipi_dbi_dev_init(dbidev, &mi0283qt_pipe_funcs, &mi0283qt_mode, rotation);
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2019-02-25 14:42:30 +00:00
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if (ret)
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return ret;
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drm_mode_config_reset(drm);
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ret = drm_dev_register(drm, 0);
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2017-01-22 14:23:48 +00:00
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if (ret)
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return ret;
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2019-02-25 14:42:30 +00:00
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spi_set_drvdata(spi, drm);
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2017-01-22 14:23:48 +00:00
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2019-04-10 12:43:45 +00:00
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drm_fbdev_generic_setup(drm, 0);
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2019-02-25 14:42:30 +00:00
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return 0;
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}
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static int mi0283qt_remove(struct spi_device *spi)
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{
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struct drm_device *drm = spi_get_drvdata(spi);
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drm_dev_unplug(drm);
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drm_atomic_helper_shutdown(drm);
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return 0;
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2017-01-22 14:23:48 +00:00
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}
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static void mi0283qt_shutdown(struct spi_device *spi)
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{
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2019-02-10 13:10:33 +00:00
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drm_atomic_helper_shutdown(spi_get_drvdata(spi));
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2017-01-22 14:23:48 +00:00
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}
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static int __maybe_unused mi0283qt_pm_suspend(struct device *dev)
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{
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2019-02-10 13:10:33 +00:00
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return drm_mode_config_helper_suspend(dev_get_drvdata(dev));
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2017-01-22 14:23:48 +00:00
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}
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static int __maybe_unused mi0283qt_pm_resume(struct device *dev)
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{
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2019-02-10 13:10:33 +00:00
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drm_mode_config_helper_resume(dev_get_drvdata(dev));
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2017-11-06 19:18:11 +00:00
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return 0;
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2017-01-22 14:23:48 +00:00
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}
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static const struct dev_pm_ops mi0283qt_pm_ops = {
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SET_SYSTEM_SLEEP_PM_OPS(mi0283qt_pm_suspend, mi0283qt_pm_resume)
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};
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static struct spi_driver mi0283qt_spi_driver = {
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.driver = {
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.name = "mi0283qt",
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.owner = THIS_MODULE,
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.of_match_table = mi0283qt_of_match,
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.pm = &mi0283qt_pm_ops,
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},
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.id_table = mi0283qt_id,
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.probe = mi0283qt_probe,
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2019-02-25 14:42:30 +00:00
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.remove = mi0283qt_remove,
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2017-01-22 14:23:48 +00:00
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.shutdown = mi0283qt_shutdown,
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};
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module_spi_driver(mi0283qt_spi_driver);
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MODULE_DESCRIPTION("Multi-Inno MI0283QT DRM driver");
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MODULE_AUTHOR("Noralf Trønnes");
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MODULE_LICENSE("GPL");
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