2019-06-04 08:11:33 +00:00
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// SPDX-License-Identifier: GPL-2.0-only
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2015-06-18 13:46:20 +00:00
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/*
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* Support for Marvell's Cryptographic Engine and Security Accelerator (CESA)
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* that can be found on the following platform: Orion, Kirkwood, Armada. This
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* driver supports the TDMA engine on platforms on which it is available.
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*
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* Author: Boris Brezillon <boris.brezillon@free-electrons.com>
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* Author: Arnaud Ebalard <arno@natisbad.org>
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*
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* This work is based on an initial version written by
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* Sebastian Andrzej Siewior < sebastian at breakpoint dot cc >
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*/
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#include <linux/delay.h>
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2018-01-10 15:15:43 +00:00
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#include <linux/dma-mapping.h>
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2015-06-18 13:46:20 +00:00
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#include <linux/genalloc.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/kthread.h>
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#include <linux/mbus.h>
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#include <linux/platform_device.h>
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#include <linux/scatterlist.h>
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#include <linux/slab.h>
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#include <linux/module.h>
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#include <linux/clk.h>
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#include <linux/of.h>
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#include <linux/of_platform.h>
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#include <linux/of_irq.h>
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#include "cesa.h"
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2016-06-21 08:08:31 +00:00
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/* Limit of the crypto queue before reaching the backlog */
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2016-06-21 08:08:40 +00:00
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#define CESA_CRYPTO_DEFAULT_MAX_QLEN 128
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2016-06-21 08:08:31 +00:00
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2015-06-18 13:46:20 +00:00
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struct mv_cesa_dev *cesa_dev;
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2016-06-21 08:08:39 +00:00
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struct crypto_async_request *
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mv_cesa_dequeue_req_locked(struct mv_cesa_engine *engine,
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struct crypto_async_request **backlog)
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2015-06-18 13:46:20 +00:00
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{
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2016-06-21 08:08:39 +00:00
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struct crypto_async_request *req;
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2015-06-18 13:46:20 +00:00
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2016-06-21 08:08:39 +00:00
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*backlog = crypto_get_backlog(&engine->queue);
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2016-06-21 08:08:38 +00:00
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req = crypto_dequeue_request(&engine->queue);
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2016-06-21 08:08:39 +00:00
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if (!req)
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return NULL;
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return req;
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}
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static void mv_cesa_rearm_engine(struct mv_cesa_engine *engine)
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{
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struct crypto_async_request *req = NULL, *backlog = NULL;
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struct mv_cesa_ctx *ctx;
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spin_lock_bh(&engine->lock);
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if (!engine->req) {
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req = mv_cesa_dequeue_req_locked(engine, &backlog);
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engine->req = req;
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}
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spin_unlock_bh(&engine->lock);
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2015-06-18 13:46:20 +00:00
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if (!req)
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return;
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if (backlog)
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2023-01-31 08:02:33 +00:00
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crypto_request_complete(backlog, -EINPROGRESS);
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2015-06-18 13:46:20 +00:00
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ctx = crypto_tfm_ctx(req->tfm);
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ctx->ops->step(req);
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2016-06-21 08:08:39 +00:00
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}
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static int mv_cesa_std_process(struct mv_cesa_engine *engine, u32 status)
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{
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struct crypto_async_request *req;
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struct mv_cesa_ctx *ctx;
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int res;
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req = engine->req;
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ctx = crypto_tfm_ctx(req->tfm);
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res = ctx->ops->process(req, status);
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if (res == 0) {
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ctx->ops->complete(req);
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mv_cesa_engine_enqueue_complete_request(engine, req);
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} else if (res == -EINPROGRESS) {
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ctx->ops->step(req);
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}
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return res;
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}
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static int mv_cesa_int_process(struct mv_cesa_engine *engine, u32 status)
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{
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if (engine->chain.first && engine->chain.last)
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return mv_cesa_tdma_process(engine, status);
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return mv_cesa_std_process(engine, status);
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}
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static inline void
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mv_cesa_complete_req(struct mv_cesa_ctx *ctx, struct crypto_async_request *req,
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int res)
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{
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ctx->ops->cleanup(req);
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local_bh_disable();
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2023-01-31 08:02:33 +00:00
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crypto_request_complete(req, res);
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2016-06-21 08:08:39 +00:00
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local_bh_enable();
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2015-06-18 13:46:20 +00:00
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}
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static irqreturn_t mv_cesa_int(int irq, void *priv)
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{
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struct mv_cesa_engine *engine = priv;
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struct crypto_async_request *req;
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struct mv_cesa_ctx *ctx;
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u32 status, mask;
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irqreturn_t ret = IRQ_NONE;
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while (true) {
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int res;
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mask = mv_cesa_get_int_mask(engine);
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status = readl(engine->regs + CESA_SA_INT_STATUS);
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if (!(status & mask))
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break;
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/*
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* TODO: avoid clearing the FPGA_INT_STATUS if this not
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* relevant on some platforms.
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*/
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writel(~status, engine->regs + CESA_SA_FPGA_INT_STATUS);
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writel(~status, engine->regs + CESA_SA_INT_STATUS);
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2016-06-21 08:08:39 +00:00
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/* Process fetched requests */
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res = mv_cesa_int_process(engine, status & mask);
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2015-06-18 13:46:20 +00:00
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ret = IRQ_HANDLED;
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2016-06-21 08:08:39 +00:00
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2015-06-18 13:46:20 +00:00
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spin_lock_bh(&engine->lock);
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req = engine->req;
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2016-06-21 08:08:39 +00:00
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if (res != -EINPROGRESS)
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engine->req = NULL;
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2015-06-18 13:46:20 +00:00
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spin_unlock_bh(&engine->lock);
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2016-06-21 08:08:39 +00:00
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ctx = crypto_tfm_ctx(req->tfm);
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if (res && res != -EINPROGRESS)
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mv_cesa_complete_req(ctx, req, res);
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/* Launch the next pending request */
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mv_cesa_rearm_engine(engine);
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/* Iterate over the complete queue */
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while (true) {
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req = mv_cesa_engine_dequeue_complete_request(engine);
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if (!req)
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break;
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2016-08-09 09:03:18 +00:00
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ctx = crypto_tfm_ctx(req->tfm);
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2016-06-21 08:08:39 +00:00
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mv_cesa_complete_req(ctx, req, 0);
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2015-06-18 13:46:20 +00:00
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}
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}
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return ret;
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}
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2016-06-21 08:08:35 +00:00
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int mv_cesa_queue_req(struct crypto_async_request *req,
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struct mv_cesa_req *creq)
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2015-06-18 13:46:20 +00:00
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{
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int ret;
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2016-06-21 08:08:38 +00:00
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struct mv_cesa_engine *engine = creq->engine;
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2015-06-18 13:46:20 +00:00
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2016-06-21 08:08:38 +00:00
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spin_lock_bh(&engine->lock);
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ret = crypto_enqueue_request(&engine->queue, req);
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2016-07-22 12:40:55 +00:00
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if ((mv_cesa_req_get_type(creq) == CESA_DMA_REQ) &&
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2017-10-18 07:00:37 +00:00
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(ret == -EINPROGRESS || ret == -EBUSY))
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2016-07-22 12:40:55 +00:00
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mv_cesa_tdma_chain(engine, creq);
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2016-06-21 08:08:38 +00:00
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spin_unlock_bh(&engine->lock);
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2015-06-18 13:46:20 +00:00
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if (ret != -EINPROGRESS)
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return ret;
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2016-06-21 08:08:39 +00:00
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mv_cesa_rearm_engine(engine);
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2015-06-18 13:46:20 +00:00
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return -EINPROGRESS;
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}
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static int mv_cesa_add_algs(struct mv_cesa_dev *cesa)
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{
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int ret;
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int i, j;
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for (i = 0; i < cesa->caps->ncipher_algs; i++) {
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2017-10-13 13:30:32 +00:00
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ret = crypto_register_skcipher(cesa->caps->cipher_algs[i]);
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2015-06-18 13:46:20 +00:00
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if (ret)
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goto err_unregister_crypto;
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}
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for (i = 0; i < cesa->caps->nahash_algs; i++) {
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ret = crypto_register_ahash(cesa->caps->ahash_algs[i]);
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if (ret)
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goto err_unregister_ahash;
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}
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return 0;
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err_unregister_ahash:
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for (j = 0; j < i; j++)
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crypto_unregister_ahash(cesa->caps->ahash_algs[j]);
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i = cesa->caps->ncipher_algs;
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err_unregister_crypto:
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for (j = 0; j < i; j++)
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2017-10-13 13:30:32 +00:00
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crypto_unregister_skcipher(cesa->caps->cipher_algs[j]);
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2015-06-18 13:46:20 +00:00
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return ret;
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}
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static void mv_cesa_remove_algs(struct mv_cesa_dev *cesa)
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{
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int i;
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for (i = 0; i < cesa->caps->nahash_algs; i++)
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crypto_unregister_ahash(cesa->caps->ahash_algs[i]);
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for (i = 0; i < cesa->caps->ncipher_algs; i++)
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2017-10-13 13:30:32 +00:00
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crypto_unregister_skcipher(cesa->caps->cipher_algs[i]);
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2015-06-18 13:46:20 +00:00
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}
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2017-10-13 13:30:32 +00:00
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static struct skcipher_alg *orion_cipher_algs[] = {
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2015-06-18 13:46:28 +00:00
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&mv_cesa_ecb_des_alg,
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&mv_cesa_cbc_des_alg,
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&mv_cesa_ecb_des3_ede_alg,
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&mv_cesa_cbc_des3_ede_alg,
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&mv_cesa_ecb_aes_alg,
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&mv_cesa_cbc_aes_alg,
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};
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static struct ahash_alg *orion_ahash_algs[] = {
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&mv_md5_alg,
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&mv_sha1_alg,
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&mv_ahmac_md5_alg,
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&mv_ahmac_sha1_alg,
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};
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2017-10-13 13:30:32 +00:00
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static struct skcipher_alg *armada_370_cipher_algs[] = {
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2015-06-18 13:46:22 +00:00
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&mv_cesa_ecb_des_alg,
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&mv_cesa_cbc_des_alg,
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2015-06-18 13:46:23 +00:00
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&mv_cesa_ecb_des3_ede_alg,
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&mv_cesa_cbc_des3_ede_alg,
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2015-06-18 13:46:20 +00:00
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&mv_cesa_ecb_aes_alg,
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&mv_cesa_cbc_aes_alg,
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};
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static struct ahash_alg *armada_370_ahash_algs[] = {
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2015-06-18 13:46:24 +00:00
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&mv_md5_alg,
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2015-06-18 13:46:20 +00:00
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&mv_sha1_alg,
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2015-06-18 13:46:25 +00:00
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&mv_sha256_alg,
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2015-06-18 13:46:24 +00:00
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&mv_ahmac_md5_alg,
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2015-06-18 13:46:20 +00:00
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&mv_ahmac_sha1_alg,
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2015-06-18 13:46:25 +00:00
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&mv_ahmac_sha256_alg,
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2015-06-18 13:46:20 +00:00
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};
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2015-06-18 13:46:28 +00:00
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static const struct mv_cesa_caps orion_caps = {
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.nengines = 1,
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.cipher_algs = orion_cipher_algs,
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.ncipher_algs = ARRAY_SIZE(orion_cipher_algs),
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.ahash_algs = orion_ahash_algs,
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.nahash_algs = ARRAY_SIZE(orion_ahash_algs),
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.has_tdma = false,
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};
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2015-06-18 13:46:29 +00:00
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static const struct mv_cesa_caps kirkwood_caps = {
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.nengines = 1,
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.cipher_algs = orion_cipher_algs,
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.ncipher_algs = ARRAY_SIZE(orion_cipher_algs),
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.ahash_algs = orion_ahash_algs,
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.nahash_algs = ARRAY_SIZE(orion_ahash_algs),
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.has_tdma = true,
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};
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2015-06-18 13:46:20 +00:00
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static const struct mv_cesa_caps armada_370_caps = {
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.nengines = 1,
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.cipher_algs = armada_370_cipher_algs,
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.ncipher_algs = ARRAY_SIZE(armada_370_cipher_algs),
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.ahash_algs = armada_370_ahash_algs,
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.nahash_algs = ARRAY_SIZE(armada_370_ahash_algs),
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2015-06-18 13:46:21 +00:00
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.has_tdma = true,
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2015-06-18 13:46:20 +00:00
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};
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2015-06-18 13:46:26 +00:00
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static const struct mv_cesa_caps armada_xp_caps = {
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.nengines = 2,
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.cipher_algs = armada_370_cipher_algs,
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.ncipher_algs = ARRAY_SIZE(armada_370_cipher_algs),
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.ahash_algs = armada_370_ahash_algs,
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.nahash_algs = ARRAY_SIZE(armada_370_ahash_algs),
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.has_tdma = true,
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};
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2015-06-18 13:46:20 +00:00
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static const struct of_device_id mv_cesa_of_match_table[] = {
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2015-06-18 13:46:28 +00:00
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{ .compatible = "marvell,orion-crypto", .data = &orion_caps },
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2015-06-18 13:46:29 +00:00
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{ .compatible = "marvell,kirkwood-crypto", .data = &kirkwood_caps },
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{ .compatible = "marvell,dove-crypto", .data = &kirkwood_caps },
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2015-06-18 13:46:20 +00:00
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{ .compatible = "marvell,armada-370-crypto", .data = &armada_370_caps },
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2015-06-18 13:46:26 +00:00
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{ .compatible = "marvell,armada-xp-crypto", .data = &armada_xp_caps },
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{ .compatible = "marvell,armada-375-crypto", .data = &armada_xp_caps },
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{ .compatible = "marvell,armada-38x-crypto", .data = &armada_xp_caps },
|
2015-06-18 13:46:20 +00:00
|
|
|
{}
|
|
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE(of, mv_cesa_of_match_table);
|
|
|
|
|
2015-06-18 13:46:21 +00:00
|
|
|
static void
|
|
|
|
mv_cesa_conf_mbus_windows(struct mv_cesa_engine *engine,
|
|
|
|
const struct mbus_dram_target_info *dram)
|
|
|
|
{
|
|
|
|
void __iomem *iobase = engine->regs;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
for (i = 0; i < 4; i++) {
|
|
|
|
writel(0, iobase + CESA_TDMA_WINDOW_CTRL(i));
|
|
|
|
writel(0, iobase + CESA_TDMA_WINDOW_BASE(i));
|
|
|
|
}
|
|
|
|
|
|
|
|
for (i = 0; i < dram->num_cs; i++) {
|
|
|
|
const struct mbus_dram_window *cs = dram->cs + i;
|
|
|
|
|
|
|
|
writel(((cs->size - 1) & 0xffff0000) |
|
|
|
|
(cs->mbus_attr << 8) |
|
|
|
|
(dram->mbus_dram_target_id << 4) | 1,
|
|
|
|
iobase + CESA_TDMA_WINDOW_CTRL(i));
|
|
|
|
writel(cs->base, iobase + CESA_TDMA_WINDOW_BASE(i));
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static int mv_cesa_dev_dma_init(struct mv_cesa_dev *cesa)
|
|
|
|
{
|
|
|
|
struct device *dev = cesa->dev;
|
|
|
|
struct mv_cesa_dev_dma *dma;
|
|
|
|
|
|
|
|
if (!cesa->caps->has_tdma)
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
dma = devm_kzalloc(dev, sizeof(*dma), GFP_KERNEL);
|
|
|
|
if (!dma)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
dma->tdma_desc_pool = dmam_pool_create("tdma_desc", dev,
|
|
|
|
sizeof(struct mv_cesa_tdma_desc),
|
|
|
|
16, 0);
|
|
|
|
if (!dma->tdma_desc_pool)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
dma->op_pool = dmam_pool_create("cesa_op", dev,
|
|
|
|
sizeof(struct mv_cesa_op_ctx), 16, 0);
|
|
|
|
if (!dma->op_pool)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
dma->cache_pool = dmam_pool_create("cesa_cache", dev,
|
|
|
|
CESA_MAX_HASH_BLOCK_SIZE, 1, 0);
|
|
|
|
if (!dma->cache_pool)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
dma->padding_pool = dmam_pool_create("cesa_padding", dev, 72, 1, 0);
|
2016-02-05 16:45:48 +00:00
|
|
|
if (!dma->padding_pool)
|
2015-06-18 13:46:21 +00:00
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
cesa->dma = dma;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2015-06-18 13:46:20 +00:00
|
|
|
static int mv_cesa_get_sram(struct platform_device *pdev, int idx)
|
|
|
|
{
|
|
|
|
struct mv_cesa_dev *cesa = platform_get_drvdata(pdev);
|
|
|
|
struct mv_cesa_engine *engine = &cesa->engines[idx];
|
|
|
|
const char *res_name = "sram";
|
|
|
|
struct resource *res;
|
|
|
|
|
2015-06-30 22:00:07 +00:00
|
|
|
engine->pool = of_gen_pool_get(cesa->dev->of_node,
|
|
|
|
"marvell,crypto-srams", idx);
|
2015-06-18 13:46:20 +00:00
|
|
|
if (engine->pool) {
|
2021-01-21 05:16:46 +00:00
|
|
|
engine->sram_pool = gen_pool_dma_alloc(engine->pool,
|
|
|
|
cesa->sram_size,
|
|
|
|
&engine->sram_dma);
|
|
|
|
if (engine->sram_pool)
|
2015-06-18 13:46:20 +00:00
|
|
|
return 0;
|
|
|
|
|
|
|
|
engine->pool = NULL;
|
|
|
|
return -ENOMEM;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (cesa->caps->nengines > 1) {
|
|
|
|
if (!idx)
|
|
|
|
res_name = "sram0";
|
|
|
|
else
|
|
|
|
res_name = "sram1";
|
|
|
|
}
|
|
|
|
|
|
|
|
res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
|
|
|
|
res_name);
|
|
|
|
if (!res || resource_size(res) < cesa->sram_size)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
engine->sram = devm_ioremap_resource(cesa->dev, res);
|
|
|
|
if (IS_ERR(engine->sram))
|
|
|
|
return PTR_ERR(engine->sram);
|
|
|
|
|
2018-01-10 15:15:43 +00:00
|
|
|
engine->sram_dma = dma_map_resource(cesa->dev, res->start,
|
|
|
|
cesa->sram_size,
|
|
|
|
DMA_BIDIRECTIONAL, 0);
|
|
|
|
if (dma_mapping_error(cesa->dev, engine->sram_dma))
|
|
|
|
return -ENOMEM;
|
2015-06-18 13:46:20 +00:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void mv_cesa_put_sram(struct platform_device *pdev, int idx)
|
|
|
|
{
|
|
|
|
struct mv_cesa_dev *cesa = platform_get_drvdata(pdev);
|
|
|
|
struct mv_cesa_engine *engine = &cesa->engines[idx];
|
|
|
|
|
2018-01-10 15:15:43 +00:00
|
|
|
if (engine->pool)
|
2021-01-21 05:16:46 +00:00
|
|
|
gen_pool_free(engine->pool, (unsigned long)engine->sram_pool,
|
2018-01-10 15:15:43 +00:00
|
|
|
cesa->sram_size);
|
|
|
|
else
|
|
|
|
dma_unmap_resource(cesa->dev, engine->sram_dma,
|
|
|
|
cesa->sram_size, DMA_BIDIRECTIONAL, 0);
|
2015-06-18 13:46:20 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static int mv_cesa_probe(struct platform_device *pdev)
|
|
|
|
{
|
2015-06-18 13:46:28 +00:00
|
|
|
const struct mv_cesa_caps *caps = &orion_caps;
|
2015-06-18 13:46:20 +00:00
|
|
|
const struct mbus_dram_target_info *dram;
|
|
|
|
const struct of_device_id *match;
|
|
|
|
struct device *dev = &pdev->dev;
|
|
|
|
struct mv_cesa_dev *cesa;
|
|
|
|
struct mv_cesa_engine *engines;
|
2020-07-21 04:40:27 +00:00
|
|
|
int irq, ret, i, cpu;
|
2015-06-18 13:46:20 +00:00
|
|
|
u32 sram_size;
|
|
|
|
|
|
|
|
if (cesa_dev) {
|
|
|
|
dev_err(&pdev->dev, "Only one CESA device authorized\n");
|
|
|
|
return -EEXIST;
|
|
|
|
}
|
|
|
|
|
2015-06-18 13:46:28 +00:00
|
|
|
if (dev->of_node) {
|
|
|
|
match = of_match_node(mv_cesa_of_match_table, dev->of_node);
|
|
|
|
if (!match || !match->data)
|
|
|
|
return -ENOTSUPP;
|
2015-06-18 13:46:20 +00:00
|
|
|
|
2015-06-18 13:46:28 +00:00
|
|
|
caps = match->data;
|
|
|
|
}
|
2015-06-18 13:46:20 +00:00
|
|
|
|
|
|
|
cesa = devm_kzalloc(dev, sizeof(*cesa), GFP_KERNEL);
|
|
|
|
if (!cesa)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
cesa->caps = caps;
|
|
|
|
cesa->dev = dev;
|
|
|
|
|
|
|
|
sram_size = CESA_SA_DEFAULT_SRAM_SIZE;
|
|
|
|
of_property_read_u32(cesa->dev->of_node, "marvell,crypto-sram-size",
|
|
|
|
&sram_size);
|
|
|
|
if (sram_size < CESA_SA_MIN_SRAM_SIZE)
|
|
|
|
sram_size = CESA_SA_MIN_SRAM_SIZE;
|
|
|
|
|
|
|
|
cesa->sram_size = sram_size;
|
treewide: devm_kzalloc() -> devm_kcalloc()
The devm_kzalloc() function has a 2-factor argument form, devm_kcalloc().
This patch replaces cases of:
devm_kzalloc(handle, a * b, gfp)
with:
devm_kcalloc(handle, a * b, gfp)
as well as handling cases of:
devm_kzalloc(handle, a * b * c, gfp)
with:
devm_kzalloc(handle, array3_size(a, b, c), gfp)
as it's slightly less ugly than:
devm_kcalloc(handle, array_size(a, b), c, gfp)
This does, however, attempt to ignore constant size factors like:
devm_kzalloc(handle, 4 * 1024, gfp)
though any constants defined via macros get caught up in the conversion.
Any factors with a sizeof() of "unsigned char", "char", and "u8" were
dropped, since they're redundant.
Some manual whitespace fixes were needed in this patch, as Coccinelle
really liked to write "=devm_kcalloc..." instead of "= devm_kcalloc...".
The Coccinelle script used for this was:
// Fix redundant parens around sizeof().
@@
expression HANDLE;
type TYPE;
expression THING, E;
@@
(
devm_kzalloc(HANDLE,
- (sizeof(TYPE)) * E
+ sizeof(TYPE) * E
, ...)
|
devm_kzalloc(HANDLE,
- (sizeof(THING)) * E
+ sizeof(THING) * E
, ...)
)
// Drop single-byte sizes and redundant parens.
@@
expression HANDLE;
expression COUNT;
typedef u8;
typedef __u8;
@@
(
devm_kzalloc(HANDLE,
- sizeof(u8) * (COUNT)
+ COUNT
, ...)
|
devm_kzalloc(HANDLE,
- sizeof(__u8) * (COUNT)
+ COUNT
, ...)
|
devm_kzalloc(HANDLE,
- sizeof(char) * (COUNT)
+ COUNT
, ...)
|
devm_kzalloc(HANDLE,
- sizeof(unsigned char) * (COUNT)
+ COUNT
, ...)
|
devm_kzalloc(HANDLE,
- sizeof(u8) * COUNT
+ COUNT
, ...)
|
devm_kzalloc(HANDLE,
- sizeof(__u8) * COUNT
+ COUNT
, ...)
|
devm_kzalloc(HANDLE,
- sizeof(char) * COUNT
+ COUNT
, ...)
|
devm_kzalloc(HANDLE,
- sizeof(unsigned char) * COUNT
+ COUNT
, ...)
)
// 2-factor product with sizeof(type/expression) and identifier or constant.
@@
expression HANDLE;
type TYPE;
expression THING;
identifier COUNT_ID;
constant COUNT_CONST;
@@
(
- devm_kzalloc
+ devm_kcalloc
(HANDLE,
- sizeof(TYPE) * (COUNT_ID)
+ COUNT_ID, sizeof(TYPE)
, ...)
|
- devm_kzalloc
+ devm_kcalloc
(HANDLE,
- sizeof(TYPE) * COUNT_ID
+ COUNT_ID, sizeof(TYPE)
, ...)
|
- devm_kzalloc
+ devm_kcalloc
(HANDLE,
- sizeof(TYPE) * (COUNT_CONST)
+ COUNT_CONST, sizeof(TYPE)
, ...)
|
- devm_kzalloc
+ devm_kcalloc
(HANDLE,
- sizeof(TYPE) * COUNT_CONST
+ COUNT_CONST, sizeof(TYPE)
, ...)
|
- devm_kzalloc
+ devm_kcalloc
(HANDLE,
- sizeof(THING) * (COUNT_ID)
+ COUNT_ID, sizeof(THING)
, ...)
|
- devm_kzalloc
+ devm_kcalloc
(HANDLE,
- sizeof(THING) * COUNT_ID
+ COUNT_ID, sizeof(THING)
, ...)
|
- devm_kzalloc
+ devm_kcalloc
(HANDLE,
- sizeof(THING) * (COUNT_CONST)
+ COUNT_CONST, sizeof(THING)
, ...)
|
- devm_kzalloc
+ devm_kcalloc
(HANDLE,
- sizeof(THING) * COUNT_CONST
+ COUNT_CONST, sizeof(THING)
, ...)
)
// 2-factor product, only identifiers.
@@
expression HANDLE;
identifier SIZE, COUNT;
@@
- devm_kzalloc
+ devm_kcalloc
(HANDLE,
- SIZE * COUNT
+ COUNT, SIZE
, ...)
// 3-factor product with 1 sizeof(type) or sizeof(expression), with
// redundant parens removed.
@@
expression HANDLE;
expression THING;
identifier STRIDE, COUNT;
type TYPE;
@@
(
devm_kzalloc(HANDLE,
- sizeof(TYPE) * (COUNT) * (STRIDE)
+ array3_size(COUNT, STRIDE, sizeof(TYPE))
, ...)
|
devm_kzalloc(HANDLE,
- sizeof(TYPE) * (COUNT) * STRIDE
+ array3_size(COUNT, STRIDE, sizeof(TYPE))
, ...)
|
devm_kzalloc(HANDLE,
- sizeof(TYPE) * COUNT * (STRIDE)
+ array3_size(COUNT, STRIDE, sizeof(TYPE))
, ...)
|
devm_kzalloc(HANDLE,
- sizeof(TYPE) * COUNT * STRIDE
+ array3_size(COUNT, STRIDE, sizeof(TYPE))
, ...)
|
devm_kzalloc(HANDLE,
- sizeof(THING) * (COUNT) * (STRIDE)
+ array3_size(COUNT, STRIDE, sizeof(THING))
, ...)
|
devm_kzalloc(HANDLE,
- sizeof(THING) * (COUNT) * STRIDE
+ array3_size(COUNT, STRIDE, sizeof(THING))
, ...)
|
devm_kzalloc(HANDLE,
- sizeof(THING) * COUNT * (STRIDE)
+ array3_size(COUNT, STRIDE, sizeof(THING))
, ...)
|
devm_kzalloc(HANDLE,
- sizeof(THING) * COUNT * STRIDE
+ array3_size(COUNT, STRIDE, sizeof(THING))
, ...)
)
// 3-factor product with 2 sizeof(variable), with redundant parens removed.
@@
expression HANDLE;
expression THING1, THING2;
identifier COUNT;
type TYPE1, TYPE2;
@@
(
devm_kzalloc(HANDLE,
- sizeof(TYPE1) * sizeof(TYPE2) * COUNT
+ array3_size(COUNT, sizeof(TYPE1), sizeof(TYPE2))
, ...)
|
devm_kzalloc(HANDLE,
- sizeof(TYPE1) * sizeof(THING2) * (COUNT)
+ array3_size(COUNT, sizeof(TYPE1), sizeof(TYPE2))
, ...)
|
devm_kzalloc(HANDLE,
- sizeof(THING1) * sizeof(THING2) * COUNT
+ array3_size(COUNT, sizeof(THING1), sizeof(THING2))
, ...)
|
devm_kzalloc(HANDLE,
- sizeof(THING1) * sizeof(THING2) * (COUNT)
+ array3_size(COUNT, sizeof(THING1), sizeof(THING2))
, ...)
|
devm_kzalloc(HANDLE,
- sizeof(TYPE1) * sizeof(THING2) * COUNT
+ array3_size(COUNT, sizeof(TYPE1), sizeof(THING2))
, ...)
|
devm_kzalloc(HANDLE,
- sizeof(TYPE1) * sizeof(THING2) * (COUNT)
+ array3_size(COUNT, sizeof(TYPE1), sizeof(THING2))
, ...)
)
// 3-factor product, only identifiers, with redundant parens removed.
@@
expression HANDLE;
identifier STRIDE, SIZE, COUNT;
@@
(
devm_kzalloc(HANDLE,
- (COUNT) * STRIDE * SIZE
+ array3_size(COUNT, STRIDE, SIZE)
, ...)
|
devm_kzalloc(HANDLE,
- COUNT * (STRIDE) * SIZE
+ array3_size(COUNT, STRIDE, SIZE)
, ...)
|
devm_kzalloc(HANDLE,
- COUNT * STRIDE * (SIZE)
+ array3_size(COUNT, STRIDE, SIZE)
, ...)
|
devm_kzalloc(HANDLE,
- (COUNT) * (STRIDE) * SIZE
+ array3_size(COUNT, STRIDE, SIZE)
, ...)
|
devm_kzalloc(HANDLE,
- COUNT * (STRIDE) * (SIZE)
+ array3_size(COUNT, STRIDE, SIZE)
, ...)
|
devm_kzalloc(HANDLE,
- (COUNT) * STRIDE * (SIZE)
+ array3_size(COUNT, STRIDE, SIZE)
, ...)
|
devm_kzalloc(HANDLE,
- (COUNT) * (STRIDE) * (SIZE)
+ array3_size(COUNT, STRIDE, SIZE)
, ...)
|
devm_kzalloc(HANDLE,
- COUNT * STRIDE * SIZE
+ array3_size(COUNT, STRIDE, SIZE)
, ...)
)
// Any remaining multi-factor products, first at least 3-factor products,
// when they're not all constants...
@@
expression HANDLE;
expression E1, E2, E3;
constant C1, C2, C3;
@@
(
devm_kzalloc(HANDLE, C1 * C2 * C3, ...)
|
devm_kzalloc(HANDLE,
- (E1) * E2 * E3
+ array3_size(E1, E2, E3)
, ...)
|
devm_kzalloc(HANDLE,
- (E1) * (E2) * E3
+ array3_size(E1, E2, E3)
, ...)
|
devm_kzalloc(HANDLE,
- (E1) * (E2) * (E3)
+ array3_size(E1, E2, E3)
, ...)
|
devm_kzalloc(HANDLE,
- E1 * E2 * E3
+ array3_size(E1, E2, E3)
, ...)
)
// And then all remaining 2 factors products when they're not all constants,
// keeping sizeof() as the second factor argument.
@@
expression HANDLE;
expression THING, E1, E2;
type TYPE;
constant C1, C2, C3;
@@
(
devm_kzalloc(HANDLE, sizeof(THING) * C2, ...)
|
devm_kzalloc(HANDLE, sizeof(TYPE) * C2, ...)
|
devm_kzalloc(HANDLE, C1 * C2 * C3, ...)
|
devm_kzalloc(HANDLE, C1 * C2, ...)
|
- devm_kzalloc
+ devm_kcalloc
(HANDLE,
- sizeof(TYPE) * (E2)
+ E2, sizeof(TYPE)
, ...)
|
- devm_kzalloc
+ devm_kcalloc
(HANDLE,
- sizeof(TYPE) * E2
+ E2, sizeof(TYPE)
, ...)
|
- devm_kzalloc
+ devm_kcalloc
(HANDLE,
- sizeof(THING) * (E2)
+ E2, sizeof(THING)
, ...)
|
- devm_kzalloc
+ devm_kcalloc
(HANDLE,
- sizeof(THING) * E2
+ E2, sizeof(THING)
, ...)
|
- devm_kzalloc
+ devm_kcalloc
(HANDLE,
- (E1) * E2
+ E1, E2
, ...)
|
- devm_kzalloc
+ devm_kcalloc
(HANDLE,
- (E1) * (E2)
+ E1, E2
, ...)
|
- devm_kzalloc
+ devm_kcalloc
(HANDLE,
- E1 * E2
+ E1, E2
, ...)
)
Signed-off-by: Kees Cook <keescook@chromium.org>
2018-06-12 21:07:58 +00:00
|
|
|
cesa->engines = devm_kcalloc(dev, caps->nengines, sizeof(*engines),
|
2015-06-18 13:46:20 +00:00
|
|
|
GFP_KERNEL);
|
|
|
|
if (!cesa->engines)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
spin_lock_init(&cesa->lock);
|
2016-06-21 08:08:38 +00:00
|
|
|
|
2020-09-17 07:42:34 +00:00
|
|
|
cesa->regs = devm_platform_ioremap_resource_byname(pdev, "regs");
|
2015-06-18 13:46:20 +00:00
|
|
|
if (IS_ERR(cesa->regs))
|
2016-03-17 09:47:10 +00:00
|
|
|
return PTR_ERR(cesa->regs);
|
2015-06-18 13:46:20 +00:00
|
|
|
|
2015-06-18 13:46:21 +00:00
|
|
|
ret = mv_cesa_dev_dma_init(cesa);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
2015-06-18 13:46:20 +00:00
|
|
|
dram = mv_mbus_dram_info_nooverlap();
|
|
|
|
|
|
|
|
platform_set_drvdata(pdev, cesa);
|
|
|
|
|
|
|
|
for (i = 0; i < caps->nengines; i++) {
|
|
|
|
struct mv_cesa_engine *engine = &cesa->engines[i];
|
|
|
|
char res_name[7];
|
|
|
|
|
|
|
|
engine->id = i;
|
|
|
|
spin_lock_init(&engine->lock);
|
|
|
|
|
|
|
|
ret = mv_cesa_get_sram(pdev, i);
|
|
|
|
if (ret)
|
|
|
|
goto err_cleanup;
|
|
|
|
|
|
|
|
irq = platform_get_irq(pdev, i);
|
|
|
|
if (irq < 0) {
|
|
|
|
ret = irq;
|
|
|
|
goto err_cleanup;
|
|
|
|
}
|
|
|
|
|
2020-07-21 04:40:27 +00:00
|
|
|
engine->irq = irq;
|
|
|
|
|
2015-06-18 13:46:20 +00:00
|
|
|
/*
|
|
|
|
* Not all platforms can gate the CESA clocks: do not complain
|
|
|
|
* if the clock does not exist.
|
|
|
|
*/
|
|
|
|
snprintf(res_name, sizeof(res_name), "cesa%d", i);
|
|
|
|
engine->clk = devm_clk_get(dev, res_name);
|
|
|
|
if (IS_ERR(engine->clk)) {
|
|
|
|
engine->clk = devm_clk_get(dev, NULL);
|
|
|
|
if (IS_ERR(engine->clk))
|
|
|
|
engine->clk = NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
snprintf(res_name, sizeof(res_name), "cesaz%d", i);
|
|
|
|
engine->zclk = devm_clk_get(dev, res_name);
|
|
|
|
if (IS_ERR(engine->zclk))
|
|
|
|
engine->zclk = NULL;
|
|
|
|
|
|
|
|
ret = clk_prepare_enable(engine->clk);
|
|
|
|
if (ret)
|
|
|
|
goto err_cleanup;
|
|
|
|
|
|
|
|
ret = clk_prepare_enable(engine->zclk);
|
|
|
|
if (ret)
|
|
|
|
goto err_cleanup;
|
|
|
|
|
|
|
|
engine->regs = cesa->regs + CESA_ENGINE_OFF(i);
|
|
|
|
|
2015-06-18 13:46:21 +00:00
|
|
|
if (dram && cesa->caps->has_tdma)
|
2016-04-19 15:09:20 +00:00
|
|
|
mv_cesa_conf_mbus_windows(engine, dram);
|
2015-06-18 13:46:21 +00:00
|
|
|
|
2016-04-19 15:09:20 +00:00
|
|
|
writel(0, engine->regs + CESA_SA_INT_STATUS);
|
2015-06-18 13:46:20 +00:00
|
|
|
writel(CESA_SA_CFG_STOP_DIG_ERR,
|
2016-04-19 15:09:20 +00:00
|
|
|
engine->regs + CESA_SA_CFG);
|
2015-06-18 13:46:20 +00:00
|
|
|
writel(engine->sram_dma & CESA_SA_SRAM_MSK,
|
2016-04-19 15:09:20 +00:00
|
|
|
engine->regs + CESA_SA_DESC_P0);
|
2015-06-18 13:46:20 +00:00
|
|
|
|
|
|
|
ret = devm_request_threaded_irq(dev, irq, NULL, mv_cesa_int,
|
|
|
|
IRQF_ONESHOT,
|
|
|
|
dev_name(&pdev->dev),
|
2016-04-19 15:09:20 +00:00
|
|
|
engine);
|
2015-06-18 13:46:20 +00:00
|
|
|
if (ret)
|
|
|
|
goto err_cleanup;
|
2016-06-21 08:08:38 +00:00
|
|
|
|
2020-07-21 04:40:27 +00:00
|
|
|
/* Set affinity */
|
|
|
|
cpu = cpumask_local_spread(engine->id, NUMA_NO_NODE);
|
|
|
|
irq_set_affinity_hint(irq, get_cpu_mask(cpu));
|
|
|
|
|
2016-06-21 08:08:38 +00:00
|
|
|
crypto_init_queue(&engine->queue, CESA_CRYPTO_DEFAULT_MAX_QLEN);
|
|
|
|
atomic_set(&engine->load, 0);
|
2016-06-21 08:08:39 +00:00
|
|
|
INIT_LIST_HEAD(&engine->complete_queue);
|
2015-06-18 13:46:20 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
cesa_dev = cesa;
|
|
|
|
|
|
|
|
ret = mv_cesa_add_algs(cesa);
|
|
|
|
if (ret) {
|
|
|
|
cesa_dev = NULL;
|
|
|
|
goto err_cleanup;
|
|
|
|
}
|
|
|
|
|
|
|
|
dev_info(dev, "CESA device successfully registered\n");
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
err_cleanup:
|
|
|
|
for (i = 0; i < caps->nengines; i++) {
|
|
|
|
clk_disable_unprepare(cesa->engines[i].zclk);
|
|
|
|
clk_disable_unprepare(cesa->engines[i].clk);
|
|
|
|
mv_cesa_put_sram(pdev, i);
|
2020-07-21 04:40:27 +00:00
|
|
|
if (cesa->engines[i].irq > 0)
|
|
|
|
irq_set_affinity_hint(cesa->engines[i].irq, NULL);
|
2015-06-18 13:46:20 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int mv_cesa_remove(struct platform_device *pdev)
|
|
|
|
{
|
|
|
|
struct mv_cesa_dev *cesa = platform_get_drvdata(pdev);
|
|
|
|
int i;
|
|
|
|
|
|
|
|
mv_cesa_remove_algs(cesa);
|
|
|
|
|
|
|
|
for (i = 0; i < cesa->caps->nengines; i++) {
|
|
|
|
clk_disable_unprepare(cesa->engines[i].zclk);
|
|
|
|
clk_disable_unprepare(cesa->engines[i].clk);
|
|
|
|
mv_cesa_put_sram(pdev, i);
|
2020-07-21 04:40:27 +00:00
|
|
|
irq_set_affinity_hint(cesa->engines[i].irq, NULL);
|
2015-06-18 13:46:20 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2017-10-11 13:16:17 +00:00
|
|
|
static const struct platform_device_id mv_cesa_plat_id_table[] = {
|
|
|
|
{ .name = "mv_crypto" },
|
2017-11-03 16:52:01 +00:00
|
|
|
{ /* sentinel */ },
|
2017-10-11 13:16:17 +00:00
|
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE(platform, mv_cesa_plat_id_table);
|
|
|
|
|
2015-06-18 13:46:20 +00:00
|
|
|
static struct platform_driver marvell_cesa = {
|
|
|
|
.probe = mv_cesa_probe,
|
|
|
|
.remove = mv_cesa_remove,
|
2017-10-11 13:16:17 +00:00
|
|
|
.id_table = mv_cesa_plat_id_table,
|
2015-06-18 13:46:20 +00:00
|
|
|
.driver = {
|
|
|
|
.name = "marvell-cesa",
|
|
|
|
.of_match_table = mv_cesa_of_match_table,
|
|
|
|
},
|
|
|
|
};
|
|
|
|
module_platform_driver(marvell_cesa);
|
|
|
|
|
|
|
|
MODULE_AUTHOR("Boris Brezillon <boris.brezillon@free-electrons.com>");
|
|
|
|
MODULE_AUTHOR("Arnaud Ebalard <arno@natisbad.org>");
|
|
|
|
MODULE_DESCRIPTION("Support for Marvell's cryptographic engine");
|
|
|
|
MODULE_LICENSE("GPL v2");
|