2012-08-02 08:17:51 +00:00
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/*
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* Power Management Service Unit (PMSU) support for Armada 370/XP platforms.
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*
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* Copyright (C) 2012 Marvell
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#ifndef __MACH_MVEBU_PMSU_H
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#define __MACH_MVEBU_PMSU_H
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int armada_xp_boot_cpu(unsigned int cpu_id, void *phys_addr);
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2014-07-23 13:00:40 +00:00
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int mvebu_setup_boot_addr_wa(unsigned int crypto_eng_target,
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unsigned int crypto_eng_attribute,
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phys_addr_t resume_addr_reg);
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2012-08-02 08:17:51 +00:00
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2014-07-23 13:00:42 +00:00
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void mvebu_v7_pmsu_idle_exit(void);
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ARM: mvebu: implement suspend/resume support for Armada XP
This commit implements the core of the platform code to enable
suspend/resume on Armada XP. It registers the platform_suspend_ops
structure, and implements the ->enter() hook of this structure.
It is worth mentioning that this commit only provides the SoC-level
part of suspend/resume, which calls into some board-specific code
provided in a follow-up commit.
The most important thing that this SoC-level code has to do is to
build an in-memory structure that contains a magic number, the return
address in the kernel after resume, and a set of address/value
pairs. This structure is used by the bootloader to restore a certain
number of registers (according to the set of address/value pairs) and
then jump back into the kernel at the provided location.
The code also puts the SDRAM into self-refresh mode, before calling
into board-specific code to actually enter the suspend to RAM state.
[ jac - add email exchange between Andrew Lunn and Thomas Petazzoni to better
describe who consumes the address/value pairs ]
> > Is this a well defined mechanism supported by mainline uboot, barebox
> > etc. Or is it some Marvell extension to their uboot?
>
> As far as I know, it is a Marvell extension to their "binary header",
> so it's done even before U-Boot starts. Since the hardware needs
> assistance from the bootloader to do suspend/resume, there is
> necessarily a certain amount of cooperation/agreement needed by what
> the kernel does and what the bootloader expects. I'm not sure there's
> any "standard" mechanism here. Do you know of any?
>
> I know the suspend/resume on the Blackfin architecture works the same
> way (at least it used to work that way years ago when I did a bit of
> Blackfin stuff). And here as well, there was some cooperation between
> the kernel and the bootloader. See
> arch/blackfin/mach-common/dpmc_modes.S, function do_hibernate() at the
> end.
>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1416585613-2113-10-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-11-21 16:00:06 +00:00
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void armada_370_xp_cpu_resume(void);
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2014-07-23 13:00:42 +00:00
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2014-10-30 11:39:41 +00:00
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int armada_370_xp_pmsu_idle_enter(unsigned long deepidle);
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2014-10-30 11:39:44 +00:00
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int armada_38x_do_cpu_suspend(unsigned long deepidle);
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2012-08-02 08:17:51 +00:00
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#endif /* __MACH_370_XP_PMSU_H */
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