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linux/arch/alpha/kernel/sys_rawhide.c

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Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-16 22:20:36 +00:00
/*
* linux/arch/alpha/kernel/sys_rawhide.c
*
* Copyright (C) 1995 David A Rusling
* Copyright (C) 1996 Jay A Estabrook
* Copyright (C) 1998, 1999 Richard Henderson
*
* Code supporting the RAWHIDE.
*/
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/mm.h>
#include <linux/sched.h>
#include <linux/pci.h>
#include <linux/init.h>
#include <asm/ptrace.h>
#include <asm/system.h>
#include <asm/dma.h>
#include <asm/irq.h>
#include <asm/mmu_context.h>
#include <asm/io.h>
#include <asm/pgtable.h>
#include <asm/core_mcpcia.h>
#include <asm/tlbflush.h>
#include "proto.h"
#include "irq_impl.h"
#include "pci_impl.h"
#include "machvec_impl.h"
/*
* HACK ALERT! only the boot cpu is used for interrupts.
*/
/* Note mask bit is true for ENABLED irqs. */
static unsigned int hose_irq_masks[4] = {
0xff0000, 0xfe0000, 0xff0000, 0xff0000
};
static unsigned int cached_irq_masks[4];
DEFINE_SPINLOCK(rawhide_irq_lock);
static inline void
rawhide_update_irq_hw(int hose, int mask)
{
*(vuip)MCPCIA_INT_MASK0(MCPCIA_HOSE2MID(hose)) = mask;
mb();
*(vuip)MCPCIA_INT_MASK0(MCPCIA_HOSE2MID(hose));
}
static inline void
rawhide_enable_irq(unsigned int irq)
{
unsigned int mask, hose;
irq -= 16;
hose = irq / 24;
irq -= hose * 24;
mask = 1 << irq;
spin_lock(&rawhide_irq_lock);
mask |= cached_irq_masks[hose];
cached_irq_masks[hose] = mask;
rawhide_update_irq_hw(hose, mask);
spin_unlock(&rawhide_irq_lock);
}
static void
rawhide_disable_irq(unsigned int irq)
{
unsigned int mask, hose;
irq -= 16;
hose = irq / 24;
irq -= hose * 24;
mask = ~(1 << irq) | hose_irq_masks[hose];
spin_lock(&rawhide_irq_lock);
mask &= cached_irq_masks[hose];
cached_irq_masks[hose] = mask;
rawhide_update_irq_hw(hose, mask);
spin_unlock(&rawhide_irq_lock);
}
static void
rawhide_mask_and_ack_irq(unsigned int irq)
{
unsigned int mask, mask1, hose;
irq -= 16;
hose = irq / 24;
irq -= hose * 24;
mask1 = 1 << irq;
mask = ~mask1 | hose_irq_masks[hose];
spin_lock(&rawhide_irq_lock);
mask &= cached_irq_masks[hose];
cached_irq_masks[hose] = mask;
rawhide_update_irq_hw(hose, mask);
/* Clear the interrupt. */
*(vuip)MCPCIA_INT_REQ(MCPCIA_HOSE2MID(hose)) = mask1;
spin_unlock(&rawhide_irq_lock);
}
static unsigned int
rawhide_startup_irq(unsigned int irq)
{
rawhide_enable_irq(irq);
return 0;
}
static void
rawhide_end_irq(unsigned int irq)
{
if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
rawhide_enable_irq(irq);
}
static struct hw_interrupt_type rawhide_irq_type = {
.typename = "RAWHIDE",
.startup = rawhide_startup_irq,
.shutdown = rawhide_disable_irq,
.enable = rawhide_enable_irq,
.disable = rawhide_disable_irq,
.ack = rawhide_mask_and_ack_irq,
.end = rawhide_end_irq,
};
static void
[PATCH] alpha pt_regs cleanups: device_interrupt callers of ->device_interrupt() do set_irq_regs() now; pt_regs argument removed, remaining uses of regs in instances of ->device_interrupt() are switched to get_irq_regs() and will be gone in the next patch. Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-10-08 13:36:08 +00:00
rawhide_srm_device_interrupt(unsigned long vector)
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-16 22:20:36 +00:00
{
int irq;
irq = (vector - 0x800) >> 4;
/*
* The RAWHIDE SRM console reports PCI interrupts with a vector
* 0x80 *higher* than one might expect, as PCI IRQ 0 (ie bit 0)
* shows up as IRQ 24, etc, etc. We adjust it down by 8 to have
* it line up with the actual bit numbers from the REQ registers,
* which is how we manage the interrupts/mask. Sigh...
*
* Also, PCI #1 interrupts are offset some more... :-(
*/
if (irq == 52) {
/* SCSI on PCI1 is special. */
irq = 72;
}
/* Adjust by which hose it is from. */
irq -= ((irq + 16) >> 2) & 0x38;
[PATCH] alpha pt_regs cleanups: handle_irq() isa_no_iack_sc_device_interrupt() always gets get_irq_regs() as argument; kill that argument. All but two callers of handle_irq() pass get_irq_regs() as argument; convert the remaining two, kill set_irq_regs() inside handle_irq(). Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-10-08 13:37:32 +00:00
handle_irq(irq);
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-16 22:20:36 +00:00
}
static void __init
rawhide_init_irq(void)
{
struct pci_controller *hose;
long i;
mcpcia_init_hoses();
for (hose = hose_head; hose; hose = hose->next) {
unsigned int h = hose->index;
unsigned int mask = hose_irq_masks[h];
cached_irq_masks[h] = mask;
*(vuip)MCPCIA_INT_MASK0(MCPCIA_HOSE2MID(h)) = mask;
*(vuip)MCPCIA_INT_MASK1(MCPCIA_HOSE2MID(h)) = 0;
}
for (i = 16; i < 128; ++i) {
irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
[PATCH] genirq: rename desc->handler to desc->chip This patch-queue improves the generic IRQ layer to be truly generic, by adding various abstractions and features to it, without impacting existing functionality. While the queue can be best described as "fix and improve everything in the generic IRQ layer that we could think of", and thus it consists of many smaller features and lots of cleanups, the one feature that stands out most is the new 'irq chip' abstraction. The irq-chip abstraction is about describing and coding and IRQ controller driver by mapping its raw hardware capabilities [and quirks, if needed] in a straightforward way, without having to think about "IRQ flow" (level/edge/etc.) type of details. This stands in contrast with the current 'irq-type' model of genirq architectures, which 'mixes' raw hardware capabilities with 'flow' details. The patchset supports both types of irq controller designs at once, and converts i386 and x86_64 to the new irq-chip design. As a bonus side-effect of the irq-chip approach, chained interrupt controllers (master/slave PIC constructs, etc.) are now supported by design as well. The end result of this patchset intends to be simpler architecture-level code and more consolidation between architectures. We reused many bits of code and many concepts from Russell King's ARM IRQ layer, the merging of which was one of the motivations for this patchset. This patch: rename desc->handler to desc->chip. Originally i did not want to do this, because it's a big patch. But having both "desc->handler", "desc->handle_irq" and "action->handler" caused a large degree of confusion and made the code appear alot less clean than it truly is. I have also attempted a dual approach as well by introducing a desc->chip alias - but that just wasnt robust enough and broke frequently. So lets get over with this quickly. The conversion was done automatically via scripts and converts all the code in the kernel. This renaming patch is the first one amongst the patches, so that the remaining patches can stay flexible and can be merged and split up without having some big monolithic patch act as a merge barrier. [akpm@osdl.org: build fix] [akpm@osdl.org: another build fix] Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-06-29 09:24:36 +00:00
irq_desc[i].chip = &rawhide_irq_type;
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-16 22:20:36 +00:00
}
init_i8259a_irqs();
common_init_isa_dma();
}
/*
* PCI Fixup configuration.
*
* Summary @ MCPCIA_PCI0_INT_REQ:
* Bit Meaning
* 0 Interrupt Line A from slot 2 PCI0
* 1 Interrupt Line B from slot 2 PCI0
* 2 Interrupt Line C from slot 2 PCI0
* 3 Interrupt Line D from slot 2 PCI0
* 4 Interrupt Line A from slot 3 PCI0
* 5 Interrupt Line B from slot 3 PCI0
* 6 Interrupt Line C from slot 3 PCI0
* 7 Interrupt Line D from slot 3 PCI0
* 8 Interrupt Line A from slot 4 PCI0
* 9 Interrupt Line B from slot 4 PCI0
* 10 Interrupt Line C from slot 4 PCI0
* 11 Interrupt Line D from slot 4 PCI0
* 12 Interrupt Line A from slot 5 PCI0
* 13 Interrupt Line B from slot 5 PCI0
* 14 Interrupt Line C from slot 5 PCI0
* 15 Interrupt Line D from slot 5 PCI0
* 16 EISA interrupt (PCI 0) or SCSI interrupt (PCI 1)
* 17-23 NA
*
* IdSel
* 1 EISA bridge (PCI bus 0 only)
* 2 PCI option slot 2
* 3 PCI option slot 3
* 4 PCI option slot 4
* 5 PCI option slot 5
*
*/
static int __init
rawhide_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
{
static char irq_tab[5][5] __initdata = {
/*INT INTA INTB INTC INTD */
{ 16+16, 16+16, 16+16, 16+16, 16+16}, /* IdSel 1 SCSI PCI 1 */
{ 16+ 0, 16+ 0, 16+ 1, 16+ 2, 16+ 3}, /* IdSel 2 slot 2 */
{ 16+ 4, 16+ 4, 16+ 5, 16+ 6, 16+ 7}, /* IdSel 3 slot 3 */
{ 16+ 8, 16+ 8, 16+ 9, 16+10, 16+11}, /* IdSel 4 slot 4 */
{ 16+12, 16+12, 16+13, 16+14, 16+15} /* IdSel 5 slot 5 */
};
const long min_idsel = 1, max_idsel = 5, irqs_per_slot = 5;
struct pci_controller *hose = dev->sysdata;
int irq = COMMON_TABLE_LOOKUP;
if (irq >= 0)
irq += 24 * hose->index;
return irq;
}
/*
* The System Vector
*/
struct alpha_machine_vector rawhide_mv __initmv = {
.vector_name = "Rawhide",
DO_EV5_MMU,
DO_DEFAULT_RTC,
DO_MCPCIA_IO,
.machine_check = mcpcia_machine_check,
.max_isa_dma_address = ALPHA_MAX_ISA_DMA_ADDRESS,
.min_io_address = DEFAULT_IO_BASE,
.min_mem_address = MCPCIA_DEFAULT_MEM_BASE,
.pci_dac_offset = MCPCIA_DAC_OFFSET,
.nr_irqs = 128,
.device_interrupt = rawhide_srm_device_interrupt,
.init_arch = mcpcia_init_arch,
.init_irq = rawhide_init_irq,
.init_rtc = common_init_rtc,
.init_pci = common_init_pci,
.kill_arch = NULL,
.pci_map_irq = rawhide_map_irq,
.pci_swizzle = common_swizzle,
};
ALIAS_MV(rawhide)
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