2015-10-06 19:25:47 +00:00
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/*
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* Copyright (C) 2015 Broadcom Corporation
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation version 2.
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*
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* This program is distributed "as is" WITHOUT ANY WARRANTY of any
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* kind, whether express or implied; without even the implied warranty
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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/delay.h>
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_platform.h>
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#include <linux/of_mdio.h>
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#include <linux/phy.h>
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#include <linux/platform_device.h>
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#include <linux/sched.h>
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#define IPROC_GPHY_MDCDIV 0x1a
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#define MII_CTRL_OFFSET 0x000
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#define MII_CTRL_DIV_SHIFT 0
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#define MII_CTRL_PRE_SHIFT 7
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#define MII_CTRL_BUSY_SHIFT 8
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#define MII_DATA_OFFSET 0x004
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#define MII_DATA_MASK 0xffff
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#define MII_DATA_TA_SHIFT 16
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#define MII_DATA_TA_VAL 2
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#define MII_DATA_RA_SHIFT 18
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#define MII_DATA_PA_SHIFT 23
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#define MII_DATA_OP_SHIFT 28
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#define MII_DATA_OP_WRITE 1
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#define MII_DATA_OP_READ 2
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#define MII_DATA_SB_SHIFT 30
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struct iproc_mdio_priv {
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struct mii_bus *mii_bus;
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void __iomem *base;
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};
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static inline int iproc_mdio_wait_for_idle(void __iomem *base)
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{
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u32 val;
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unsigned int timeout = 1000; /* loop for 1s */
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do {
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val = readl(base + MII_CTRL_OFFSET);
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if ((val & BIT(MII_CTRL_BUSY_SHIFT)) == 0)
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return 0;
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usleep_range(1000, 2000);
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} while (timeout--);
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return -ETIMEDOUT;
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}
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static inline void iproc_mdio_config_clk(void __iomem *base)
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{
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u32 val;
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val = (IPROC_GPHY_MDCDIV << MII_CTRL_DIV_SHIFT) |
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BIT(MII_CTRL_PRE_SHIFT);
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writel(val, base + MII_CTRL_OFFSET);
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}
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static int iproc_mdio_read(struct mii_bus *bus, int phy_id, int reg)
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{
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struct iproc_mdio_priv *priv = bus->priv;
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u32 cmd;
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int rc;
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rc = iproc_mdio_wait_for_idle(priv->base);
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if (rc)
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return rc;
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/* Prepare the read operation */
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cmd = (MII_DATA_TA_VAL << MII_DATA_TA_SHIFT) |
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(reg << MII_DATA_RA_SHIFT) |
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(phy_id << MII_DATA_PA_SHIFT) |
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BIT(MII_DATA_SB_SHIFT) |
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(MII_DATA_OP_READ << MII_DATA_OP_SHIFT);
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writel(cmd, priv->base + MII_DATA_OFFSET);
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rc = iproc_mdio_wait_for_idle(priv->base);
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if (rc)
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return rc;
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cmd = readl(priv->base + MII_DATA_OFFSET) & MII_DATA_MASK;
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return cmd;
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}
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static int iproc_mdio_write(struct mii_bus *bus, int phy_id,
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int reg, u16 val)
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{
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struct iproc_mdio_priv *priv = bus->priv;
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u32 cmd;
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int rc;
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rc = iproc_mdio_wait_for_idle(priv->base);
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if (rc)
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return rc;
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/* Prepare the write operation */
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cmd = (MII_DATA_TA_VAL << MII_DATA_TA_SHIFT) |
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(reg << MII_DATA_RA_SHIFT) |
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(phy_id << MII_DATA_PA_SHIFT) |
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BIT(MII_DATA_SB_SHIFT) |
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(MII_DATA_OP_WRITE << MII_DATA_OP_SHIFT) |
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((u32)(val) & MII_DATA_MASK);
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writel(cmd, priv->base + MII_DATA_OFFSET);
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rc = iproc_mdio_wait_for_idle(priv->base);
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if (rc)
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return rc;
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return 0;
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}
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static int iproc_mdio_probe(struct platform_device *pdev)
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{
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struct iproc_mdio_priv *priv;
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struct mii_bus *bus;
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struct resource *res;
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int rc;
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priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
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if (!priv)
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return -ENOMEM;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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priv->base = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(priv->base)) {
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dev_err(&pdev->dev, "failed to ioremap register\n");
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return PTR_ERR(priv->base);
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}
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priv->mii_bus = mdiobus_alloc();
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if (!priv->mii_bus) {
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dev_err(&pdev->dev, "MDIO bus alloc failed\n");
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return -ENOMEM;
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}
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bus = priv->mii_bus;
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bus->priv = priv;
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bus->name = "iProc MDIO bus";
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snprintf(bus->id, MII_BUS_ID_SIZE, "%s-%d", pdev->name, pdev->id);
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bus->parent = &pdev->dev;
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bus->read = iproc_mdio_read;
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bus->write = iproc_mdio_write;
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2017-02-08 22:14:26 +00:00
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iproc_mdio_config_clk(priv->base);
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2015-10-06 19:25:47 +00:00
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rc = of_mdiobus_register(bus, pdev->dev.of_node);
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if (rc) {
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dev_err(&pdev->dev, "MDIO bus registration failed\n");
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goto err_iproc_mdio;
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}
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platform_set_drvdata(pdev, priv);
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dev_info(&pdev->dev, "Broadcom iProc MDIO bus at 0x%p\n", priv->base);
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return 0;
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err_iproc_mdio:
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mdiobus_free(bus);
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return rc;
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}
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static int iproc_mdio_remove(struct platform_device *pdev)
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{
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struct iproc_mdio_priv *priv = platform_get_drvdata(pdev);
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mdiobus_unregister(priv->mii_bus);
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mdiobus_free(priv->mii_bus);
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return 0;
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}
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static const struct of_device_id iproc_mdio_of_match[] = {
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{ .compatible = "brcm,iproc-mdio", },
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{ /* sentinel */ },
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};
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MODULE_DEVICE_TABLE(of, iproc_mdio_of_match);
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static struct platform_driver iproc_mdio_driver = {
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.driver = {
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.name = "iproc-mdio",
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.of_match_table = iproc_mdio_of_match,
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},
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.probe = iproc_mdio_probe,
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.remove = iproc_mdio_remove,
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};
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module_platform_driver(iproc_mdio_driver);
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MODULE_AUTHOR("Broadcom Corporation");
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MODULE_DESCRIPTION("Broadcom iProc MDIO bus controller");
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MODULE_LICENSE("GPL v2");
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MODULE_ALIAS("platform:iproc-mdio");
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