2008-04-13 18:49:22 +00:00
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/*
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* Driver for the Integrant ITD1000 "Zero-IF Tuner IC for Direct Broadcast Satellite"
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*
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* Copyright (c) 2007-8 Patrick Boettcher <pb@linuxtv.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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*
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.=
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*/
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/delay.h>
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#include <linux/dvb/frontend.h>
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#include <linux/i2c.h>
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include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files. percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.
percpu.h -> slab.h dependency is about to be removed. Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability. As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.
http://userweb.kernel.org/~tj/misc/slabh-sweep.py
The script does the followings.
* Scan files for gfp and slab usages and update includes such that
only the necessary includes are there. ie. if only gfp is used,
gfp.h, if slab is used, slab.h.
* When the script inserts a new include, it looks at the include
blocks and try to put the new include such that its order conforms
to its surrounding. It's put in the include block which contains
core kernel includes, in the same order that the rest are ordered -
alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
doesn't seem to be any matching order.
* If the script can't find a place to put a new include (mostly
because the file doesn't have fitting include block), it prints out
an error message indicating which .h file needs to be added to the
file.
The conversion was done in the following steps.
1. The initial automatic conversion of all .c files updated slightly
over 4000 files, deleting around 700 includes and adding ~480 gfp.h
and ~3000 slab.h inclusions. The script emitted errors for ~400
files.
2. Each error was manually checked. Some didn't need the inclusion,
some needed manual addition while adding it to implementation .h or
embedding .c file was more appropriate for others. This step added
inclusions to around 150 files.
3. The script was run again and the output was compared to the edits
from #2 to make sure no file was left behind.
4. Several build tests were done and a couple of problems were fixed.
e.g. lib/decompress_*.c used malloc/free() wrappers around slab
APIs requiring slab.h to be added manually.
5. The script was run on all .h files but without automatically
editing them as sprinkling gfp.h and slab.h inclusions around .h
files could easily lead to inclusion dependency hell. Most gfp.h
inclusion directives were ignored as stuff from gfp.h was usually
wildly available and often used in preprocessor macros. Each
slab.h inclusion directive was examined and added manually as
necessary.
6. percpu.h was updated not to include slab.h.
7. Build test were done on the following configurations and failures
were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my
distributed build env didn't work with gcov compiles) and a few
more options had to be turned off depending on archs to make things
build (like ipr on powerpc/64 which failed due to missing writeq).
* x86 and x86_64 UP and SMP allmodconfig and a custom test config.
* powerpc and powerpc64 SMP allmodconfig
* sparc and sparc64 SMP allmodconfig
* ia64 SMP allmodconfig
* s390 SMP allmodconfig
* alpha SMP allmodconfig
* um on x86_64 SMP allmodconfig
8. percpu.h modifications were reverted so that it could be applied as
a separate patch and serve as bisection point.
Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.
Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
2010-03-24 08:04:11 +00:00
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#include <linux/slab.h>
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2008-04-13 18:49:22 +00:00
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#include "dvb_frontend.h"
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#include "itd1000.h"
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#include "itd1000_priv.h"
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static int debug;
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module_param(debug, int, 0644);
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MODULE_PARM_DESC(debug, "Turn on/off debugging (default:off).");
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2011-05-23 11:40:00 +00:00
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#define itd_dbg(args...) do { \
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2008-04-13 18:49:22 +00:00
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if (debug) { \
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printk(KERN_DEBUG "ITD1000: " args);\
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} \
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} while (0)
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2011-05-23 11:40:00 +00:00
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#define itd_warn(args...) do { \
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2008-04-13 18:49:22 +00:00
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printk(KERN_WARNING "ITD1000: " args); \
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} while (0)
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2011-05-23 11:40:00 +00:00
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#define itd_info(args...) do { \
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2008-04-13 18:49:22 +00:00
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printk(KERN_INFO "ITD1000: " args); \
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} while (0)
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/* don't write more than one byte with flexcop behind */
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static int itd1000_write_regs(struct itd1000_state *state, u8 reg, u8 v[], u8 len)
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{
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u8 buf[1+len];
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struct i2c_msg msg = {
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.addr = state->cfg->i2c_address, .flags = 0, .buf = buf, .len = len+1
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};
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buf[0] = reg;
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memcpy(&buf[1], v, len);
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2011-05-23 11:40:00 +00:00
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/* itd_dbg("wr %02x: %02x\n", reg, v[0]); */
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2008-04-13 18:49:22 +00:00
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if (i2c_transfer(state->i2c, &msg, 1) != 1) {
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printk(KERN_WARNING "itd1000 I2C write failed\n");
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return -EREMOTEIO;
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}
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return 0;
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}
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static int itd1000_read_reg(struct itd1000_state *state, u8 reg)
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{
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u8 val;
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struct i2c_msg msg[2] = {
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{ .addr = state->cfg->i2c_address, .flags = 0, .buf = ®, .len = 1 },
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{ .addr = state->cfg->i2c_address, .flags = I2C_M_RD, .buf = &val, .len = 1 },
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};
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/* ugly flexcop workaround */
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itd1000_write_regs(state, (reg - 1) & 0xff, &state->shadow[(reg - 1) & 0xff], 1);
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if (i2c_transfer(state->i2c, msg, 2) != 2) {
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2011-05-23 11:40:00 +00:00
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itd_warn("itd1000 I2C read failed\n");
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2008-04-13 18:49:22 +00:00
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return -EREMOTEIO;
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}
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return val;
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}
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static inline int itd1000_write_reg(struct itd1000_state *state, u8 r, u8 v)
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{
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int ret = itd1000_write_regs(state, r, &v, 1);
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state->shadow[r] = v;
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return ret;
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}
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static struct {
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u32 symbol_rate;
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u8 pgaext : 4; /* PLLFH */
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u8 bbgvmin : 4; /* BBGVMIN */
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} itd1000_lpf_pga[] = {
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{ 0, 0x8, 0x3 },
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{ 5200000, 0x8, 0x3 },
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{ 12200000, 0x4, 0x3 },
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{ 15400000, 0x2, 0x3 },
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{ 19800000, 0x2, 0x3 },
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{ 21500000, 0x2, 0x3 },
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{ 24500000, 0x2, 0x3 },
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{ 28400000, 0x2, 0x3 },
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{ 33400000, 0x2, 0x3 },
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{ 34400000, 0x1, 0x4 },
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{ 34400000, 0x1, 0x4 },
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{ 38400000, 0x1, 0x4 },
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{ 38400000, 0x1, 0x4 },
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{ 40400000, 0x1, 0x4 },
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{ 45400000, 0x1, 0x4 },
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};
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static void itd1000_set_lpf_bw(struct itd1000_state *state, u32 symbol_rate)
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{
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u8 i;
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u8 con1 = itd1000_read_reg(state, CON1) & 0xfd;
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u8 pllfh = itd1000_read_reg(state, PLLFH) & 0x0f;
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u8 bbgvmin = itd1000_read_reg(state, BBGVMIN) & 0xf0;
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u8 bw = itd1000_read_reg(state, BW) & 0xf0;
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2011-05-23 11:40:00 +00:00
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itd_dbg("symbol_rate = %d\n", symbol_rate);
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2008-04-13 18:49:22 +00:00
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/* not sure what is that ? - starting to download the table */
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itd1000_write_reg(state, CON1, con1 | (1 << 1));
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for (i = 0; i < ARRAY_SIZE(itd1000_lpf_pga); i++)
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if (symbol_rate < itd1000_lpf_pga[i].symbol_rate) {
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2011-05-23 11:40:00 +00:00
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itd_dbg("symrate: index: %d pgaext: %x, bbgvmin: %x\n", i, itd1000_lpf_pga[i].pgaext, itd1000_lpf_pga[i].bbgvmin);
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2008-04-13 18:49:22 +00:00
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itd1000_write_reg(state, PLLFH, pllfh | (itd1000_lpf_pga[i].pgaext << 4));
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itd1000_write_reg(state, BBGVMIN, bbgvmin | (itd1000_lpf_pga[i].bbgvmin));
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itd1000_write_reg(state, BW, bw | (i & 0x0f));
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break;
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}
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itd1000_write_reg(state, CON1, con1 | (0 << 1));
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}
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static struct {
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u8 vcorg;
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u32 fmax_rg;
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} itd1000_vcorg[] = {
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{ 1, 920000 },
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{ 2, 971000 },
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{ 3, 1031000 },
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{ 4, 1091000 },
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{ 5, 1171000 },
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{ 6, 1281000 },
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{ 7, 1381000 },
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{ 8, 500000 }, /* this is intentional. */
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{ 9, 1451000 },
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{ 10, 1531000 },
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{ 11, 1631000 },
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{ 12, 1741000 },
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{ 13, 1891000 },
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{ 14, 2071000 },
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{ 15, 2250000 },
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};
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static void itd1000_set_vco(struct itd1000_state *state, u32 freq_khz)
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{
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u8 i;
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u8 gvbb_i2c = itd1000_read_reg(state, GVBB_I2C) & 0xbf;
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u8 vco_chp1_i2c = itd1000_read_reg(state, VCO_CHP1_I2C) & 0x0f;
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u8 adcout;
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/* reserved bit again (reset ?) */
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itd1000_write_reg(state, GVBB_I2C, gvbb_i2c | (1 << 6));
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for (i = 0; i < ARRAY_SIZE(itd1000_vcorg); i++) {
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if (freq_khz < itd1000_vcorg[i].fmax_rg) {
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itd1000_write_reg(state, VCO_CHP1_I2C, vco_chp1_i2c | (itd1000_vcorg[i].vcorg << 4));
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msleep(1);
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adcout = itd1000_read_reg(state, PLLLOCK) & 0x0f;
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2011-05-23 11:40:00 +00:00
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itd_dbg("VCO: %dkHz: %d -> ADCOUT: %d %02x\n", freq_khz, itd1000_vcorg[i].vcorg, adcout, vco_chp1_i2c);
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2008-04-13 18:49:22 +00:00
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if (adcout > 13) {
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if (!(itd1000_vcorg[i].vcorg == 7 || itd1000_vcorg[i].vcorg == 15))
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itd1000_write_reg(state, VCO_CHP1_I2C, vco_chp1_i2c | ((itd1000_vcorg[i].vcorg + 1) << 4));
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} else if (adcout < 2) {
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if (!(itd1000_vcorg[i].vcorg == 1 || itd1000_vcorg[i].vcorg == 9))
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itd1000_write_reg(state, VCO_CHP1_I2C, vco_chp1_i2c | ((itd1000_vcorg[i].vcorg - 1) << 4));
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}
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break;
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}
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}
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}
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2008-04-28 18:39:09 +00:00
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static const struct {
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2008-04-13 18:49:22 +00:00
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u32 freq;
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u8 values[10]; /* RFTR, RFST1 - RFST9 */
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} itd1000_fre_values[] = {
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{ 1075000, { 0x59, 0x1d, 0x1c, 0x17, 0x16, 0x0f, 0x0e, 0x0c, 0x0b, 0x0a } },
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{ 1250000, { 0x89, 0x1e, 0x1d, 0x17, 0x15, 0x0f, 0x0e, 0x0c, 0x0b, 0x0a } },
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{ 1450000, { 0x89, 0x1e, 0x1d, 0x17, 0x15, 0x0f, 0x0e, 0x0c, 0x0b, 0x0a } },
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{ 1650000, { 0x69, 0x1e, 0x1d, 0x17, 0x15, 0x0f, 0x0e, 0x0c, 0x0b, 0x0a } },
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{ 1750000, { 0x69, 0x1e, 0x17, 0x15, 0x14, 0x0f, 0x0e, 0x0c, 0x0b, 0x0a } },
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{ 1850000, { 0x69, 0x1d, 0x17, 0x16, 0x14, 0x0f, 0x0e, 0x0d, 0x0b, 0x0a } },
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{ 1900000, { 0x69, 0x1d, 0x17, 0x15, 0x14, 0x0f, 0x0e, 0x0d, 0x0b, 0x0a } },
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{ 1950000, { 0x69, 0x1d, 0x17, 0x16, 0x14, 0x13, 0x0e, 0x0d, 0x0b, 0x0a } },
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{ 2050000, { 0x69, 0x1e, 0x1d, 0x17, 0x16, 0x14, 0x13, 0x0e, 0x0b, 0x0a } },
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{ 2150000, { 0x69, 0x1d, 0x1c, 0x17, 0x15, 0x14, 0x13, 0x0f, 0x0e, 0x0b } }
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};
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#define FREF 16
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static void itd1000_set_lo(struct itd1000_state *state, u32 freq_khz)
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{
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int i, j;
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u32 plln, pllf;
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u64 tmp;
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plln = (freq_khz * 1000) / 2 / FREF;
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/* Compute the factional part times 1000 */
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tmp = plln % 1000000;
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plln /= 1000000;
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tmp *= 1048576;
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do_div(tmp, 1000000);
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pllf = (u32) tmp;
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state->frequency = ((plln * 1000) + (pllf * 1000)/1048576) * 2*FREF;
|
2011-05-23 11:40:00 +00:00
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itd_dbg("frequency: %dkHz (wanted) %dkHz (set), PLLF = %d, PLLN = %d\n", freq_khz, state->frequency, pllf, plln);
|
2008-04-13 18:49:22 +00:00
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2012-09-06 15:09:13 +00:00
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itd1000_write_reg(state, PLLNH, 0x80); /* PLLNH */
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2008-04-13 18:49:22 +00:00
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itd1000_write_reg(state, PLLNL, plln & 0xff);
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itd1000_write_reg(state, PLLFH, (itd1000_read_reg(state, PLLFH) & 0xf0) | ((pllf >> 16) & 0x0f));
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itd1000_write_reg(state, PLLFM, (pllf >> 8) & 0xff);
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itd1000_write_reg(state, PLLFL, (pllf >> 0) & 0xff);
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for (i = 0; i < ARRAY_SIZE(itd1000_fre_values); i++) {
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if (freq_khz <= itd1000_fre_values[i].freq) {
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2011-05-23 11:40:00 +00:00
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itd_dbg("fre_values: %d\n", i);
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2008-04-13 18:49:22 +00:00
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itd1000_write_reg(state, RFTR, itd1000_fre_values[i].values[0]);
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for (j = 0; j < 9; j++)
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itd1000_write_reg(state, RFST1+j, itd1000_fre_values[i].values[j+1]);
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break;
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}
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}
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itd1000_set_vco(state, freq_khz);
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}
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2011-12-24 15:24:33 +00:00
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static int itd1000_set_parameters(struct dvb_frontend *fe)
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2008-04-13 18:49:22 +00:00
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{
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2011-12-23 21:03:51 +00:00
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struct dtv_frontend_properties *c = &fe->dtv_property_cache;
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2008-04-13 18:49:22 +00:00
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struct itd1000_state *state = fe->tuner_priv;
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u8 pllcon1;
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2011-12-23 21:03:51 +00:00
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itd1000_set_lo(state, c->frequency);
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itd1000_set_lpf_bw(state, c->symbol_rate);
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2008-04-13 18:49:22 +00:00
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pllcon1 = itd1000_read_reg(state, PLLCON1) & 0x7f;
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itd1000_write_reg(state, PLLCON1, pllcon1 | (1 << 7));
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itd1000_write_reg(state, PLLCON1, pllcon1);
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return 0;
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}
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static int itd1000_get_frequency(struct dvb_frontend *fe, u32 *frequency)
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{
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struct itd1000_state *state = fe->tuner_priv;
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*frequency = state->frequency;
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return 0;
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}
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static int itd1000_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth)
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{
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return 0;
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}
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static u8 itd1000_init_tab[][2] = {
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{ PLLCON1, 0x65 }, /* Register does not change */
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{ PLLNH, 0x80 }, /* Bits [7:6] do not change */
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{ RESERVED_0X6D, 0x3b },
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{ VCO_CHP2_I2C, 0x12 },
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{ 0x72, 0xf9 }, /* No such regsister defined */
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{ RESERVED_0X73, 0xff },
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{ RESERVED_0X74, 0xb2 },
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{ RESERVED_0X75, 0xc7 },
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{ EXTGVBBRF, 0xf0 },
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{ DIVAGCCK, 0x80 },
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{ BBTR, 0xa0 },
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{ RESERVED_0X7E, 0x4f },
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{ 0x82, 0x88 }, /* No such regsister defined */
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{ 0x83, 0x80 }, /* No such regsister defined */
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{ 0x84, 0x80 }, /* No such regsister defined */
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{ RESERVED_0X85, 0x74 },
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{ RESERVED_0X86, 0xff },
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{ RESERVED_0X88, 0x02 },
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{ RESERVED_0X89, 0x16 },
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{ RFST0, 0x1f },
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{ RESERVED_0X94, 0x66 },
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{ RESERVED_0X95, 0x66 },
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{ RESERVED_0X96, 0x77 },
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{ RESERVED_0X97, 0x99 },
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{ RESERVED_0X98, 0xff },
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{ RESERVED_0X99, 0xfc },
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{ RESERVED_0X9A, 0xba },
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{ RESERVED_0X9B, 0xaa },
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};
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static u8 itd1000_reinit_tab[][2] = {
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{ VCO_CHP1_I2C, 0x8a },
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{ BW, 0x87 },
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{ GVBB_I2C, 0x03 },
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{ BBGVMIN, 0x03 },
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{ CON1, 0x2e },
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};
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static int itd1000_init(struct dvb_frontend *fe)
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{
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struct itd1000_state *state = fe->tuner_priv;
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int i;
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for (i = 0; i < ARRAY_SIZE(itd1000_init_tab); i++)
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itd1000_write_reg(state, itd1000_init_tab[i][0], itd1000_init_tab[i][1]);
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for (i = 0; i < ARRAY_SIZE(itd1000_reinit_tab); i++)
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itd1000_write_reg(state, itd1000_reinit_tab[i][0], itd1000_reinit_tab[i][1]);
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return 0;
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}
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static int itd1000_sleep(struct dvb_frontend *fe)
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{
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return 0;
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}
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static int itd1000_release(struct dvb_frontend *fe)
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{
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kfree(fe->tuner_priv);
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fe->tuner_priv = NULL;
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return 0;
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}
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static const struct dvb_tuner_ops itd1000_tuner_ops = {
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.info = {
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.name = "Integrant ITD1000",
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.frequency_min = 950000,
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.frequency_max = 2150000,
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.frequency_step = 125, /* kHz for QPSK frontends */
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},
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.release = itd1000_release,
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.init = itd1000_init,
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.sleep = itd1000_sleep,
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.set_params = itd1000_set_parameters,
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.get_frequency = itd1000_get_frequency,
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.get_bandwidth = itd1000_get_bandwidth
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};
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struct dvb_frontend *itd1000_attach(struct dvb_frontend *fe, struct i2c_adapter *i2c, struct itd1000_config *cfg)
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{
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struct itd1000_state *state = NULL;
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u8 i = 0;
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state = kzalloc(sizeof(struct itd1000_state), GFP_KERNEL);
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if (state == NULL)
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return NULL;
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state->cfg = cfg;
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state->i2c = i2c;
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i = itd1000_read_reg(state, 0);
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if (i != 0) {
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kfree(state);
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return NULL;
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}
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2011-05-23 11:40:00 +00:00
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itd_info("successfully identified (ID: %d)\n", i);
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2008-04-13 18:49:22 +00:00
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memset(state->shadow, 0xff, sizeof(state->shadow));
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for (i = 0x65; i < 0x9c; i++)
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state->shadow[i] = itd1000_read_reg(state, i);
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memcpy(&fe->ops.tuner_ops, &itd1000_tuner_ops, sizeof(struct dvb_tuner_ops));
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fe->tuner_priv = state;
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return fe;
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}
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EXPORT_SYMBOL(itd1000_attach);
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MODULE_AUTHOR("Patrick Boettcher <pb@linuxtv.org>");
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MODULE_DESCRIPTION("Integrant ITD1000 driver");
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MODULE_LICENSE("GPL");
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