2020-03-13 19:42:46 +00:00
|
|
|
// SPDX-License-Identifier: GPL-2.0
|
|
|
|
/*
|
|
|
|
* Copyright (C) 2005, Intec Automation Inc.
|
|
|
|
* Copyright (C) 2014, Freescale Semiconductor, Inc.
|
|
|
|
*/
|
|
|
|
|
|
|
|
#include <linux/mtd/spi-nor.h>
|
|
|
|
|
|
|
|
#include "core.h"
|
|
|
|
|
2022-02-23 13:43:54 +00:00
|
|
|
#define SPINOR_OP_CLSR 0x30 /* Clear status register 1 */
|
2020-10-05 15:31:37 +00:00
|
|
|
#define SPINOR_OP_RD_ANY_REG 0x65 /* Read any register */
|
|
|
|
#define SPINOR_OP_WR_ANY_REG 0x71 /* Write any register */
|
|
|
|
#define SPINOR_REG_CYPRESS_CFR2V 0x00800003
|
|
|
|
#define SPINOR_REG_CYPRESS_CFR2V_MEMLAT_11_24 0xb
|
|
|
|
#define SPINOR_REG_CYPRESS_CFR3V 0x00800004
|
|
|
|
#define SPINOR_REG_CYPRESS_CFR3V_PGSZ BIT(4) /* Page size. */
|
|
|
|
#define SPINOR_REG_CYPRESS_CFR5V 0x00800006
|
|
|
|
#define SPINOR_REG_CYPRESS_CFR5V_OCT_DTR_EN 0x3
|
|
|
|
#define SPINOR_REG_CYPRESS_CFR5V_OCT_DTR_DS 0
|
|
|
|
#define SPINOR_OP_CYPRESS_RD_FAST 0xee
|
|
|
|
|
|
|
|
/**
|
2022-02-23 13:43:38 +00:00
|
|
|
* cypress_nor_octal_dtr_enable() - Enable octal DTR on Cypress flashes.
|
2020-10-05 15:31:37 +00:00
|
|
|
* @nor: pointer to a 'struct spi_nor'
|
|
|
|
* @enable: whether to enable or disable Octal DTR
|
|
|
|
*
|
|
|
|
* This also sets the memory access latency cycles to 24 to allow the flash to
|
|
|
|
* run at up to 200MHz.
|
|
|
|
*
|
|
|
|
* Return: 0 on success, -errno otherwise.
|
|
|
|
*/
|
2022-02-23 13:43:38 +00:00
|
|
|
static int cypress_nor_octal_dtr_enable(struct spi_nor *nor, bool enable)
|
2020-10-05 15:31:37 +00:00
|
|
|
{
|
|
|
|
struct spi_mem_op op;
|
|
|
|
u8 *buf = nor->bouncebuf;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
if (enable) {
|
|
|
|
/* Use 24 dummy cycles for memory array reads. */
|
|
|
|
ret = spi_nor_write_enable(nor);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
*buf = SPINOR_REG_CYPRESS_CFR2V_MEMLAT_11_24;
|
|
|
|
op = (struct spi_mem_op)
|
|
|
|
SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_WR_ANY_REG, 1),
|
|
|
|
SPI_MEM_OP_ADDR(3, SPINOR_REG_CYPRESS_CFR2V,
|
|
|
|
1),
|
|
|
|
SPI_MEM_OP_NO_DUMMY,
|
|
|
|
SPI_MEM_OP_DATA_OUT(1, buf, 1));
|
|
|
|
|
|
|
|
ret = spi_mem_exec_op(nor->spimem, &op);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
ret = spi_nor_wait_till_ready(nor);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
nor->read_dummy = 24;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Set/unset the octal and DTR enable bits. */
|
|
|
|
ret = spi_nor_write_enable(nor);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
2021-05-31 18:17:53 +00:00
|
|
|
if (enable) {
|
|
|
|
buf[0] = SPINOR_REG_CYPRESS_CFR5V_OCT_DTR_EN;
|
|
|
|
} else {
|
|
|
|
/*
|
|
|
|
* The register is 1-byte wide, but 1-byte transactions are not
|
|
|
|
* allowed in 8D-8D-8D mode. Since there is no register at the
|
|
|
|
* next location, just initialize the value to 0 and let the
|
|
|
|
* transaction go on.
|
|
|
|
*/
|
|
|
|
buf[0] = SPINOR_REG_CYPRESS_CFR5V_OCT_DTR_DS;
|
|
|
|
buf[1] = 0;
|
|
|
|
}
|
2020-10-05 15:31:37 +00:00
|
|
|
|
|
|
|
op = (struct spi_mem_op)
|
|
|
|
SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_WR_ANY_REG, 1),
|
|
|
|
SPI_MEM_OP_ADDR(enable ? 3 : 4,
|
|
|
|
SPINOR_REG_CYPRESS_CFR5V,
|
|
|
|
1),
|
|
|
|
SPI_MEM_OP_NO_DUMMY,
|
2021-05-31 18:17:53 +00:00
|
|
|
SPI_MEM_OP_DATA_OUT(enable ? 1 : 2, buf, 1));
|
2020-10-05 15:31:37 +00:00
|
|
|
|
|
|
|
if (!enable)
|
|
|
|
spi_nor_spimem_setup_op(nor, &op, SNOR_PROTO_8_8_8_DTR);
|
|
|
|
|
|
|
|
ret = spi_mem_exec_op(nor->spimem, &op);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
/* Read flash ID to make sure the switch was successful. */
|
|
|
|
op = (struct spi_mem_op)
|
|
|
|
SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RDID, 1),
|
|
|
|
SPI_MEM_OP_ADDR(enable ? 4 : 0, 0, 1),
|
|
|
|
SPI_MEM_OP_DUMMY(enable ? 3 : 0, 1),
|
|
|
|
SPI_MEM_OP_DATA_IN(round_up(nor->info->id_len, 2),
|
|
|
|
buf, 1));
|
|
|
|
|
|
|
|
if (enable)
|
|
|
|
spi_nor_spimem_setup_op(nor, &op, SNOR_PROTO_8_8_8_DTR);
|
|
|
|
|
|
|
|
ret = spi_mem_exec_op(nor->spimem, &op);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
if (memcmp(buf, nor->info->id, nor->info->id_len))
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void s28hs512t_default_init(struct spi_nor *nor)
|
|
|
|
{
|
2022-02-23 13:43:38 +00:00
|
|
|
nor->params->octal_dtr_enable = cypress_nor_octal_dtr_enable;
|
2020-12-01 10:27:11 +00:00
|
|
|
nor->params->writesize = 16;
|
2020-10-05 15:31:37 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static void s28hs512t_post_sfdp_fixup(struct spi_nor *nor)
|
|
|
|
{
|
|
|
|
/*
|
|
|
|
* On older versions of the flash the xSPI Profile 1.0 table has the
|
|
|
|
* 8D-8D-8D Fast Read opcode as 0x00. But it actually should be 0xEE.
|
|
|
|
*/
|
|
|
|
if (nor->params->reads[SNOR_CMD_READ_8_8_8_DTR].opcode == 0)
|
|
|
|
nor->params->reads[SNOR_CMD_READ_8_8_8_DTR].opcode =
|
|
|
|
SPINOR_OP_CYPRESS_RD_FAST;
|
|
|
|
|
|
|
|
/* This flash is also missing the 4-byte Page Program opcode bit. */
|
|
|
|
spi_nor_set_pp_settings(&nor->params->page_programs[SNOR_CMD_PP],
|
|
|
|
SPINOR_OP_PP_4B, SNOR_PROTO_1_1_1);
|
|
|
|
/*
|
|
|
|
* Since xSPI Page Program opcode is backward compatible with
|
|
|
|
* Legacy SPI, use Legacy SPI opcode there as well.
|
|
|
|
*/
|
|
|
|
spi_nor_set_pp_settings(&nor->params->page_programs[SNOR_CMD_PP_8_8_8_DTR],
|
|
|
|
SPINOR_OP_PP_4B, SNOR_PROTO_8_8_8_DTR);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* The xSPI Profile 1.0 table advertises the number of additional
|
|
|
|
* address bytes needed for Read Status Register command as 0 but the
|
|
|
|
* actual value for that is 4.
|
|
|
|
*/
|
|
|
|
nor->params->rdsr_addr_nbytes = 4;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int s28hs512t_post_bfpt_fixup(struct spi_nor *nor,
|
|
|
|
const struct sfdp_parameter_header *bfpt_header,
|
2021-03-06 09:50:00 +00:00
|
|
|
const struct sfdp_bfpt *bfpt)
|
2020-10-05 15:31:37 +00:00
|
|
|
{
|
|
|
|
/*
|
|
|
|
* The BFPT table advertises a 512B page size but the page size is
|
|
|
|
* actually configurable (with the default being 256B). Read from
|
|
|
|
* CFR3V[4] and set the correct size.
|
|
|
|
*/
|
|
|
|
struct spi_mem_op op =
|
|
|
|
SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RD_ANY_REG, 1),
|
|
|
|
SPI_MEM_OP_ADDR(3, SPINOR_REG_CYPRESS_CFR3V, 1),
|
|
|
|
SPI_MEM_OP_NO_DUMMY,
|
|
|
|
SPI_MEM_OP_DATA_IN(1, nor->bouncebuf, 1));
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
ret = spi_mem_exec_op(nor->spimem, &op);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
if (nor->bouncebuf[0] & SPINOR_REG_CYPRESS_CFR3V_PGSZ)
|
2021-03-06 09:50:00 +00:00
|
|
|
nor->params->page_size = 512;
|
2020-10-05 15:31:37 +00:00
|
|
|
else
|
2021-03-06 09:50:00 +00:00
|
|
|
nor->params->page_size = 256;
|
2020-10-05 15:31:37 +00:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2021-11-06 10:29:15 +00:00
|
|
|
static const struct spi_nor_fixups s28hs512t_fixups = {
|
2020-10-05 15:31:37 +00:00
|
|
|
.default_init = s28hs512t_default_init,
|
|
|
|
.post_sfdp = s28hs512t_post_sfdp_fixup,
|
|
|
|
.post_bfpt = s28hs512t_post_bfpt_fixup,
|
|
|
|
};
|
|
|
|
|
2020-04-20 19:13:58 +00:00
|
|
|
static int
|
2022-02-23 13:43:38 +00:00
|
|
|
s25fs_s_nor_post_bfpt_fixups(struct spi_nor *nor,
|
|
|
|
const struct sfdp_parameter_header *bfpt_header,
|
|
|
|
const struct sfdp_bfpt *bfpt)
|
2020-04-20 19:13:58 +00:00
|
|
|
{
|
|
|
|
/*
|
|
|
|
* The S25FS-S chip family reports 512-byte pages in BFPT but
|
|
|
|
* in reality the write buffer still wraps at the safe default
|
|
|
|
* of 256 bytes. Overwrite the page size advertised by BFPT
|
|
|
|
* to get the writes working.
|
|
|
|
*/
|
2021-03-06 09:50:00 +00:00
|
|
|
nor->params->page_size = 256;
|
2020-04-20 19:13:58 +00:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2022-02-23 13:43:38 +00:00
|
|
|
static const struct spi_nor_fixups s25fs_s_nor_fixups = {
|
|
|
|
.post_bfpt = s25fs_s_nor_post_bfpt_fixups,
|
2020-04-20 19:13:58 +00:00
|
|
|
};
|
|
|
|
|
2022-02-23 13:43:38 +00:00
|
|
|
static const struct flash_info spansion_nor_parts[] = {
|
2020-03-13 19:42:46 +00:00
|
|
|
/* Spansion/Cypress -- single (large) sector size only, at least
|
|
|
|
* for the chips listed here (without boot sectors).
|
|
|
|
*/
|
mtd: spi-nor: Rework the flash_info flags
Clarify for what the flash_info flags are used for. Split them in
four categories and a bool:
1/ FLAGS: flags that indicate support that is not defined by the JESD216
standard in its SFDP tables.
2/ NO_SFDP_FLAGS: these flags are used when the flash does not define the
SFDP tables. These flags indicate support that can be discovered via
SFDP. Used together with SPI_NOR_SKIP_SFDP flag.
3/ FIXUP_FLAGS: flags that indicate support that can be discovered
via SFDP ideally, but can not be discovered for this particular flash
because the SFDP table that indicates this support is not defined by
the flash. In case the table for this support is defined but has wrong
values, one should instead use a post_sfdp() hook to set the SNOR_F
equivalent flag.
4/ MFR_FLAGS: manufacturer private flags. Used in the manufacturer
fixup hooks to differentiate support between flashes of the same
manufacturer.
5/ PARSE_SFDP: sets info->parse_sfdp to true. All flash_info entries
that support SFDP should be converted to set info->parse_sfdp to true.
SPI NOR flashes that statically declare one of the
SPI_NOR_{DUAL, QUAD, OCTAL, OCTAL_DTR}_READ flags and do not support
the RDSFDP command are gratuiously receiving the RDSFDP command
in the attempt of parsing the SFDP tables. It is not desirable to issue
commands that are not supported, so introduce PARSE_SFDP to help on this
situation.
New flash additions/updates should be declared/updated to use either
PARSE_SFDP or SPI_NOR_SKIP_SFDP. Once all the flash_info entries are
converted to use SPI_NOR_SKIP_SFDP or PARSE_SFDP, we can get rid of the
SPI_NOR_SKIP_SFDP flag and use just the bool nor->info->parse_sfdp to
determine whether to parse SFDP or not. SPI_NOR_SKIP_SFDP flag is kept
just as a way to differentiate whether a flash is converted to the new
flags logic or not.
Support that can be discovered when parsing SFDP should not be duplicated
by explicit flags at flash declaration. All the flash parameters will be
discovered when parsing SFDP. Sometimes manufacturers wrongly define some
fields in the SFDP tables. If that's the case, SFDP data can be amended
with the fixups() hooks. It is not common, but if the SFDP tables are
entirely wrong, and it does not worth the hassle to tweak the SFDP
parameters by using the fixups hooks, or if the flash does not define the
SFDP tables at all, then statically init the flash with the
SPI_NOR_SKIP_SFDP flag and specify the rest of flash capabilities with
the flash info flags.
With time, we want to convert all flashes to use PARSE_SFDP and
stop triggering the SFDP parsing with the
SPI_NOR_{DUAL, QUAD, OCTAL*}_READ flags. Getting rid of the
SPI_NOR_{OCTAL, OCTAL_DTR}_READ trigger is easily achievable,
the rest are a long term goal.
Manufacturer specific flags like USE_CLSR, USE_FSR, SPI_NOR_XSR_RDY,
will be removed in a future series.
No functional changes intended in this patch.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
Link: https://lore.kernel.org/r/20211207140254.87681-7-tudor.ambarus@microchip.com
2021-12-07 14:02:46 +00:00
|
|
|
{ "s25sl032p", INFO(0x010215, 0x4d00, 64 * 1024, 64)
|
|
|
|
NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
|
|
|
|
{ "s25sl064p", INFO(0x010216, 0x4d00, 64 * 1024, 128)
|
|
|
|
NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
|
|
|
|
{ "s25fl128s0", INFO6(0x012018, 0x4d0080, 256 * 1024, 64)
|
|
|
|
FLAGS(USE_CLSR)
|
|
|
|
NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
|
|
|
|
{ "s25fl128s1", INFO6(0x012018, 0x4d0180, 64 * 1024, 256)
|
|
|
|
FLAGS(USE_CLSR)
|
|
|
|
NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
|
|
|
|
{ "s25fl256s0", INFO6(0x010219, 0x4d0080, 256 * 1024, 128)
|
|
|
|
FLAGS(USE_CLSR)
|
2021-12-07 14:02:52 +00:00
|
|
|
NO_SFDP_FLAGS(SPI_NOR_SKIP_SFDP | SPI_NOR_DUAL_READ |
|
|
|
|
SPI_NOR_QUAD_READ) },
|
mtd: spi-nor: Rework the flash_info flags
Clarify for what the flash_info flags are used for. Split them in
four categories and a bool:
1/ FLAGS: flags that indicate support that is not defined by the JESD216
standard in its SFDP tables.
2/ NO_SFDP_FLAGS: these flags are used when the flash does not define the
SFDP tables. These flags indicate support that can be discovered via
SFDP. Used together with SPI_NOR_SKIP_SFDP flag.
3/ FIXUP_FLAGS: flags that indicate support that can be discovered
via SFDP ideally, but can not be discovered for this particular flash
because the SFDP table that indicates this support is not defined by
the flash. In case the table for this support is defined but has wrong
values, one should instead use a post_sfdp() hook to set the SNOR_F
equivalent flag.
4/ MFR_FLAGS: manufacturer private flags. Used in the manufacturer
fixup hooks to differentiate support between flashes of the same
manufacturer.
5/ PARSE_SFDP: sets info->parse_sfdp to true. All flash_info entries
that support SFDP should be converted to set info->parse_sfdp to true.
SPI NOR flashes that statically declare one of the
SPI_NOR_{DUAL, QUAD, OCTAL, OCTAL_DTR}_READ flags and do not support
the RDSFDP command are gratuiously receiving the RDSFDP command
in the attempt of parsing the SFDP tables. It is not desirable to issue
commands that are not supported, so introduce PARSE_SFDP to help on this
situation.
New flash additions/updates should be declared/updated to use either
PARSE_SFDP or SPI_NOR_SKIP_SFDP. Once all the flash_info entries are
converted to use SPI_NOR_SKIP_SFDP or PARSE_SFDP, we can get rid of the
SPI_NOR_SKIP_SFDP flag and use just the bool nor->info->parse_sfdp to
determine whether to parse SFDP or not. SPI_NOR_SKIP_SFDP flag is kept
just as a way to differentiate whether a flash is converted to the new
flags logic or not.
Support that can be discovered when parsing SFDP should not be duplicated
by explicit flags at flash declaration. All the flash parameters will be
discovered when parsing SFDP. Sometimes manufacturers wrongly define some
fields in the SFDP tables. If that's the case, SFDP data can be amended
with the fixups() hooks. It is not common, but if the SFDP tables are
entirely wrong, and it does not worth the hassle to tweak the SFDP
parameters by using the fixups hooks, or if the flash does not define the
SFDP tables at all, then statically init the flash with the
SPI_NOR_SKIP_SFDP flag and specify the rest of flash capabilities with
the flash info flags.
With time, we want to convert all flashes to use PARSE_SFDP and
stop triggering the SFDP parsing with the
SPI_NOR_{DUAL, QUAD, OCTAL*}_READ flags. Getting rid of the
SPI_NOR_{OCTAL, OCTAL_DTR}_READ trigger is easily achievable,
the rest are a long term goal.
Manufacturer specific flags like USE_CLSR, USE_FSR, SPI_NOR_XSR_RDY,
will be removed in a future series.
No functional changes intended in this patch.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
Link: https://lore.kernel.org/r/20211207140254.87681-7-tudor.ambarus@microchip.com
2021-12-07 14:02:46 +00:00
|
|
|
{ "s25fl256s1", INFO6(0x010219, 0x4d0180, 64 * 1024, 512)
|
|
|
|
FLAGS(USE_CLSR)
|
|
|
|
NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
|
|
|
|
{ "s25fl512s", INFO6(0x010220, 0x4d0080, 256 * 1024, 256)
|
|
|
|
FLAGS(SPI_NOR_HAS_LOCK | USE_CLSR)
|
|
|
|
NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
|
|
|
|
{ "s25fs128s1", INFO6(0x012018, 0x4d0181, 64 * 1024, 256)
|
|
|
|
FLAGS(USE_CLSR)
|
|
|
|
NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)
|
2022-02-23 13:43:38 +00:00
|
|
|
.fixups = &s25fs_s_nor_fixups, },
|
mtd: spi-nor: Rework the flash_info flags
Clarify for what the flash_info flags are used for. Split them in
four categories and a bool:
1/ FLAGS: flags that indicate support that is not defined by the JESD216
standard in its SFDP tables.
2/ NO_SFDP_FLAGS: these flags are used when the flash does not define the
SFDP tables. These flags indicate support that can be discovered via
SFDP. Used together with SPI_NOR_SKIP_SFDP flag.
3/ FIXUP_FLAGS: flags that indicate support that can be discovered
via SFDP ideally, but can not be discovered for this particular flash
because the SFDP table that indicates this support is not defined by
the flash. In case the table for this support is defined but has wrong
values, one should instead use a post_sfdp() hook to set the SNOR_F
equivalent flag.
4/ MFR_FLAGS: manufacturer private flags. Used in the manufacturer
fixup hooks to differentiate support between flashes of the same
manufacturer.
5/ PARSE_SFDP: sets info->parse_sfdp to true. All flash_info entries
that support SFDP should be converted to set info->parse_sfdp to true.
SPI NOR flashes that statically declare one of the
SPI_NOR_{DUAL, QUAD, OCTAL, OCTAL_DTR}_READ flags and do not support
the RDSFDP command are gratuiously receiving the RDSFDP command
in the attempt of parsing the SFDP tables. It is not desirable to issue
commands that are not supported, so introduce PARSE_SFDP to help on this
situation.
New flash additions/updates should be declared/updated to use either
PARSE_SFDP or SPI_NOR_SKIP_SFDP. Once all the flash_info entries are
converted to use SPI_NOR_SKIP_SFDP or PARSE_SFDP, we can get rid of the
SPI_NOR_SKIP_SFDP flag and use just the bool nor->info->parse_sfdp to
determine whether to parse SFDP or not. SPI_NOR_SKIP_SFDP flag is kept
just as a way to differentiate whether a flash is converted to the new
flags logic or not.
Support that can be discovered when parsing SFDP should not be duplicated
by explicit flags at flash declaration. All the flash parameters will be
discovered when parsing SFDP. Sometimes manufacturers wrongly define some
fields in the SFDP tables. If that's the case, SFDP data can be amended
with the fixups() hooks. It is not common, but if the SFDP tables are
entirely wrong, and it does not worth the hassle to tweak the SFDP
parameters by using the fixups hooks, or if the flash does not define the
SFDP tables at all, then statically init the flash with the
SPI_NOR_SKIP_SFDP flag and specify the rest of flash capabilities with
the flash info flags.
With time, we want to convert all flashes to use PARSE_SFDP and
stop triggering the SFDP parsing with the
SPI_NOR_{DUAL, QUAD, OCTAL*}_READ flags. Getting rid of the
SPI_NOR_{OCTAL, OCTAL_DTR}_READ trigger is easily achievable,
the rest are a long term goal.
Manufacturer specific flags like USE_CLSR, USE_FSR, SPI_NOR_XSR_RDY,
will be removed in a future series.
No functional changes intended in this patch.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
Link: https://lore.kernel.org/r/20211207140254.87681-7-tudor.ambarus@microchip.com
2021-12-07 14:02:46 +00:00
|
|
|
{ "s25fs256s0", INFO6(0x010219, 0x4d0081, 256 * 1024, 128)
|
|
|
|
FLAGS(USE_CLSR)
|
|
|
|
NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
|
|
|
|
{ "s25fs256s1", INFO6(0x010219, 0x4d0181, 64 * 1024, 512)
|
|
|
|
FLAGS(USE_CLSR)
|
|
|
|
NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
|
|
|
|
{ "s25fs512s", INFO6(0x010220, 0x4d0081, 256 * 1024, 256)
|
|
|
|
FLAGS(USE_CLSR)
|
|
|
|
NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)
|
2022-02-23 13:43:38 +00:00
|
|
|
.fixups = &s25fs_s_nor_fixups, },
|
mtd: spi-nor: Rework the flash_info flags
Clarify for what the flash_info flags are used for. Split them in
four categories and a bool:
1/ FLAGS: flags that indicate support that is not defined by the JESD216
standard in its SFDP tables.
2/ NO_SFDP_FLAGS: these flags are used when the flash does not define the
SFDP tables. These flags indicate support that can be discovered via
SFDP. Used together with SPI_NOR_SKIP_SFDP flag.
3/ FIXUP_FLAGS: flags that indicate support that can be discovered
via SFDP ideally, but can not be discovered for this particular flash
because the SFDP table that indicates this support is not defined by
the flash. In case the table for this support is defined but has wrong
values, one should instead use a post_sfdp() hook to set the SNOR_F
equivalent flag.
4/ MFR_FLAGS: manufacturer private flags. Used in the manufacturer
fixup hooks to differentiate support between flashes of the same
manufacturer.
5/ PARSE_SFDP: sets info->parse_sfdp to true. All flash_info entries
that support SFDP should be converted to set info->parse_sfdp to true.
SPI NOR flashes that statically declare one of the
SPI_NOR_{DUAL, QUAD, OCTAL, OCTAL_DTR}_READ flags and do not support
the RDSFDP command are gratuiously receiving the RDSFDP command
in the attempt of parsing the SFDP tables. It is not desirable to issue
commands that are not supported, so introduce PARSE_SFDP to help on this
situation.
New flash additions/updates should be declared/updated to use either
PARSE_SFDP or SPI_NOR_SKIP_SFDP. Once all the flash_info entries are
converted to use SPI_NOR_SKIP_SFDP or PARSE_SFDP, we can get rid of the
SPI_NOR_SKIP_SFDP flag and use just the bool nor->info->parse_sfdp to
determine whether to parse SFDP or not. SPI_NOR_SKIP_SFDP flag is kept
just as a way to differentiate whether a flash is converted to the new
flags logic or not.
Support that can be discovered when parsing SFDP should not be duplicated
by explicit flags at flash declaration. All the flash parameters will be
discovered when parsing SFDP. Sometimes manufacturers wrongly define some
fields in the SFDP tables. If that's the case, SFDP data can be amended
with the fixups() hooks. It is not common, but if the SFDP tables are
entirely wrong, and it does not worth the hassle to tweak the SFDP
parameters by using the fixups hooks, or if the flash does not define the
SFDP tables at all, then statically init the flash with the
SPI_NOR_SKIP_SFDP flag and specify the rest of flash capabilities with
the flash info flags.
With time, we want to convert all flashes to use PARSE_SFDP and
stop triggering the SFDP parsing with the
SPI_NOR_{DUAL, QUAD, OCTAL*}_READ flags. Getting rid of the
SPI_NOR_{OCTAL, OCTAL_DTR}_READ trigger is easily achievable,
the rest are a long term goal.
Manufacturer specific flags like USE_CLSR, USE_FSR, SPI_NOR_XSR_RDY,
will be removed in a future series.
No functional changes intended in this patch.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
Link: https://lore.kernel.org/r/20211207140254.87681-7-tudor.ambarus@microchip.com
2021-12-07 14:02:46 +00:00
|
|
|
{ "s25sl12800", INFO(0x012018, 0x0300, 256 * 1024, 64) },
|
|
|
|
{ "s25sl12801", INFO(0x012018, 0x0301, 64 * 1024, 256) },
|
|
|
|
{ "s25fl129p0", INFO(0x012018, 0x4d00, 256 * 1024, 64)
|
|
|
|
FLAGS(USE_CLSR)
|
|
|
|
NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
|
|
|
|
{ "s25fl129p1", INFO(0x012018, 0x4d01, 64 * 1024, 256)
|
|
|
|
FLAGS(USE_CLSR)
|
|
|
|
NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
|
|
|
|
{ "s25sl004a", INFO(0x010212, 0, 64 * 1024, 8) },
|
|
|
|
{ "s25sl008a", INFO(0x010213, 0, 64 * 1024, 16) },
|
|
|
|
{ "s25sl016a", INFO(0x010214, 0, 64 * 1024, 32) },
|
|
|
|
{ "s25sl032a", INFO(0x010215, 0, 64 * 1024, 64) },
|
|
|
|
{ "s25sl064a", INFO(0x010216, 0, 64 * 1024, 128) },
|
|
|
|
{ "s25fl004k", INFO(0xef4013, 0, 64 * 1024, 8)
|
|
|
|
NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ |
|
|
|
|
SPI_NOR_QUAD_READ) },
|
|
|
|
{ "s25fl008k", INFO(0xef4014, 0, 64 * 1024, 16)
|
|
|
|
NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ |
|
|
|
|
SPI_NOR_QUAD_READ) },
|
|
|
|
{ "s25fl016k", INFO(0xef4015, 0, 64 * 1024, 32)
|
|
|
|
NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ |
|
|
|
|
SPI_NOR_QUAD_READ) },
|
|
|
|
{ "s25fl064k", INFO(0xef4017, 0, 64 * 1024, 128)
|
|
|
|
NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ |
|
|
|
|
SPI_NOR_QUAD_READ) },
|
|
|
|
{ "s25fl116k", INFO(0x014015, 0, 64 * 1024, 32)
|
|
|
|
NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ |
|
|
|
|
SPI_NOR_QUAD_READ) },
|
|
|
|
{ "s25fl132k", INFO(0x014016, 0, 64 * 1024, 64)
|
|
|
|
NO_SFDP_FLAGS(SECT_4K) },
|
|
|
|
{ "s25fl164k", INFO(0x014017, 0, 64 * 1024, 128)
|
|
|
|
NO_SFDP_FLAGS(SECT_4K) },
|
|
|
|
{ "s25fl204k", INFO(0x014013, 0, 64 * 1024, 8)
|
|
|
|
NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ) },
|
|
|
|
{ "s25fl208k", INFO(0x014014, 0, 64 * 1024, 16)
|
|
|
|
NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ) },
|
|
|
|
{ "s25fl064l", INFO(0x016017, 0, 64 * 1024, 128)
|
|
|
|
NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)
|
|
|
|
FIXUP_FLAGS(SPI_NOR_4B_OPCODES) },
|
|
|
|
{ "s25fl128l", INFO(0x016018, 0, 64 * 1024, 256)
|
|
|
|
NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)
|
|
|
|
FIXUP_FLAGS(SPI_NOR_4B_OPCODES) },
|
|
|
|
{ "s25fl256l", INFO(0x016019, 0, 64 * 1024, 512)
|
|
|
|
NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)
|
|
|
|
FIXUP_FLAGS(SPI_NOR_4B_OPCODES) },
|
|
|
|
{ "cy15x104q", INFO6(0x042cc2, 0x7f7f7f, 512 * 1024, 1)
|
|
|
|
FLAGS(SPI_NOR_NO_ERASE) },
|
|
|
|
{ "s28hs512t", INFO(0x345b1a, 0, 256 * 1024, 256)
|
|
|
|
NO_SFDP_FLAGS(SECT_4K | SPI_NOR_OCTAL_DTR_READ |
|
2020-10-05 15:31:37 +00:00
|
|
|
SPI_NOR_OCTAL_DTR_PP)
|
mtd: spi-nor: Rework the flash_info flags
Clarify for what the flash_info flags are used for. Split them in
four categories and a bool:
1/ FLAGS: flags that indicate support that is not defined by the JESD216
standard in its SFDP tables.
2/ NO_SFDP_FLAGS: these flags are used when the flash does not define the
SFDP tables. These flags indicate support that can be discovered via
SFDP. Used together with SPI_NOR_SKIP_SFDP flag.
3/ FIXUP_FLAGS: flags that indicate support that can be discovered
via SFDP ideally, but can not be discovered for this particular flash
because the SFDP table that indicates this support is not defined by
the flash. In case the table for this support is defined but has wrong
values, one should instead use a post_sfdp() hook to set the SNOR_F
equivalent flag.
4/ MFR_FLAGS: manufacturer private flags. Used in the manufacturer
fixup hooks to differentiate support between flashes of the same
manufacturer.
5/ PARSE_SFDP: sets info->parse_sfdp to true. All flash_info entries
that support SFDP should be converted to set info->parse_sfdp to true.
SPI NOR flashes that statically declare one of the
SPI_NOR_{DUAL, QUAD, OCTAL, OCTAL_DTR}_READ flags and do not support
the RDSFDP command are gratuiously receiving the RDSFDP command
in the attempt of parsing the SFDP tables. It is not desirable to issue
commands that are not supported, so introduce PARSE_SFDP to help on this
situation.
New flash additions/updates should be declared/updated to use either
PARSE_SFDP or SPI_NOR_SKIP_SFDP. Once all the flash_info entries are
converted to use SPI_NOR_SKIP_SFDP or PARSE_SFDP, we can get rid of the
SPI_NOR_SKIP_SFDP flag and use just the bool nor->info->parse_sfdp to
determine whether to parse SFDP or not. SPI_NOR_SKIP_SFDP flag is kept
just as a way to differentiate whether a flash is converted to the new
flags logic or not.
Support that can be discovered when parsing SFDP should not be duplicated
by explicit flags at flash declaration. All the flash parameters will be
discovered when parsing SFDP. Sometimes manufacturers wrongly define some
fields in the SFDP tables. If that's the case, SFDP data can be amended
with the fixups() hooks. It is not common, but if the SFDP tables are
entirely wrong, and it does not worth the hassle to tweak the SFDP
parameters by using the fixups hooks, or if the flash does not define the
SFDP tables at all, then statically init the flash with the
SPI_NOR_SKIP_SFDP flag and specify the rest of flash capabilities with
the flash info flags.
With time, we want to convert all flashes to use PARSE_SFDP and
stop triggering the SFDP parsing with the
SPI_NOR_{DUAL, QUAD, OCTAL*}_READ flags. Getting rid of the
SPI_NOR_{OCTAL, OCTAL_DTR}_READ trigger is easily achievable,
the rest are a long term goal.
Manufacturer specific flags like USE_CLSR, USE_FSR, SPI_NOR_XSR_RDY,
will be removed in a future series.
No functional changes intended in this patch.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
Link: https://lore.kernel.org/r/20211207140254.87681-7-tudor.ambarus@microchip.com
2021-12-07 14:02:46 +00:00
|
|
|
.fixups = &s28hs512t_fixups,
|
2020-10-05 15:31:37 +00:00
|
|
|
},
|
2020-03-13 19:42:46 +00:00
|
|
|
};
|
|
|
|
|
2022-02-23 13:43:54 +00:00
|
|
|
/**
|
|
|
|
* spi_nor_clear_sr() - Clear the Status Register.
|
|
|
|
* @nor: pointer to 'struct spi_nor'.
|
|
|
|
*/
|
|
|
|
static void spi_nor_clear_sr(struct spi_nor *nor)
|
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
if (nor->spimem) {
|
|
|
|
struct spi_mem_op op =
|
|
|
|
SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_CLSR, 0),
|
|
|
|
SPI_MEM_OP_NO_ADDR,
|
|
|
|
SPI_MEM_OP_NO_DUMMY,
|
|
|
|
SPI_MEM_OP_NO_DATA);
|
|
|
|
|
|
|
|
spi_nor_spimem_setup_op(nor, &op, nor->reg_proto);
|
|
|
|
|
|
|
|
ret = spi_mem_exec_op(nor->spimem, &op);
|
|
|
|
} else {
|
|
|
|
ret = spi_nor_controller_ops_write_reg(nor, SPINOR_OP_CLSR,
|
|
|
|
NULL, 0);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (ret)
|
|
|
|
dev_dbg(nor->dev, "error %d clearing SR\n", ret);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* spi_nor_sr_ready_and_clear() - Query the Status Register to see if the flash
|
|
|
|
* is ready for new commands and clear it if there are any errors.
|
|
|
|
* @nor: pointer to 'struct spi_nor'.
|
|
|
|
*
|
|
|
|
* Return: 1 if ready, 0 if not ready, -errno on errors.
|
|
|
|
*/
|
|
|
|
static int spi_nor_sr_ready_and_clear(struct spi_nor *nor)
|
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
ret = spi_nor_read_sr(nor, nor->bouncebuf);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
if (nor->bouncebuf[0] & (SR_E_ERR | SR_P_ERR)) {
|
|
|
|
if (nor->bouncebuf[0] & SR_E_ERR)
|
|
|
|
dev_err(nor->dev, "Erase Error occurred\n");
|
|
|
|
else
|
|
|
|
dev_err(nor->dev, "Programming Error occurred\n");
|
|
|
|
|
|
|
|
spi_nor_clear_sr(nor);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* WEL bit remains set to one when an erase or page program
|
|
|
|
* error occurs. Issue a Write Disable command to protect
|
|
|
|
* against inadvertent writes that can possibly corrupt the
|
|
|
|
* contents of the memory.
|
|
|
|
*/
|
|
|
|
ret = spi_nor_write_disable(nor);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
return -EIO;
|
|
|
|
}
|
|
|
|
|
|
|
|
return !(nor->bouncebuf[0] & SR_WIP);
|
|
|
|
}
|
|
|
|
|
2022-02-23 13:43:38 +00:00
|
|
|
static void spansion_nor_late_init(struct spi_nor *nor)
|
2020-03-13 19:42:46 +00:00
|
|
|
{
|
2022-02-23 13:43:53 +00:00
|
|
|
if (nor->params->size > SZ_16M) {
|
|
|
|
nor->flags |= SNOR_F_4B_OPCODES;
|
|
|
|
/* No small sector erase for 4-byte command set */
|
|
|
|
nor->erase_opcode = SPINOR_OP_SE;
|
|
|
|
nor->mtd.erasesize = nor->info->sector_size;
|
|
|
|
}
|
2022-02-23 13:43:54 +00:00
|
|
|
|
|
|
|
if (nor->flags & SNOR_F_USE_CLSR)
|
|
|
|
nor->params->ready = spi_nor_sr_ready_and_clear;
|
2020-03-13 19:42:46 +00:00
|
|
|
}
|
|
|
|
|
2022-02-23 13:43:38 +00:00
|
|
|
static const struct spi_nor_fixups spansion_nor_fixups = {
|
|
|
|
.late_init = spansion_nor_late_init,
|
2020-03-13 19:42:46 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
const struct spi_nor_manufacturer spi_nor_spansion = {
|
|
|
|
.name = "spansion",
|
2022-02-23 13:43:38 +00:00
|
|
|
.parts = spansion_nor_parts,
|
|
|
|
.nparts = ARRAY_SIZE(spansion_nor_parts),
|
|
|
|
.fixups = &spansion_nor_fixups,
|
2020-03-13 19:42:46 +00:00
|
|
|
};
|