[PATCH] avr32 architecture
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
CPU and the AT32STK1000 development board.
AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
cost-sensitive embedded applications, with particular emphasis on low power
consumption and high code density. The AVR32 architecture is not binary
compatible with earlier 8-bit AVR architectures.
The AVR32 architecture, including the instruction set, is described by the
AVR32 Architecture Manual, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf
The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture. It
features a 7-stage pipeline, 16KB instruction and data caches and a full
Memory Management Unit. It also comes with a large set of integrated
peripherals, many of which are shared with the AT91 ARM-based controllers from
Atmel.
Full data sheet is available from
http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
while the CPU core implementation including caches and MMU is documented by
the AVR32 AP Technical Reference, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf
Information about the AT32STK1000 development board can be found at
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918
including a BSP CD image with an earlier version of this patch, development
tools (binaries and source/patches) and a root filesystem image suitable for
booting from SD card.
Alternatively, there's a preliminary "getting started" guide available at
http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
to the sources and patches you will need in order to set up a cross-compiling
environment for avr32-linux.
This patch, as well as the other patches included with the BSP and the
toolchain patches, is actively supported by Atmel Corporation.
[dmccr@us.ibm.com: Fix more pxx_page macro locations]
[bunk@stusta.de: fix `make defconfig']
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Dave McCracken <dmccr@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-09-26 06:32:13 +00:00
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#ifndef __ASM_AVR32_IOCTLS_H
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#define __ASM_AVR32_IOCTLS_H
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#include <asm/ioctl.h>
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/* 0x54 is just a magic number to make these relatively unique ('T') */
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#define TCGETS 0x5401
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#define TCSETS 0x5402 /* Clashes with SNDCTL_TMR_START sound ioctl */
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#define TCSETSW 0x5403
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#define TCSETSF 0x5404
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#define TCGETA 0x5405
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#define TCSETA 0x5406
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#define TCSETAW 0x5407
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#define TCSETAF 0x5408
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#define TCSBRK 0x5409
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#define TCXONC 0x540A
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#define TCFLSH 0x540B
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#define TIOCEXCL 0x540C
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#define TIOCNXCL 0x540D
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#define TIOCSCTTY 0x540E
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#define TIOCGPGRP 0x540F
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#define TIOCSPGRP 0x5410
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#define TIOCOUTQ 0x5411
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#define TIOCSTI 0x5412
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#define TIOCGWINSZ 0x5413
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#define TIOCSWINSZ 0x5414
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#define TIOCMGET 0x5415
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#define TIOCMBIS 0x5416
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#define TIOCMBIC 0x5417
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#define TIOCMSET 0x5418
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#define TIOCGSOFTCAR 0x5419
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#define TIOCSSOFTCAR 0x541A
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#define FIONREAD 0x541B
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#define TIOCINQ FIONREAD
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#define TIOCLINUX 0x541C
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#define TIOCCONS 0x541D
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#define TIOCGSERIAL 0x541E
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#define TIOCSSERIAL 0x541F
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#define TIOCPKT 0x5420
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#define FIONBIO 0x5421
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#define TIOCNOTTY 0x5422
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#define TIOCSETD 0x5423
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#define TIOCGETD 0x5424
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#define TCSBRKP 0x5425 /* Needed for POSIX tcsendbreak() */
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/* #define TIOCTTYGSTRUCT 0x5426 - Former debugging-only ioctl */
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#define TIOCSBRK 0x5427 /* BSD compatibility */
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#define TIOCCBRK 0x5428 /* BSD compatibility */
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#define TIOCGSID 0x5429 /* Return the session ID of FD */
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2008-07-16 20:57:10 +00:00
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#define TCGETS2 _IOR('T',0x2A, struct termios2)
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#define TCSETS2 _IOW('T',0x2B, struct termios2)
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#define TCSETSW2 _IOW('T',0x2C, struct termios2)
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#define TCSETSF2 _IOW('T',0x2D, struct termios2)
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[PATCH] avr32 architecture
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
CPU and the AT32STK1000 development board.
AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
cost-sensitive embedded applications, with particular emphasis on low power
consumption and high code density. The AVR32 architecture is not binary
compatible with earlier 8-bit AVR architectures.
The AVR32 architecture, including the instruction set, is described by the
AVR32 Architecture Manual, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf
The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture. It
features a 7-stage pipeline, 16KB instruction and data caches and a full
Memory Management Unit. It also comes with a large set of integrated
peripherals, many of which are shared with the AT91 ARM-based controllers from
Atmel.
Full data sheet is available from
http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
while the CPU core implementation including caches and MMU is documented by
the AVR32 AP Technical Reference, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf
Information about the AT32STK1000 development board can be found at
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918
including a BSP CD image with an earlier version of this patch, development
tools (binaries and source/patches) and a root filesystem image suitable for
booting from SD card.
Alternatively, there's a preliminary "getting started" guide available at
http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
to the sources and patches you will need in order to set up a cross-compiling
environment for avr32-linux.
This patch, as well as the other patches included with the BSP and the
toolchain patches, is actively supported by Atmel Corporation.
[dmccr@us.ibm.com: Fix more pxx_page macro locations]
[bunk@stusta.de: fix `make defconfig']
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Dave McCracken <dmccr@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-09-26 06:32:13 +00:00
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#define TIOCGPTN _IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */
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#define TIOCSPTLCK _IOW('T',0x31, int) /* Lock/unlock Pty */
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#define FIONCLEX 0x5450
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#define FIOCLEX 0x5451
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#define FIOASYNC 0x5452
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#define TIOCSERCONFIG 0x5453
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#define TIOCSERGWILD 0x5454
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#define TIOCSERSWILD 0x5455
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#define TIOCGLCKTRMIOS 0x5456
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#define TIOCSLCKTRMIOS 0x5457
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#define TIOCSERGSTRUCT 0x5458 /* For debugging only */
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#define TIOCSERGETLSR 0x5459 /* Get line status register */
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#define TIOCSERGETMULTI 0x545A /* Get multiport config */
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#define TIOCSERSETMULTI 0x545B /* Set multiport config */
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#define TIOCMIWAIT 0x545C /* wait for a change on serial input line(s) */
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#define TIOCGICOUNT 0x545D /* read serial port inline interrupt counts */
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#define TIOCGHAYESESP 0x545E /* Get Hayes ESP configuration */
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#define TIOCSHAYESESP 0x545F /* Set Hayes ESP configuration */
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#define FIOQSIZE 0x5460
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/* Used for packet mode */
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#define TIOCPKT_DATA 0
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#define TIOCPKT_FLUSHREAD 1
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#define TIOCPKT_FLUSHWRITE 2
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#define TIOCPKT_STOP 4
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#define TIOCPKT_START 8
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#define TIOCPKT_NOSTOP 16
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#define TIOCPKT_DOSTOP 32
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#define TIOCSER_TEMT 0x01 /* Transmitter physically empty */
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#endif /* __ASM_AVR32_IOCTLS_H */
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