2019-05-19 12:08:20 +00:00
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// SPDX-License-Identifier: GPL-2.0-only
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2006-08-29 22:12:40 +00:00
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/*
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* pata_jmicron.c - JMicron ATA driver for non AHCI mode. This drives the
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* PATA port of the controller. The SATA ports are
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* driven by AHCI in the usual configuration although
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* this driver can handle other setups if we need it.
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*
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2008-10-27 15:09:10 +00:00
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* (c) 2006 Red Hat
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2006-08-29 22:12:40 +00:00
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/blkdev.h>
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#include <linux/delay.h>
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#include <linux/device.h>
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#include <scsi/scsi_host.h>
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#include <linux/libata.h>
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#include <linux/ata.h>
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#define DRV_NAME "pata_jmicron"
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2007-05-22 00:26:38 +00:00
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#define DRV_VERSION "0.1.5"
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2006-08-29 22:12:40 +00:00
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typedef enum {
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PORT_PATA0 = 0,
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PORT_PATA1 = 1,
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PORT_SATA = 2,
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} port_type;
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/**
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* jmicron_pre_reset - check for 40/80 pin
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2007-08-06 09:36:23 +00:00
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* @link: ATA link
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libata: add deadline support to prereset and reset methods
Add @deadline to prereset and reset methods and make them honor it.
ata_wait_ready() which directly takes @deadline is implemented to be
used as the wait function. This patch is in preparation for EH timing
improvements.
* ata_wait_ready() never does busy sleep. It's only used from EH and
no wait in EH is that urgent. This function also prints 'be
patient' message automatically after 5 secs of waiting if more than
3 secs is remaining till deadline.
* ata_bus_post_reset() now fails with error code if any of its wait
fails. This is important because earlier reset tries will have
shorter timeout than the spec requires. If a device fails to
respond before the short timeout, reset should be retried with
longer timeout rather than silently ignoring the device.
There are three behavior differences.
1. Timeout is applied to both devices at once, not separately. This
is more consistent with what the spec says.
2. When a device passes devchk but fails to become ready before
deadline. Previouly, post_reset would just succeed and let
device classification remove the device. New code fails the
reset thus causing reset retry. After a few times, EH will give
up disabling the port.
3. When slave device passes devchk but fails to become accessible
(TF-wise) after reset. Original code disables dev1 after 30s
timeout and continues as if the device doesn't exist, while the
patched code fails reset. When this happens, new code fails
reset on whole port rather than proceeding with only the primary
device.
If the failing device is suffering transient problems, new code
retries reset which is a better behavior. If the failing device is
actually broken, the net effect is identical to it, but not to the
other device sharing the channel. In the previous code, reset would
have succeeded after 30s thus detecting the working one. In the new
code, reset fails and whole port gets disabled. IMO, it's a
pathological case anyway (broken device sharing bus with working
one) and doesn't really matter.
* ata_bus_softreset() is changed to return error code from
ata_bus_post_reset(). It used to return 0 unconditionally.
* Spin up waiting is to be removed and not converted to honor
deadline.
* To be on the safe side, deadline is set to 40s for the time being.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-02-02 07:50:52 +00:00
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* @deadline: deadline jiffies for the operation
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2006-08-29 22:12:40 +00:00
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*
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* Perform the PATA port setup we need.
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libata: add deadline support to prereset and reset methods
Add @deadline to prereset and reset methods and make them honor it.
ata_wait_ready() which directly takes @deadline is implemented to be
used as the wait function. This patch is in preparation for EH timing
improvements.
* ata_wait_ready() never does busy sleep. It's only used from EH and
no wait in EH is that urgent. This function also prints 'be
patient' message automatically after 5 secs of waiting if more than
3 secs is remaining till deadline.
* ata_bus_post_reset() now fails with error code if any of its wait
fails. This is important because earlier reset tries will have
shorter timeout than the spec requires. If a device fails to
respond before the short timeout, reset should be retried with
longer timeout rather than silently ignoring the device.
There are three behavior differences.
1. Timeout is applied to both devices at once, not separately. This
is more consistent with what the spec says.
2. When a device passes devchk but fails to become ready before
deadline. Previouly, post_reset would just succeed and let
device classification remove the device. New code fails the
reset thus causing reset retry. After a few times, EH will give
up disabling the port.
3. When slave device passes devchk but fails to become accessible
(TF-wise) after reset. Original code disables dev1 after 30s
timeout and continues as if the device doesn't exist, while the
patched code fails reset. When this happens, new code fails
reset on whole port rather than proceeding with only the primary
device.
If the failing device is suffering transient problems, new code
retries reset which is a better behavior. If the failing device is
actually broken, the net effect is identical to it, but not to the
other device sharing the channel. In the previous code, reset would
have succeeded after 30s thus detecting the working one. In the new
code, reset fails and whole port gets disabled. IMO, it's a
pathological case anyway (broken device sharing bus with working
one) and doesn't really matter.
* ata_bus_softreset() is changed to return error code from
ata_bus_post_reset(). It used to return 0 unconditionally.
* Spin up waiting is to be removed and not converted to honor
deadline.
* To be on the safe side, deadline is set to 40s for the time being.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-02-02 07:50:52 +00:00
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*
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2006-08-29 22:12:40 +00:00
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* On the Jmicron 361/363 there is a single PATA port that can be mapped
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* either as primary or secondary (or neither). We don't do any policy
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* and setup here. We assume that has been done by init_one and the
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* BIOS.
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*/
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2007-08-06 09:36:23 +00:00
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static int jmicron_pre_reset(struct ata_link *link, unsigned long deadline)
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2006-08-29 22:12:40 +00:00
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{
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2007-08-06 09:36:23 +00:00
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struct ata_port *ap = link->ap;
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2006-08-29 22:12:40 +00:00
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struct pci_dev *pdev = to_pci_dev(ap->host->dev);
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u32 control;
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u32 control5;
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int port_mask = 1<< (4 * ap->port_no);
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int port = ap->port_no;
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port_type port_map[2];
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/* Check if our port is enabled */
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pci_read_config_dword(pdev, 0x40, &control);
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if ((control & port_mask) == 0)
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2006-09-26 16:53:38 +00:00
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return -ENOENT;
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2006-08-29 22:12:40 +00:00
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/* There are two basic mappings. One has the two SATA ports merged
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as master/slave and the secondary as PATA, the other has only the
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SATA port mapped */
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if (control & (1 << 23)) {
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port_map[0] = PORT_SATA;
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port_map[1] = PORT_PATA0;
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} else {
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port_map[0] = PORT_SATA;
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port_map[1] = PORT_SATA;
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}
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/* The 365/366 may have this bit set to map the second PATA port
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as the internal primary channel */
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pci_read_config_dword(pdev, 0x80, &control5);
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if (control5 & (1<<24))
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port_map[0] = PORT_PATA1;
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/* The two ports may then be logically swapped by the firmware */
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if (control & (1 << 22))
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port = port ^ 1;
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/*
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* Now we know which physical port we are talking about we can
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* actually do our cable checking etc. Thankfully we don't need
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* to do the plumbing for other cases.
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*/
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2007-11-19 09:06:11 +00:00
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switch (port_map[port]) {
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2006-08-29 22:12:40 +00:00
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case PORT_PATA0:
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2007-11-19 09:06:11 +00:00
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if ((control & (1 << 5)) == 0)
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return -ENOENT;
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2006-08-29 22:12:40 +00:00
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if (control & (1 << 3)) /* 40/80 pin primary */
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ap->cbl = ATA_CBL_PATA40;
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else
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ap->cbl = ATA_CBL_PATA80;
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break;
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case PORT_PATA1:
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/* Bit 21 is set if the port is enabled */
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if ((control5 & (1 << 21)) == 0)
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2007-11-19 09:06:11 +00:00
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return -ENOENT;
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2006-08-29 22:12:40 +00:00
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if (control5 & (1 << 19)) /* 40/80 pin secondary */
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ap->cbl = ATA_CBL_PATA40;
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else
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ap->cbl = ATA_CBL_PATA80;
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break;
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case PORT_SATA:
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ap->cbl = ATA_CBL_SATA;
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break;
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}
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2008-04-07 13:47:16 +00:00
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return ata_sff_prereset(link, deadline);
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2006-08-29 22:12:40 +00:00
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}
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/* No PIO or DMA methods needed for this device */
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static struct scsi_host_template jmicron_sht = {
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2008-03-25 03:22:49 +00:00
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ATA_BMDMA_SHT(DRV_NAME),
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2006-08-29 22:12:40 +00:00
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};
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libata: implement and use ops inheritance
libata lets low level drivers build ata_port_operations table and
register it with libata core layer. This allows low level drivers
high level of flexibility but also burdens them with lots of
boilerplate entries.
This becomes worse for drivers which support related similar
controllers which differ slightly. They share most of the operations
except for a few. However, the driver still needs to list all
operations for each variant. This results in large number of
duplicate entries, which is not only inefficient but also error-prone
as it becomes very difficult to tell what the actual differences are.
This duplicate boilerplates all over the low level drivers also make
updating the core layer exteremely difficult and error-prone. When
compounded with multi-branched development model, it ends up
accumulating inconsistencies over time. Some of those inconsistencies
cause immediate problems and fixed. Others just remain there dormant
making maintenance increasingly difficult.
To rectify the problem, this patch implements ata_port_operations
inheritance. To allow LLDs to easily re-use their own ops tables
overriding only specific methods, this patch implements poor man's
class inheritance. An ops table has ->inherits field which can be set
to any ops table as long as it doesn't create a loop. When the host
is started, the inheritance chain is followed and any operation which
isn't specified is taken from the nearest ancestor which has it
specified. This operation is called finalization and done only once
per an ops table and the LLD doesn't have to do anything special about
it other than making the ops table non-const such that libata can
update it.
libata provides four base ops tables lower drivers can inherit from -
base, sata, pmp, sff and bmdma. To avoid overriding these ops
accidentaly, these ops are declared const and LLDs should always
inherit these instead of using them directly.
After finalization, all the ops table are identical before and after
the patch except for setting .irq_handler to ata_interrupt in drivers
which didn't use to. The .irq_handler doesn't have any actual effect
and the field will soon be removed by later patch.
* sata_sx4 is still using old style EH and currently doesn't take
advantage of ops inheritance.
Signed-off-by: Tejun Heo <htejun@gmail.com>
2008-03-25 03:22:49 +00:00
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static struct ata_port_operations jmicron_ops = {
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.inherits = &ata_bmdma_port_ops,
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2008-03-25 03:22:49 +00:00
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.prereset = jmicron_pre_reset,
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2006-08-29 22:12:40 +00:00
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};
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/**
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* jmicron_init_one - Register Jmicron ATA PCI device with kernel services
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* @pdev: PCI device to register
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2021-02-01 14:39:38 +00:00
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* @id: PCI device ID
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2006-08-29 22:12:40 +00:00
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*
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* Called from kernel PCI layer.
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*
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* LOCKING:
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* Inherited from PCI layer (may sleep).
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*
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* RETURNS:
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* Zero on success, or -ERRNO value.
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*/
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static int jmicron_init_one (struct pci_dev *pdev, const struct pci_device_id *id)
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{
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2007-05-04 10:43:58 +00:00
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static const struct ata_port_info info = {
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2007-05-28 10:59:48 +00:00
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.flags = ATA_FLAG_SLAVE_POSS,
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2006-08-29 22:12:40 +00:00
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2009-03-14 20:38:24 +00:00
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.pio_mask = ATA_PIO4,
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.mwdma_mask = ATA_MWDMA2,
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2007-07-09 16:16:50 +00:00
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.udma_mask = ATA_UDMA5,
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2006-08-29 22:12:40 +00:00
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.port_ops = &jmicron_ops,
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};
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2007-05-04 10:43:58 +00:00
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const struct ata_port_info *ppi[] = { &info, NULL };
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2006-08-29 22:12:40 +00:00
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2010-05-19 20:10:22 +00:00
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return ata_pci_bmdma_init_one(pdev, ppi, &jmicron_sht, NULL, 0);
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2006-08-29 22:12:40 +00:00
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}
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static const struct pci_device_id jmicron_pci_tbl[] = {
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2007-10-06 22:04:50 +00:00
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{ PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
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PCI_CLASS_STORAGE_IDE << 8, 0xffff00, 0 },
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2006-08-29 22:12:40 +00:00
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{ } /* terminate list */
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};
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static struct pci_driver jmicron_pci_driver = {
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.name = DRV_NAME,
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.id_table = jmicron_pci_tbl,
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.probe = jmicron_init_one,
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.remove = ata_pci_remove_one,
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2014-05-07 15:17:44 +00:00
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#ifdef CONFIG_PM_SLEEP
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2006-11-22 17:18:30 +00:00
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.suspend = ata_pci_device_suspend,
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2007-02-26 11:09:02 +00:00
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.resume = ata_pci_device_resume,
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2007-03-02 08:31:26 +00:00
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#endif
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2006-08-29 22:12:40 +00:00
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};
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2012-04-19 05:43:05 +00:00
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module_pci_driver(jmicron_pci_driver);
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2006-08-29 22:12:40 +00:00
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MODULE_AUTHOR("Alan Cox");
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MODULE_DESCRIPTION("SCSI low-level driver for Jmicron PATA ports");
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MODULE_LICENSE("GPL");
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MODULE_DEVICE_TABLE(pci, jmicron_pci_tbl);
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MODULE_VERSION(DRV_VERSION);
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