2019-05-19 12:08:20 +00:00
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// SPDX-License-Identifier: GPL-2.0-only
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2006-08-29 22:12:40 +00:00
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/*
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* pata_artop.c - ARTOP ATA controller driver
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*
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2008-10-27 15:09:10 +00:00
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* (C) 2006 Red Hat
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2011-10-13 10:59:35 +00:00
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* (C) 2007,2011 Bartlomiej Zolnierkiewicz
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2006-08-29 22:12:40 +00:00
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*
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* Based in part on drivers/ide/pci/aec62xx.c
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* Copyright (C) 1999-2002 Andre Hedrick <andre@linux-ide.org>
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* 865/865R fixes for Macintosh card version from a patch to the old
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* driver by Thibaut VARENE <varenet@parisc-linux.org>
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* When setting the PCI latency we must set 0x80 or higher for burst
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* performance Alessandro Zummo <alessandro.zummo@towertech.it>
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*
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* TODO
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* Investigate no_dsc on 850R
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* Clock detect
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/blkdev.h>
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#include <linux/delay.h>
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#include <linux/device.h>
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#include <scsi/scsi_host.h>
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#include <linux/libata.h>
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#include <linux/ata.h>
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#define DRV_NAME "pata_artop"
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2022-02-09 20:25:35 +00:00
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#define DRV_VERSION "0.4.8"
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2006-08-29 22:12:40 +00:00
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/*
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* The ARTOP has 33 Mhz and "over clocked" timing tables. Until we
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* get PCI bus speed functionality we leave this as 0. Its a variable
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* for when we get the functionality and also for folks wanting to
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* test stuff.
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*/
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static int clock = 0;
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/**
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2011-10-11 17:45:52 +00:00
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* artop62x0_pre_reset - probe begin
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2007-08-06 09:36:23 +00:00
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* @link: link
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libata: add deadline support to prereset and reset methods
Add @deadline to prereset and reset methods and make them honor it.
ata_wait_ready() which directly takes @deadline is implemented to be
used as the wait function. This patch is in preparation for EH timing
improvements.
* ata_wait_ready() never does busy sleep. It's only used from EH and
no wait in EH is that urgent. This function also prints 'be
patient' message automatically after 5 secs of waiting if more than
3 secs is remaining till deadline.
* ata_bus_post_reset() now fails with error code if any of its wait
fails. This is important because earlier reset tries will have
shorter timeout than the spec requires. If a device fails to
respond before the short timeout, reset should be retried with
longer timeout rather than silently ignoring the device.
There are three behavior differences.
1. Timeout is applied to both devices at once, not separately. This
is more consistent with what the spec says.
2. When a device passes devchk but fails to become ready before
deadline. Previouly, post_reset would just succeed and let
device classification remove the device. New code fails the
reset thus causing reset retry. After a few times, EH will give
up disabling the port.
3. When slave device passes devchk but fails to become accessible
(TF-wise) after reset. Original code disables dev1 after 30s
timeout and continues as if the device doesn't exist, while the
patched code fails reset. When this happens, new code fails
reset on whole port rather than proceeding with only the primary
device.
If the failing device is suffering transient problems, new code
retries reset which is a better behavior. If the failing device is
actually broken, the net effect is identical to it, but not to the
other device sharing the channel. In the previous code, reset would
have succeeded after 30s thus detecting the working one. In the new
code, reset fails and whole port gets disabled. IMO, it's a
pathological case anyway (broken device sharing bus with working
one) and doesn't really matter.
* ata_bus_softreset() is changed to return error code from
ata_bus_post_reset(). It used to return 0 unconditionally.
* Spin up waiting is to be removed and not converted to honor
deadline.
* To be on the safe side, deadline is set to 40s for the time being.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-02-02 07:50:52 +00:00
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* @deadline: deadline jiffies for the operation
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2006-08-29 22:12:40 +00:00
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*
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* Nothing complicated needed here.
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*/
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2011-10-11 17:45:52 +00:00
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static int artop62x0_pre_reset(struct ata_link *link, unsigned long deadline)
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2006-08-29 22:12:40 +00:00
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{
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static const struct pci_bits artop_enable_bits[] = {
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{ 0x4AU, 1U, 0x02UL, 0x02UL }, /* port 0 */
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{ 0x4AU, 1U, 0x04UL, 0x04UL }, /* port 1 */
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};
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2007-08-06 09:36:23 +00:00
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struct ata_port *ap = link->ap;
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2006-08-29 22:12:40 +00:00
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struct pci_dev *pdev = to_pci_dev(ap->host->dev);
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2011-10-11 17:45:52 +00:00
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/* Odd numbered device ids are the units with enable bits. */
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2010-08-30 15:37:05 +00:00
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if ((pdev->device & 1) &&
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!pci_test_config_bits(pdev, &artop_enable_bits[ap->port_no]))
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2006-09-26 16:53:38 +00:00
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return -ENOENT;
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2007-03-09 14:41:19 +00:00
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2008-04-07 13:47:16 +00:00
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return ata_sff_prereset(link, deadline);
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2007-03-09 13:37:46 +00:00
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}
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2006-09-26 16:53:38 +00:00
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2007-03-09 13:37:46 +00:00
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/**
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* artop6260_cable_detect - identify cable type
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* @ap: Port
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*
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2007-05-25 19:39:30 +00:00
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* Identify the cable type for the ARTOP interface in question
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2007-03-09 13:37:46 +00:00
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*/
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2007-05-22 00:14:23 +00:00
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2007-03-09 13:37:46 +00:00
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static int artop6260_cable_detect(struct ata_port *ap)
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{
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struct pci_dev *pdev = to_pci_dev(ap->host->dev);
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u8 tmp;
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2006-08-29 22:12:40 +00:00
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pci_read_config_byte(pdev, 0x49, &tmp);
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2006-11-10 19:52:46 +00:00
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if (tmp & (1 << ap->port_no))
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2007-03-09 13:37:46 +00:00
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return ATA_CBL_PATA40;
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return ATA_CBL_PATA80;
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2006-08-29 22:12:40 +00:00
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}
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/**
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* artop6210_load_piomode - Load a set of PATA PIO timings
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* @ap: Port whose timings we are configuring
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* @adev: Device
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* @pio: PIO mode
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*
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* Set PIO mode for device, in host controller PCI config space. This
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* is used both to set PIO timings in PIO mode and also to set the
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* matching PIO clocking for UDMA, as well as the MWDMA timings.
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*
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* LOCKING:
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* None (inherited from caller).
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*/
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static void artop6210_load_piomode(struct ata_port *ap, struct ata_device *adev, unsigned int pio)
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{
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struct pci_dev *pdev = to_pci_dev(ap->host->dev);
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int dn = adev->devno + 2 * ap->port_no;
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2019-10-06 14:29:56 +00:00
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static const u16 timing[2][5] = {
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2006-08-29 22:12:40 +00:00
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{ 0x0000, 0x000A, 0x0008, 0x0303, 0x0301 },
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{ 0x0700, 0x070A, 0x0708, 0x0403, 0x0401 }
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};
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/* Load the PIO timing active/recovery bits */
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pci_write_config_word(pdev, 0x40 + 2 * dn, timing[clock][pio]);
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}
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/**
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* artop6210_set_piomode - Initialize host controller PATA PIO timings
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* @ap: Port whose timings we are configuring
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* @adev: Device we are configuring
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*
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* Set PIO mode for device, in host controller PCI config space. For
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* ARTOP we must also clear the UDMA bits if we are not doing UDMA. In
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* the event UDMA is used the later call to set_dmamode will set the
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* bits as required.
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*
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* LOCKING:
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* None (inherited from caller).
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*/
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static void artop6210_set_piomode(struct ata_port *ap, struct ata_device *adev)
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{
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struct pci_dev *pdev = to_pci_dev(ap->host->dev);
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int dn = adev->devno + 2 * ap->port_no;
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u8 ultra;
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artop6210_load_piomode(ap, adev, adev->pio_mode - XFER_PIO_0);
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/* Clear the UDMA mode bits (set_dmamode will redo this if needed) */
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pci_read_config_byte(pdev, 0x54, &ultra);
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ultra &= ~(3 << (2 * dn));
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pci_write_config_byte(pdev, 0x54, ultra);
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}
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/**
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* artop6260_load_piomode - Initialize host controller PATA PIO timings
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* @ap: Port whose timings we are configuring
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* @adev: Device we are configuring
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* @pio: PIO mode
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*
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* Set PIO mode for device, in host controller PCI config space. The
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* ARTOP6260 and relatives store the timing data differently.
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*
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* LOCKING:
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* None (inherited from caller).
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*/
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static void artop6260_load_piomode (struct ata_port *ap, struct ata_device *adev, unsigned int pio)
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{
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struct pci_dev *pdev = to_pci_dev(ap->host->dev);
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int dn = adev->devno + 2 * ap->port_no;
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2019-10-06 14:29:56 +00:00
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static const u8 timing[2][5] = {
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2006-08-29 22:12:40 +00:00
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{ 0x00, 0x0A, 0x08, 0x33, 0x31 },
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{ 0x70, 0x7A, 0x78, 0x43, 0x41 }
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};
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/* Load the PIO timing active/recovery bits */
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pci_write_config_byte(pdev, 0x40 + dn, timing[clock][pio]);
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}
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/**
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* artop6260_set_piomode - Initialize host controller PATA PIO timings
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* @ap: Port whose timings we are configuring
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* @adev: Device we are configuring
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*
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* Set PIO mode for device, in host controller PCI config space. For
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* ARTOP we must also clear the UDMA bits if we are not doing UDMA. In
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* the event UDMA is used the later call to set_dmamode will set the
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* bits as required.
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*
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* LOCKING:
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* None (inherited from caller).
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*/
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static void artop6260_set_piomode(struct ata_port *ap, struct ata_device *adev)
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{
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struct pci_dev *pdev = to_pci_dev(ap->host->dev);
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u8 ultra;
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artop6260_load_piomode(ap, adev, adev->pio_mode - XFER_PIO_0);
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/* Clear the UDMA mode bits (set_dmamode will redo this if needed) */
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pci_read_config_byte(pdev, 0x44 + ap->port_no, &ultra);
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ultra &= ~(7 << (4 * adev->devno)); /* One nibble per drive */
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pci_write_config_byte(pdev, 0x44 + ap->port_no, ultra);
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}
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/**
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* artop6210_set_dmamode - Initialize host controller PATA PIO timings
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* @ap: Port whose timings we are configuring
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2007-03-09 13:37:46 +00:00
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* @adev: Device whose timings we are configuring
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2006-08-29 22:12:40 +00:00
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*
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* Set DMA mode for device, in host controller PCI config space.
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*
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* LOCKING:
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* None (inherited from caller).
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*/
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static void artop6210_set_dmamode (struct ata_port *ap, struct ata_device *adev)
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{
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unsigned int pio;
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struct pci_dev *pdev = to_pci_dev(ap->host->dev);
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int dn = adev->devno + 2 * ap->port_no;
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u8 ultra;
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if (adev->dma_mode == XFER_MW_DMA_0)
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pio = 1;
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else
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pio = 4;
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/* Load the PIO timing active/recovery bits */
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artop6210_load_piomode(ap, adev, pio);
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pci_read_config_byte(pdev, 0x54, &ultra);
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ultra &= ~(3 << (2 * dn));
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/* Add ultra DMA bits if in UDMA mode */
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if (adev->dma_mode >= XFER_UDMA_0) {
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u8 mode = (adev->dma_mode - XFER_UDMA_0) + 1 - clock;
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if (mode == 0)
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mode = 1;
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ultra |= (mode << (2 * dn));
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}
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pci_write_config_byte(pdev, 0x54, ultra);
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}
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/**
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* artop6260_set_dmamode - Initialize host controller PATA PIO timings
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* @ap: Port whose timings we are configuring
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* @adev: Device we are configuring
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*
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* Set DMA mode for device, in host controller PCI config space. The
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* ARTOP6260 and relatives store the timing data differently.
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*
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* LOCKING:
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* None (inherited from caller).
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*/
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static void artop6260_set_dmamode (struct ata_port *ap, struct ata_device *adev)
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{
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2017-09-14 18:54:18 +00:00
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unsigned int pio;
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2006-08-29 22:12:40 +00:00
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struct pci_dev *pdev = to_pci_dev(ap->host->dev);
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u8 ultra;
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if (adev->dma_mode == XFER_MW_DMA_0)
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pio = 1;
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else
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pio = 4;
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/* Load the PIO timing active/recovery bits */
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artop6260_load_piomode(ap, adev, pio);
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/* Add ultra DMA bits if in UDMA mode */
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pci_read_config_byte(pdev, 0x44 + ap->port_no, &ultra);
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ultra &= ~(7 << (4 * adev->devno)); /* One nibble per drive */
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if (adev->dma_mode >= XFER_UDMA_0) {
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u8 mode = adev->dma_mode - XFER_UDMA_0 + 1 - clock;
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if (mode == 0)
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mode = 1;
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ultra |= (mode << (4 * adev->devno));
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}
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pci_write_config_byte(pdev, 0x44 + ap->port_no, ultra);
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}
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2009-03-24 10:21:49 +00:00
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/**
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2021-02-01 14:39:33 +00:00
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* artop6210_qc_defer - implement serialization
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2009-03-24 10:21:49 +00:00
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* @qc: command
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*
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* Issue commands per host on this chip.
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*/
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static int artop6210_qc_defer(struct ata_queued_cmd *qc)
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{
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struct ata_host *host = qc->ap->host;
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struct ata_port *alt = host->ports[1 ^ qc->ap->port_no];
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int rc;
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/* First apply the usual rules */
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rc = ata_std_qc_defer(qc);
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if (rc != 0)
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return rc;
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/* Now apply serialization rules. Only allow a command if the
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other channel state machine is idle */
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if (alt && alt->qc_active)
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return ATA_DEFER_PORT;
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return 0;
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}
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2006-08-29 22:12:40 +00:00
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static struct scsi_host_template artop_sht = {
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2008-03-25 03:22:49 +00:00
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ATA_BMDMA_SHT(DRV_NAME),
|
2006-08-29 22:12:40 +00:00
|
|
|
};
|
|
|
|
|
libata: implement and use ops inheritance
libata lets low level drivers build ata_port_operations table and
register it with libata core layer. This allows low level drivers
high level of flexibility but also burdens them with lots of
boilerplate entries.
This becomes worse for drivers which support related similar
controllers which differ slightly. They share most of the operations
except for a few. However, the driver still needs to list all
operations for each variant. This results in large number of
duplicate entries, which is not only inefficient but also error-prone
as it becomes very difficult to tell what the actual differences are.
This duplicate boilerplates all over the low level drivers also make
updating the core layer exteremely difficult and error-prone. When
compounded with multi-branched development model, it ends up
accumulating inconsistencies over time. Some of those inconsistencies
cause immediate problems and fixed. Others just remain there dormant
making maintenance increasingly difficult.
To rectify the problem, this patch implements ata_port_operations
inheritance. To allow LLDs to easily re-use their own ops tables
overriding only specific methods, this patch implements poor man's
class inheritance. An ops table has ->inherits field which can be set
to any ops table as long as it doesn't create a loop. When the host
is started, the inheritance chain is followed and any operation which
isn't specified is taken from the nearest ancestor which has it
specified. This operation is called finalization and done only once
per an ops table and the LLD doesn't have to do anything special about
it other than making the ops table non-const such that libata can
update it.
libata provides four base ops tables lower drivers can inherit from -
base, sata, pmp, sff and bmdma. To avoid overriding these ops
accidentaly, these ops are declared const and LLDs should always
inherit these instead of using them directly.
After finalization, all the ops table are identical before and after
the patch except for setting .irq_handler to ata_interrupt in drivers
which didn't use to. The .irq_handler doesn't have any actual effect
and the field will soon be removed by later patch.
* sata_sx4 is still using old style EH and currently doesn't take
advantage of ops inheritance.
Signed-off-by: Tejun Heo <htejun@gmail.com>
2008-03-25 03:22:49 +00:00
|
|
|
static struct ata_port_operations artop6210_ops = {
|
|
|
|
.inherits = &ata_bmdma_port_ops,
|
|
|
|
.cable_detect = ata_cable_40wire,
|
2006-08-29 22:12:40 +00:00
|
|
|
.set_piomode = artop6210_set_piomode,
|
|
|
|
.set_dmamode = artop6210_set_dmamode,
|
2011-10-11 17:45:52 +00:00
|
|
|
.prereset = artop62x0_pre_reset,
|
2009-03-24 10:21:49 +00:00
|
|
|
.qc_defer = artop6210_qc_defer,
|
2006-08-29 22:12:40 +00:00
|
|
|
};
|
|
|
|
|
libata: implement and use ops inheritance
libata lets low level drivers build ata_port_operations table and
register it with libata core layer. This allows low level drivers
high level of flexibility but also burdens them with lots of
boilerplate entries.
This becomes worse for drivers which support related similar
controllers which differ slightly. They share most of the operations
except for a few. However, the driver still needs to list all
operations for each variant. This results in large number of
duplicate entries, which is not only inefficient but also error-prone
as it becomes very difficult to tell what the actual differences are.
This duplicate boilerplates all over the low level drivers also make
updating the core layer exteremely difficult and error-prone. When
compounded with multi-branched development model, it ends up
accumulating inconsistencies over time. Some of those inconsistencies
cause immediate problems and fixed. Others just remain there dormant
making maintenance increasingly difficult.
To rectify the problem, this patch implements ata_port_operations
inheritance. To allow LLDs to easily re-use their own ops tables
overriding only specific methods, this patch implements poor man's
class inheritance. An ops table has ->inherits field which can be set
to any ops table as long as it doesn't create a loop. When the host
is started, the inheritance chain is followed and any operation which
isn't specified is taken from the nearest ancestor which has it
specified. This operation is called finalization and done only once
per an ops table and the LLD doesn't have to do anything special about
it other than making the ops table non-const such that libata can
update it.
libata provides four base ops tables lower drivers can inherit from -
base, sata, pmp, sff and bmdma. To avoid overriding these ops
accidentaly, these ops are declared const and LLDs should always
inherit these instead of using them directly.
After finalization, all the ops table are identical before and after
the patch except for setting .irq_handler to ata_interrupt in drivers
which didn't use to. The .irq_handler doesn't have any actual effect
and the field will soon be removed by later patch.
* sata_sx4 is still using old style EH and currently doesn't take
advantage of ops inheritance.
Signed-off-by: Tejun Heo <htejun@gmail.com>
2008-03-25 03:22:49 +00:00
|
|
|
static struct ata_port_operations artop6260_ops = {
|
|
|
|
.inherits = &ata_bmdma_port_ops,
|
|
|
|
.cable_detect = artop6260_cable_detect,
|
2006-08-29 22:12:40 +00:00
|
|
|
.set_piomode = artop6260_set_piomode,
|
|
|
|
.set_dmamode = artop6260_set_dmamode,
|
2011-10-11 17:45:52 +00:00
|
|
|
.prereset = artop62x0_pre_reset,
|
2006-08-29 22:12:40 +00:00
|
|
|
};
|
|
|
|
|
2011-10-13 10:59:35 +00:00
|
|
|
static void atp8xx_fixup(struct pci_dev *pdev)
|
|
|
|
{
|
2022-02-09 20:25:35 +00:00
|
|
|
u8 reg;
|
|
|
|
|
|
|
|
switch (pdev->device) {
|
|
|
|
case 0x0005:
|
2011-10-13 10:59:35 +00:00
|
|
|
/* BIOS may have left us in UDMA, clear it before libata probe */
|
|
|
|
pci_write_config_byte(pdev, 0x54, 0);
|
2022-02-09 20:25:35 +00:00
|
|
|
break;
|
|
|
|
case 0x0008:
|
|
|
|
case 0x0009:
|
2011-10-13 10:59:35 +00:00
|
|
|
/* Mac systems come up with some registers not set as we
|
|
|
|
will need them */
|
|
|
|
|
|
|
|
/* Clear reset & test bits */
|
|
|
|
pci_read_config_byte(pdev, 0x49, ®);
|
|
|
|
pci_write_config_byte(pdev, 0x49, reg & ~0x30);
|
|
|
|
|
|
|
|
/* PCI latency must be > 0x80 for burst mode, tweak it
|
|
|
|
* if required.
|
|
|
|
*/
|
|
|
|
pci_read_config_byte(pdev, PCI_LATENCY_TIMER, ®);
|
|
|
|
if (reg <= 0x80)
|
|
|
|
pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0x90);
|
|
|
|
|
|
|
|
/* Enable IRQ output and burst mode */
|
|
|
|
pci_read_config_byte(pdev, 0x4a, ®);
|
|
|
|
pci_write_config_byte(pdev, 0x4a, (reg & ~0x01) | 0x80);
|
2022-02-09 20:25:35 +00:00
|
|
|
break;
|
2011-10-13 10:59:35 +00:00
|
|
|
}
|
|
|
|
}
|
2006-08-29 22:12:40 +00:00
|
|
|
|
|
|
|
/**
|
|
|
|
* artop_init_one - Register ARTOP ATA PCI device with kernel services
|
|
|
|
* @pdev: PCI device to register
|
2021-02-01 14:39:25 +00:00
|
|
|
* @id: PCI device ID
|
2006-08-29 22:12:40 +00:00
|
|
|
*
|
|
|
|
* Called from kernel PCI layer.
|
|
|
|
*
|
|
|
|
* LOCKING:
|
|
|
|
* Inherited from PCI layer (may sleep).
|
|
|
|
*
|
|
|
|
* RETURNS:
|
|
|
|
* Zero on success, or -ERRNO value.
|
|
|
|
*/
|
|
|
|
|
|
|
|
static int artop_init_one (struct pci_dev *pdev, const struct pci_device_id *id)
|
|
|
|
{
|
2007-05-04 10:43:58 +00:00
|
|
|
static const struct ata_port_info info_6210 = {
|
2007-05-28 10:59:48 +00:00
|
|
|
.flags = ATA_FLAG_SLAVE_POSS,
|
2009-03-14 20:38:24 +00:00
|
|
|
.pio_mask = ATA_PIO4,
|
|
|
|
.mwdma_mask = ATA_MWDMA2,
|
2006-08-29 22:12:40 +00:00
|
|
|
.udma_mask = ATA_UDMA2,
|
|
|
|
.port_ops = &artop6210_ops,
|
|
|
|
};
|
2007-05-04 10:43:58 +00:00
|
|
|
static const struct ata_port_info info_626x = {
|
2007-05-28 10:59:48 +00:00
|
|
|
.flags = ATA_FLAG_SLAVE_POSS,
|
2009-03-14 20:38:24 +00:00
|
|
|
.pio_mask = ATA_PIO4,
|
|
|
|
.mwdma_mask = ATA_MWDMA2,
|
2006-08-29 22:12:40 +00:00
|
|
|
.udma_mask = ATA_UDMA4,
|
|
|
|
.port_ops = &artop6260_ops,
|
|
|
|
};
|
2007-08-09 21:19:34 +00:00
|
|
|
static const struct ata_port_info info_628x = {
|
2007-05-28 10:59:48 +00:00
|
|
|
.flags = ATA_FLAG_SLAVE_POSS,
|
2009-03-14 20:38:24 +00:00
|
|
|
.pio_mask = ATA_PIO4,
|
|
|
|
.mwdma_mask = ATA_MWDMA2,
|
2006-08-29 22:12:40 +00:00
|
|
|
.udma_mask = ATA_UDMA5,
|
|
|
|
.port_ops = &artop6260_ops,
|
|
|
|
};
|
2007-08-09 21:19:34 +00:00
|
|
|
static const struct ata_port_info info_628x_fast = {
|
|
|
|
.flags = ATA_FLAG_SLAVE_POSS,
|
2009-03-14 20:38:24 +00:00
|
|
|
.pio_mask = ATA_PIO4,
|
|
|
|
.mwdma_mask = ATA_MWDMA2,
|
2007-08-09 21:19:34 +00:00
|
|
|
.udma_mask = ATA_UDMA6,
|
|
|
|
.port_ops = &artop6260_ops,
|
|
|
|
};
|
2007-05-04 10:43:58 +00:00
|
|
|
const struct ata_port_info *ppi[] = { NULL, NULL };
|
2008-03-25 03:22:47 +00:00
|
|
|
int rc;
|
2006-08-29 22:12:40 +00:00
|
|
|
|
2011-04-15 22:52:00 +00:00
|
|
|
ata_print_version_once(&pdev->dev, DRV_VERSION);
|
2006-08-29 22:12:40 +00:00
|
|
|
|
2008-03-25 03:22:47 +00:00
|
|
|
rc = pcim_enable_device(pdev);
|
|
|
|
if (rc)
|
|
|
|
return rc;
|
|
|
|
|
2022-02-09 20:25:34 +00:00
|
|
|
switch (id->driver_data) {
|
|
|
|
case 0: /* 6210 variant */
|
2007-05-04 10:43:58 +00:00
|
|
|
ppi[0] = &info_6210;
|
2022-02-09 20:25:34 +00:00
|
|
|
break;
|
|
|
|
case 1: /* 6260 */
|
2007-05-04 10:43:58 +00:00
|
|
|
ppi[0] = &info_626x;
|
2022-02-09 20:25:34 +00:00
|
|
|
break;
|
|
|
|
case 2: /* 6280 or 6280 + fast */
|
|
|
|
if (inb(pci_resource_start(pdev, 4)) & 0x10)
|
2007-08-09 21:19:34 +00:00
|
|
|
ppi[0] = &info_628x_fast;
|
2022-02-09 20:25:34 +00:00
|
|
|
else
|
|
|
|
ppi[0] = &info_628x;
|
|
|
|
break;
|
2006-08-29 22:12:40 +00:00
|
|
|
}
|
2006-10-01 14:38:22 +00:00
|
|
|
|
2007-05-04 10:43:58 +00:00
|
|
|
BUG_ON(ppi[0] == NULL);
|
2006-10-01 14:38:22 +00:00
|
|
|
|
2011-10-13 10:59:35 +00:00
|
|
|
atp8xx_fixup(pdev);
|
|
|
|
|
2010-05-19 20:10:22 +00:00
|
|
|
return ata_pci_bmdma_init_one(pdev, ppi, &artop_sht, NULL, 0);
|
2006-08-29 22:12:40 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static const struct pci_device_id artop_pci_tbl[] = {
|
2006-09-29 00:21:59 +00:00
|
|
|
{ PCI_VDEVICE(ARTOP, 0x0005), 0 },
|
|
|
|
{ PCI_VDEVICE(ARTOP, 0x0006), 1 },
|
|
|
|
{ PCI_VDEVICE(ARTOP, 0x0007), 1 },
|
|
|
|
{ PCI_VDEVICE(ARTOP, 0x0008), 2 },
|
|
|
|
{ PCI_VDEVICE(ARTOP, 0x0009), 2 },
|
|
|
|
|
2006-08-29 22:12:40 +00:00
|
|
|
{ } /* terminate list */
|
|
|
|
};
|
|
|
|
|
2014-05-07 15:17:44 +00:00
|
|
|
#ifdef CONFIG_PM_SLEEP
|
2011-10-13 10:59:35 +00:00
|
|
|
static int atp8xx_reinit_one(struct pci_dev *pdev)
|
|
|
|
{
|
2013-06-03 05:05:36 +00:00
|
|
|
struct ata_host *host = pci_get_drvdata(pdev);
|
2011-10-13 10:59:35 +00:00
|
|
|
int rc;
|
|
|
|
|
|
|
|
rc = ata_pci_device_do_resume(pdev);
|
|
|
|
if (rc)
|
|
|
|
return rc;
|
|
|
|
|
|
|
|
atp8xx_fixup(pdev);
|
|
|
|
|
|
|
|
ata_host_resume(host);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2006-08-29 22:12:40 +00:00
|
|
|
static struct pci_driver artop_pci_driver = {
|
|
|
|
.name = DRV_NAME,
|
|
|
|
.id_table = artop_pci_tbl,
|
|
|
|
.probe = artop_init_one,
|
|
|
|
.remove = ata_pci_remove_one,
|
2014-05-07 15:17:44 +00:00
|
|
|
#ifdef CONFIG_PM_SLEEP
|
2011-10-13 10:59:35 +00:00
|
|
|
.suspend = ata_pci_device_suspend,
|
|
|
|
.resume = atp8xx_reinit_one,
|
|
|
|
#endif
|
2006-08-29 22:12:40 +00:00
|
|
|
};
|
|
|
|
|
2012-04-19 05:43:05 +00:00
|
|
|
module_pci_driver(artop_pci_driver);
|
2006-08-29 22:12:40 +00:00
|
|
|
|
2011-10-13 10:59:35 +00:00
|
|
|
MODULE_AUTHOR("Alan Cox, Bartlomiej Zolnierkiewicz");
|
2006-08-29 22:12:40 +00:00
|
|
|
MODULE_DESCRIPTION("SCSI low-level driver for ARTOP PATA");
|
|
|
|
MODULE_LICENSE("GPL");
|
|
|
|
MODULE_DEVICE_TABLE(pci, artop_pci_tbl);
|
|
|
|
MODULE_VERSION(DRV_VERSION);
|