2020-05-01 14:58:50 +00:00
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// SPDX-License-Identifier: GPL-2.0-only
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2019-08-15 15:57:46 +00:00
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/*
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2020-12-29 08:51:03 +00:00
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* soc-acpi-intel-tgl-match.c - tables and support for TGL ACPI enumeration.
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2019-08-15 15:57:46 +00:00
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*
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* Copyright (c) 2019, Intel Corporation.
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*
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*/
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#include <sound/soc-acpi.h>
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#include <sound/soc-acpi-intel-match.h>
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2021-07-14 03:22:02 +00:00
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#include "soc-acpi-intel-sdw-mockup-match.h"
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2019-08-15 15:57:46 +00:00
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2020-12-03 15:40:10 +00:00
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static const struct snd_soc_acpi_codecs tgl_codecs = {
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2019-11-26 14:32:05 +00:00
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.num_codecs = 1,
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.codecs = {"MX98357A"}
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};
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2020-03-25 21:50:17 +00:00
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static const struct snd_soc_acpi_endpoint single_endpoint = {
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.num = 0,
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.aggregated = 0,
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.group_position = 0,
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.group_id = 0,
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2020-01-10 22:25:29 +00:00
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};
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2020-03-25 21:50:17 +00:00
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static const struct snd_soc_acpi_endpoint spk_l_endpoint = {
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.num = 0,
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.aggregated = 1,
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.group_position = 0,
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.group_id = 1,
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};
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static const struct snd_soc_acpi_endpoint spk_r_endpoint = {
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.num = 0,
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.aggregated = 1,
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.group_position = 1,
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.group_id = 1,
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};
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static const struct snd_soc_acpi_adr_device rt711_0_adr[] = {
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{
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2021-06-21 19:40:55 +00:00
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.adr = 0x000020025D071100ull,
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2020-03-25 21:50:17 +00:00
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.num_endpoints = 1,
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.endpoints = &single_endpoint,
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2020-09-23 08:05:11 +00:00
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.name_prefix = "rt711"
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2020-03-25 21:50:17 +00:00
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}
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};
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2020-09-23 08:05:14 +00:00
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static const struct snd_soc_acpi_adr_device rt711_1_adr[] = {
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{
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2021-06-21 19:40:55 +00:00
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.adr = 0x000120025D071100ull,
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2020-09-23 08:05:14 +00:00
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.num_endpoints = 1,
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.endpoints = &single_endpoint,
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.name_prefix = "rt711"
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}
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};
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2020-08-21 19:55:51 +00:00
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static const struct snd_soc_acpi_adr_device rt1308_1_dual_adr[] = {
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2020-03-25 21:50:17 +00:00
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{
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2021-06-21 19:40:55 +00:00
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.adr = 0x000120025D130800ull,
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2020-03-25 21:50:17 +00:00
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.num_endpoints = 1,
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.endpoints = &spk_l_endpoint,
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2020-09-23 08:05:11 +00:00
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.name_prefix = "rt1308-1"
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2020-03-25 21:50:17 +00:00
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},
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{
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2021-06-21 19:40:55 +00:00
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.adr = 0x000122025D130800ull,
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2020-03-25 21:50:17 +00:00
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.num_endpoints = 1,
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.endpoints = &spk_r_endpoint,
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2020-09-23 08:05:11 +00:00
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.name_prefix = "rt1308-2"
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2020-03-25 21:50:17 +00:00
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}
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2020-01-10 22:25:29 +00:00
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};
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2020-08-21 19:55:51 +00:00
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static const struct snd_soc_acpi_adr_device rt1308_1_single_adr[] = {
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{
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2021-06-21 19:40:55 +00:00
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.adr = 0x000120025D130800ull,
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2020-08-21 19:55:51 +00:00
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.num_endpoints = 1,
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.endpoints = &single_endpoint,
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2020-09-23 08:05:11 +00:00
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.name_prefix = "rt1308-1"
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2020-08-21 19:55:51 +00:00
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}
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};
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2020-09-23 08:05:14 +00:00
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static const struct snd_soc_acpi_adr_device rt1308_2_single_adr[] = {
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{
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2021-06-21 19:40:55 +00:00
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.adr = 0x000220025D130800ull,
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2020-09-23 08:05:14 +00:00
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.num_endpoints = 1,
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.endpoints = &single_endpoint,
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.name_prefix = "rt1308-1"
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}
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};
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2020-08-21 19:55:51 +00:00
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static const struct snd_soc_acpi_adr_device rt1308_1_group1_adr[] = {
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{
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2021-06-21 19:40:55 +00:00
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.adr = 0x000120025D130800ull,
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2020-08-21 19:55:51 +00:00
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.num_endpoints = 1,
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.endpoints = &spk_l_endpoint,
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2020-09-23 08:05:11 +00:00
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.name_prefix = "rt1308-1"
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2020-08-21 19:55:51 +00:00
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}
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};
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static const struct snd_soc_acpi_adr_device rt1308_2_group1_adr[] = {
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{
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2021-06-21 19:40:55 +00:00
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.adr = 0x000220025D130800ull,
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2020-08-21 19:55:51 +00:00
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.num_endpoints = 1,
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.endpoints = &spk_r_endpoint,
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2020-09-23 08:05:11 +00:00
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.name_prefix = "rt1308-2"
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2020-08-21 19:55:51 +00:00
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}
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};
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2020-09-23 08:05:14 +00:00
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static const struct snd_soc_acpi_adr_device rt715_0_adr[] = {
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{
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2021-06-21 19:40:55 +00:00
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.adr = 0x000021025D071500ull,
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2020-09-23 08:05:14 +00:00
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.num_endpoints = 1,
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.endpoints = &single_endpoint,
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.name_prefix = "rt715"
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}
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};
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2020-08-21 19:55:51 +00:00
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static const struct snd_soc_acpi_adr_device rt715_3_adr[] = {
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{
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2021-06-21 19:40:55 +00:00
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.adr = 0x000320025D071500ull,
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2020-08-21 19:55:51 +00:00
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.num_endpoints = 1,
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.endpoints = &single_endpoint,
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2020-09-23 08:05:11 +00:00
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.name_prefix = "rt715"
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2020-08-21 19:55:51 +00:00
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}
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};
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2020-06-25 19:27:08 +00:00
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static const struct snd_soc_acpi_adr_device mx8373_1_adr[] = {
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{
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2021-06-21 19:40:55 +00:00
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.adr = 0x000123019F837300ull,
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2020-06-25 19:27:08 +00:00
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.num_endpoints = 1,
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.endpoints = &spk_l_endpoint,
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2020-09-23 08:05:11 +00:00
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.name_prefix = "Right"
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2020-06-25 19:27:08 +00:00
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},
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{
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2021-06-21 19:40:55 +00:00
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.adr = 0x000127019F837300ull,
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2020-06-25 19:27:08 +00:00
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.num_endpoints = 1,
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.endpoints = &spk_r_endpoint,
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2020-09-23 08:05:11 +00:00
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.name_prefix = "Left"
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2020-06-25 19:27:08 +00:00
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}
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};
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2020-03-25 22:07:45 +00:00
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static const struct snd_soc_acpi_adr_device rt5682_0_adr[] = {
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{
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2021-06-21 19:40:55 +00:00
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.adr = 0x000021025D568200ull,
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2020-03-25 22:07:45 +00:00
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.num_endpoints = 1,
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.endpoints = &single_endpoint,
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2020-09-23 08:05:11 +00:00
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.name_prefix = "rt5682"
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2020-03-25 22:07:45 +00:00
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}
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};
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2020-08-21 19:55:52 +00:00
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static const struct snd_soc_acpi_adr_device rt711_sdca_0_adr[] = {
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{
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2021-06-21 19:40:55 +00:00
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.adr = 0x000030025D071101ull,
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2020-08-21 19:55:52 +00:00
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.num_endpoints = 1,
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.endpoints = &single_endpoint,
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2020-09-23 08:05:11 +00:00
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.name_prefix = "rt711"
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2020-08-21 19:55:52 +00:00
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}
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};
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2021-10-04 21:35:11 +00:00
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static const struct snd_soc_acpi_adr_device rt1316_1_single_adr[] = {
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{
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.adr = 0x000131025D131601ull,
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.num_endpoints = 1,
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.endpoints = &single_endpoint,
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.name_prefix = "rt1316-1"
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}
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};
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2020-08-21 19:55:52 +00:00
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static const struct snd_soc_acpi_adr_device rt1316_1_group1_adr[] = {
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{
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2021-06-21 19:40:55 +00:00
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.adr = 0x000131025D131601ull, /* unique ID is set for some reason */
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2020-08-21 19:55:52 +00:00
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.num_endpoints = 1,
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.endpoints = &spk_l_endpoint,
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2020-09-23 08:05:11 +00:00
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.name_prefix = "rt1316-1"
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2020-08-21 19:55:52 +00:00
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}
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};
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static const struct snd_soc_acpi_adr_device rt1316_2_group1_adr[] = {
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{
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2021-06-21 19:40:55 +00:00
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.adr = 0x000230025D131601ull,
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2020-08-21 19:55:52 +00:00
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.num_endpoints = 1,
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.endpoints = &spk_r_endpoint,
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2020-09-23 08:05:11 +00:00
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.name_prefix = "rt1316-2"
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2020-08-21 19:55:52 +00:00
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}
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};
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static const struct snd_soc_acpi_adr_device rt714_3_adr[] = {
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{
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2021-06-21 19:40:55 +00:00
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.adr = 0x000330025D071401ull,
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2020-08-21 19:55:52 +00:00
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.num_endpoints = 1,
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.endpoints = &single_endpoint,
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2020-09-23 08:05:11 +00:00
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.name_prefix = "rt714"
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2020-08-21 19:55:52 +00:00
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}
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};
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2020-01-10 22:25:29 +00:00
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static const struct snd_soc_acpi_link_adr tgl_rvp[] = {
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{
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.mask = BIT(0),
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.num_adr = ARRAY_SIZE(rt711_0_adr),
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2020-03-25 21:50:17 +00:00
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.adr_d = rt711_0_adr,
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2020-01-10 22:25:29 +00:00
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},
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{
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.mask = BIT(1),
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2020-08-21 19:55:51 +00:00
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.num_adr = ARRAY_SIZE(rt1308_1_dual_adr),
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.adr_d = rt1308_1_dual_adr,
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2020-01-10 22:25:29 +00:00
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},
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{}
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};
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2021-06-25 20:50:40 +00:00
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static const struct snd_soc_acpi_link_adr tgl_rvp_headset_only[] = {
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{
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.mask = BIT(0),
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.num_adr = ARRAY_SIZE(rt711_0_adr),
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.adr_d = rt711_0_adr,
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},
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{}
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};
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2021-02-08 23:33:32 +00:00
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static const struct snd_soc_acpi_link_adr tgl_hp[] = {
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{
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.mask = BIT(0),
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.num_adr = ARRAY_SIZE(rt711_0_adr),
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.adr_d = rt711_0_adr,
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},
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{
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.mask = BIT(1),
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.num_adr = ARRAY_SIZE(rt1308_1_single_adr),
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.adr_d = rt1308_1_single_adr,
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},
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{}
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};
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2020-03-25 22:07:45 +00:00
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static const struct snd_soc_acpi_link_adr tgl_chromebook_base[] = {
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{
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.mask = BIT(0),
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.num_adr = ARRAY_SIZE(rt5682_0_adr),
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.adr_d = rt5682_0_adr,
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},
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2020-06-25 19:27:08 +00:00
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{
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.mask = BIT(1),
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.num_adr = ARRAY_SIZE(mx8373_1_adr),
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.adr_d = mx8373_1_adr,
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},
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2020-03-25 22:07:45 +00:00
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{}
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};
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2020-08-21 19:55:51 +00:00
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static const struct snd_soc_acpi_link_adr tgl_3_in_1_default[] = {
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{
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.mask = BIT(0),
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.num_adr = ARRAY_SIZE(rt711_0_adr),
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.adr_d = rt711_0_adr,
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},
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{
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.mask = BIT(1),
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.num_adr = ARRAY_SIZE(rt1308_1_group1_adr),
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.adr_d = rt1308_1_group1_adr,
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},
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{
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.mask = BIT(2),
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.num_adr = ARRAY_SIZE(rt1308_2_group1_adr),
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.adr_d = rt1308_2_group1_adr,
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},
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{
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.mask = BIT(3),
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.num_adr = ARRAY_SIZE(rt715_3_adr),
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.adr_d = rt715_3_adr,
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},
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{}
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};
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static const struct snd_soc_acpi_link_adr tgl_3_in_1_mono_amp[] = {
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{
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.mask = BIT(0),
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.num_adr = ARRAY_SIZE(rt711_0_adr),
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.adr_d = rt711_0_adr,
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},
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{
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.mask = BIT(1),
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.num_adr = ARRAY_SIZE(rt1308_1_single_adr),
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.adr_d = rt1308_1_single_adr,
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},
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{
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.mask = BIT(3),
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.num_adr = ARRAY_SIZE(rt715_3_adr),
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.adr_d = rt715_3_adr,
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},
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{}
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};
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2020-09-23 08:05:14 +00:00
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static const struct snd_soc_acpi_link_adr tgl_sdw_rt711_link1_rt1308_link2_rt715_link0[] = {
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{
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.mask = BIT(1),
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.num_adr = ARRAY_SIZE(rt711_1_adr),
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.adr_d = rt711_1_adr,
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},
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{
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.mask = BIT(2),
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.num_adr = ARRAY_SIZE(rt1308_2_single_adr),
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.adr_d = rt1308_2_single_adr,
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},
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{
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.mask = BIT(0),
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.num_adr = ARRAY_SIZE(rt715_0_adr),
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.adr_d = rt715_0_adr,
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},
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{}
|
|
|
|
};
|
|
|
|
|
2020-08-21 19:55:52 +00:00
|
|
|
static const struct snd_soc_acpi_link_adr tgl_3_in_1_sdca[] = {
|
|
|
|
{
|
|
|
|
.mask = BIT(0),
|
|
|
|
.num_adr = ARRAY_SIZE(rt711_sdca_0_adr),
|
|
|
|
.adr_d = rt711_sdca_0_adr,
|
|
|
|
},
|
|
|
|
{
|
|
|
|
.mask = BIT(1),
|
|
|
|
.num_adr = ARRAY_SIZE(rt1316_1_group1_adr),
|
|
|
|
.adr_d = rt1316_1_group1_adr,
|
|
|
|
},
|
|
|
|
{
|
|
|
|
.mask = BIT(2),
|
|
|
|
.num_adr = ARRAY_SIZE(rt1316_2_group1_adr),
|
|
|
|
.adr_d = rt1316_2_group1_adr,
|
|
|
|
},
|
|
|
|
{
|
|
|
|
.mask = BIT(3),
|
|
|
|
.num_adr = ARRAY_SIZE(rt714_3_adr),
|
|
|
|
.adr_d = rt714_3_adr,
|
|
|
|
},
|
|
|
|
{}
|
|
|
|
};
|
|
|
|
|
2021-10-04 21:35:11 +00:00
|
|
|
static const struct snd_soc_acpi_link_adr tgl_3_in_1_sdca_mono[] = {
|
|
|
|
{
|
|
|
|
.mask = BIT(0),
|
|
|
|
.num_adr = ARRAY_SIZE(rt711_sdca_0_adr),
|
|
|
|
.adr_d = rt711_sdca_0_adr,
|
|
|
|
},
|
|
|
|
{
|
|
|
|
.mask = BIT(1),
|
|
|
|
.num_adr = ARRAY_SIZE(rt1316_1_single_adr),
|
|
|
|
.adr_d = rt1316_1_single_adr,
|
|
|
|
},
|
|
|
|
{
|
|
|
|
.mask = BIT(3),
|
|
|
|
.num_adr = ARRAY_SIZE(rt714_3_adr),
|
|
|
|
.adr_d = rt714_3_adr,
|
|
|
|
},
|
|
|
|
{}
|
|
|
|
};
|
|
|
|
|
2020-12-03 15:40:10 +00:00
|
|
|
static const struct snd_soc_acpi_codecs tgl_max98373_amp = {
|
2020-03-25 21:32:45 +00:00
|
|
|
.num_codecs = 1,
|
|
|
|
.codecs = {"MX98373"}
|
|
|
|
};
|
|
|
|
|
2020-12-03 15:40:10 +00:00
|
|
|
static const struct snd_soc_acpi_codecs tgl_rt1011_amp = {
|
|
|
|
.num_codecs = 1,
|
|
|
|
.codecs = {"10EC1011"}
|
|
|
|
};
|
|
|
|
|
2021-10-29 17:14:06 +00:00
|
|
|
static const struct snd_soc_acpi_codecs tgl_rt5682_rt5682s_hp = {
|
|
|
|
.num_codecs = 2,
|
|
|
|
.codecs = {"10EC5682", "RTL5682"},
|
|
|
|
};
|
|
|
|
|
2019-08-15 15:57:46 +00:00
|
|
|
struct snd_soc_acpi_mach snd_soc_acpi_intel_tgl_machines[] = {
|
2019-11-26 14:32:05 +00:00
|
|
|
{
|
2021-10-29 17:14:06 +00:00
|
|
|
.comp_ids = &tgl_rt5682_rt5682s_hp,
|
2021-09-27 14:32:49 +00:00
|
|
|
.drv_name = "tgl_mx98357_rt5682",
|
2019-11-26 14:32:05 +00:00
|
|
|
.machine_quirk = snd_soc_acpi_codec_list,
|
|
|
|
.quirk_data = &tgl_codecs,
|
|
|
|
.sof_fw_filename = "sof-tgl.ri",
|
|
|
|
.sof_tplg_filename = "sof-tgl-max98357a-rt5682.tplg",
|
|
|
|
},
|
2020-03-25 21:32:45 +00:00
|
|
|
{
|
2021-10-29 17:14:06 +00:00
|
|
|
.comp_ids = &tgl_rt5682_rt5682s_hp,
|
2021-06-21 19:40:50 +00:00
|
|
|
.drv_name = "tgl_mx98373_rt5682",
|
2020-03-25 21:32:45 +00:00
|
|
|
.machine_quirk = snd_soc_acpi_codec_list,
|
|
|
|
.quirk_data = &tgl_max98373_amp,
|
|
|
|
.sof_fw_filename = "sof-tgl.ri",
|
|
|
|
.sof_tplg_filename = "sof-tgl-max98373-rt5682.tplg",
|
|
|
|
},
|
2020-12-03 15:40:10 +00:00
|
|
|
{
|
2021-10-29 17:14:06 +00:00
|
|
|
.comp_ids = &tgl_rt5682_rt5682s_hp,
|
2020-12-03 15:40:10 +00:00
|
|
|
.drv_name = "tgl_rt1011_rt5682",
|
|
|
|
.machine_quirk = snd_soc_acpi_codec_list,
|
|
|
|
.quirk_data = &tgl_rt1011_amp,
|
|
|
|
.sof_fw_filename = "sof-tgl.ri",
|
|
|
|
.sof_tplg_filename = "sof-tgl-rt1011-rt5682.tplg",
|
|
|
|
},
|
2021-10-04 21:35:08 +00:00
|
|
|
{
|
|
|
|
.id = "ESSX8336",
|
|
|
|
.drv_name = "sof-essx8336",
|
|
|
|
.sof_fw_filename = "sof-tgl.ri",
|
|
|
|
.sof_tplg_filename = "sof-tgl-es8336.tplg",
|
|
|
|
},
|
2019-08-15 15:57:46 +00:00
|
|
|
{},
|
|
|
|
};
|
|
|
|
EXPORT_SYMBOL_GPL(snd_soc_acpi_intel_tgl_machines);
|
|
|
|
|
2020-01-10 22:25:29 +00:00
|
|
|
/* this table is used when there is no I2S codec present */
|
|
|
|
struct snd_soc_acpi_mach snd_soc_acpi_intel_tgl_sdw_machines[] = {
|
2021-07-14 03:22:02 +00:00
|
|
|
/* mockup tests need to be first */
|
|
|
|
{
|
|
|
|
.link_mask = GENMASK(3, 0),
|
|
|
|
.links = sdw_mockup_headset_2amps_mic,
|
|
|
|
.drv_name = "sof_sdw",
|
|
|
|
.sof_fw_filename = "sof-tgl.ri",
|
|
|
|
.sof_tplg_filename = "sof-tgl-rt711-rt1308-rt715.tplg",
|
|
|
|
},
|
|
|
|
{
|
|
|
|
.link_mask = BIT(0) | BIT(1) | BIT(3),
|
|
|
|
.links = sdw_mockup_headset_1amp_mic,
|
|
|
|
.drv_name = "sof_sdw",
|
|
|
|
.sof_fw_filename = "sof-tgl.ri",
|
|
|
|
.sof_tplg_filename = "sof-tgl-rt711-rt1308-mono-rt715.tplg",
|
|
|
|
},
|
|
|
|
{
|
|
|
|
.link_mask = BIT(0) | BIT(1) | BIT(2),
|
|
|
|
.links = sdw_mockup_mic_headset_1amp,
|
|
|
|
.drv_name = "sof_sdw",
|
|
|
|
.sof_fw_filename = "sof-tgl.ri",
|
|
|
|
.sof_tplg_filename = "sof-tgl-rt715-rt711-rt1308-mono.tplg",
|
|
|
|
},
|
2020-09-23 08:05:14 +00:00
|
|
|
{
|
|
|
|
.link_mask = 0x7,
|
|
|
|
.links = tgl_sdw_rt711_link1_rt1308_link2_rt715_link0,
|
|
|
|
.drv_name = "sof_sdw",
|
|
|
|
.sof_tplg_filename = "sof-tgl-rt715-rt711-rt1308-mono.tplg",
|
|
|
|
},
|
2020-08-21 19:55:51 +00:00
|
|
|
{
|
|
|
|
.link_mask = 0xF, /* 4 active links required */
|
|
|
|
.links = tgl_3_in_1_default,
|
|
|
|
.drv_name = "sof_sdw",
|
|
|
|
.sof_tplg_filename = "sof-tgl-rt711-rt1308-rt715.tplg",
|
|
|
|
},
|
|
|
|
{
|
|
|
|
/*
|
|
|
|
* link_mask should be 0xB, but all links are enabled by BIOS.
|
|
|
|
* This entry will be selected if there is no rt1308 exposed
|
|
|
|
* on link2 since it will fail to match the above entry.
|
|
|
|
*/
|
|
|
|
.link_mask = 0xF,
|
|
|
|
.links = tgl_3_in_1_mono_amp,
|
|
|
|
.drv_name = "sof_sdw",
|
|
|
|
.sof_tplg_filename = "sof-tgl-rt711-rt1308-mono-rt715.tplg",
|
|
|
|
},
|
2020-08-21 19:55:52 +00:00
|
|
|
{
|
|
|
|
.link_mask = 0xF, /* 4 active links required */
|
|
|
|
.links = tgl_3_in_1_sdca,
|
|
|
|
.drv_name = "sof_sdw",
|
|
|
|
.sof_tplg_filename = "sof-tgl-rt711-rt1316-rt714.tplg",
|
|
|
|
},
|
2021-10-04 21:35:11 +00:00
|
|
|
{
|
|
|
|
/*
|
|
|
|
* link_mask should be 0xB, but all links are enabled by BIOS.
|
|
|
|
* This entry will be selected if there is no rt1316 amplifier exposed
|
|
|
|
* on link2 since it will fail to match the above entry.
|
|
|
|
*/
|
|
|
|
|
|
|
|
.link_mask = 0xF, /* 4 active links required */
|
|
|
|
.links = tgl_3_in_1_sdca_mono,
|
|
|
|
.drv_name = "sof_sdw",
|
|
|
|
.sof_tplg_filename = "sof-tgl-rt711-l0-rt1316-l1-mono-rt714-l3.tplg",
|
|
|
|
},
|
|
|
|
|
2021-02-08 23:33:32 +00:00
|
|
|
{
|
|
|
|
.link_mask = 0x3, /* rt711 on link 0 and 1 rt1308 on link 1 */
|
|
|
|
.links = tgl_hp,
|
|
|
|
.drv_name = "sof_sdw",
|
|
|
|
.sof_tplg_filename = "sof-tgl-rt711-rt1308.tplg",
|
|
|
|
},
|
2020-01-10 22:25:29 +00:00
|
|
|
{
|
|
|
|
.link_mask = 0x3, /* rt711 on link 0 and 2 rt1308s on link 1 */
|
|
|
|
.links = tgl_rvp,
|
2020-03-25 22:07:43 +00:00
|
|
|
.drv_name = "sof_sdw",
|
2020-01-10 22:25:29 +00:00
|
|
|
.sof_tplg_filename = "sof-tgl-rt711-rt1308.tplg",
|
|
|
|
},
|
2020-06-25 19:27:08 +00:00
|
|
|
{
|
|
|
|
.link_mask = 0x3, /* rt5682 on link0 & 2xmax98373 on link 1 */
|
|
|
|
.links = tgl_chromebook_base,
|
|
|
|
.drv_name = "sof_sdw",
|
|
|
|
.sof_tplg_filename = "sof-tgl-sdw-max98373-rt5682.tplg",
|
|
|
|
},
|
2021-06-25 20:50:40 +00:00
|
|
|
{
|
|
|
|
.link_mask = 0x1, /* rt711 on link 0 */
|
|
|
|
.links = tgl_rvp_headset_only,
|
|
|
|
.drv_name = "sof_sdw",
|
|
|
|
.sof_tplg_filename = "sof-tgl-rt711.tplg",
|
|
|
|
},
|
2020-01-10 22:25:29 +00:00
|
|
|
{},
|
|
|
|
};
|
|
|
|
EXPORT_SYMBOL_GPL(snd_soc_acpi_intel_tgl_sdw_machines);
|