2011-12-14 15:03:26 +00:00
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/include/ "tegra30.dtsi"
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2012-08-09 11:00:38 +00:00
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/**
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* This file contains common DT entry for all fab version of Cardhu.
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* There is multiple fab version of Cardhu starting from A01 to A07.
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* Cardhu fab version A01 and A03 are not supported. Cardhu fab version
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* A02 will have different sets of GPIOs for fixed regulator compare to
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* Cardhu fab version A04. The Cardhu fab version A05, A06, A07 are
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* compatible with fab version A04. Based on Cardhu fab version, the
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* related dts file need to be chosen like for Cardhu fab version A02,
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* use tegra30-cardhu-a02.dts, Cardhu fab version A04 and later, use
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* tegra30-cardhu-a04.dts.
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* The identification of board is done in two ways, by looking the sticker
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* on PCB and by reading board id eeprom.
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* The stciker will have number like 600-81291-1000-002 C.3. In this 4th
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* number is the fab version like here it is 002 and hence fab version A02.
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* The (downstream internal) U-Boot of Cardhu display the board-id as
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* follows:
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* BoardID: 0C5B, SKU: 0A01, Fab: 02, Rev: 45.00
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* In this Fab version is 02 i.e. A02.
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* The BoardID I2C eeprom is interfaced through i2c5 (pwr_i2c address 0x56).
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* The location 0x8 of this eeprom contains the Fab version. It is 1 byte
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* wide.
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*/
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2011-12-14 15:03:26 +00:00
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/ {
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model = "NVIDIA Tegra30 Cardhu evaluation board";
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compatible = "nvidia,cardhu", "nvidia,tegra30";
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memory {
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2012-05-11 22:11:38 +00:00
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reg = <0x80000000 0x40000000>;
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2011-12-14 15:03:26 +00:00
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};
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2012-05-11 22:17:47 +00:00
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pinmux {
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2012-03-13 19:28:02 +00:00
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pinctrl-names = "default";
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pinctrl-0 = <&state_default>;
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state_default: pinmux {
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sdmmc1_clk_pz0 {
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nvidia,pins = "sdmmc1_clk_pz0";
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nvidia,function = "sdmmc1";
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nvidia,pull = <0>;
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nvidia,tristate = <0>;
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};
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sdmmc1_cmd_pz1 {
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nvidia,pins = "sdmmc1_cmd_pz1",
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"sdmmc1_dat0_py7",
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"sdmmc1_dat1_py6",
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"sdmmc1_dat2_py5",
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"sdmmc1_dat3_py4";
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nvidia,function = "sdmmc1";
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nvidia,pull = <2>;
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nvidia,tristate = <0>;
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};
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2012-09-21 08:54:59 +00:00
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sdmmc3_clk_pa6 {
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nvidia,pins = "sdmmc3_clk_pa6";
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nvidia,function = "sdmmc3";
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nvidia,pull = <0>;
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nvidia,tristate = <0>;
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};
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sdmmc3_cmd_pa7 {
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nvidia,pins = "sdmmc3_cmd_pa7",
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"sdmmc3_dat0_pb7",
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"sdmmc3_dat1_pb6",
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"sdmmc3_dat2_pb5",
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"sdmmc3_dat3_pb4";
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nvidia,function = "sdmmc3";
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nvidia,pull = <2>;
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nvidia,tristate = <0>;
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};
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2012-03-13 19:28:02 +00:00
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sdmmc4_clk_pcc4 {
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nvidia,pins = "sdmmc4_clk_pcc4",
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"sdmmc4_rst_n_pcc3";
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nvidia,function = "sdmmc4";
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nvidia,pull = <0>;
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nvidia,tristate = <0>;
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};
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sdmmc4_dat0_paa0 {
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nvidia,pins = "sdmmc4_dat0_paa0",
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"sdmmc4_dat1_paa1",
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"sdmmc4_dat2_paa2",
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"sdmmc4_dat3_paa3",
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"sdmmc4_dat4_paa4",
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"sdmmc4_dat5_paa5",
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"sdmmc4_dat6_paa6",
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"sdmmc4_dat7_paa7";
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nvidia,function = "sdmmc4";
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nvidia,pull = <2>;
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nvidia,tristate = <0>;
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};
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2012-03-27 18:41:37 +00:00
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dap2_fs_pa2 {
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nvidia,pins = "dap2_fs_pa2",
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"dap2_sclk_pa3",
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"dap2_din_pa4",
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"dap2_dout_pa5";
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nvidia,function = "i2s1";
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nvidia,pull = <0>;
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nvidia,tristate = <0>;
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};
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2012-09-21 08:54:59 +00:00
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sdio3 {
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nvidia,pins = "drive_sdio3";
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nvidia,high-speed-mode = <0>;
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nvidia,schmitt = <0>;
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nvidia,pull-down-strength = <46>;
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nvidia,pull-up-strength = <42>;
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nvidia,slew-rate-rising = <1>;
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nvidia,slew-rate-falling = <1>;
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};
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2013-01-16 13:06:12 +00:00
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uart3_txd_pw6 {
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nvidia,pins = "uart3_txd_pw6",
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"uart3_cts_n_pa1",
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"uart3_rts_n_pc0",
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"uart3_rxd_pw7";
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nvidia,function = "uartc";
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nvidia,pull = <0>;
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nvidia,tristate = <0>;
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};
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2012-03-13 19:28:02 +00:00
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};
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};
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2011-12-14 15:03:26 +00:00
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serial@70006000 {
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2012-05-11 23:32:56 +00:00
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status = "okay";
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2011-12-14 15:03:26 +00:00
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};
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2013-01-16 13:06:12 +00:00
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serial@70006200 {
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compatible = "nvidia,tegra30-hsuart";
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status = "okay";
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};
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2011-12-14 15:03:26 +00:00
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i2c@7000c000 {
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2012-05-11 23:32:56 +00:00
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status = "okay";
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2011-12-14 15:03:26 +00:00
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clock-frequency = <100000>;
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};
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i2c@7000c400 {
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2012-05-11 23:32:56 +00:00
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status = "okay";
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2011-12-14 15:03:26 +00:00
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clock-frequency = <100000>;
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};
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i2c@7000c500 {
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2012-05-11 23:32:56 +00:00
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status = "okay";
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2011-12-14 15:03:26 +00:00
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clock-frequency = <100000>;
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2012-04-23 12:11:36 +00:00
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/* ALS and Proximity sensor */
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isl29028@44 {
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compatible = "isil,isl29028";
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reg = <0x44>;
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interrupt-parent = <&gpio>;
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interrupts = <88 0x04>; /*gpio PL0 */
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};
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2011-12-14 15:03:26 +00:00
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};
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i2c@7000c700 {
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2012-05-11 23:32:56 +00:00
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status = "okay";
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2011-12-14 15:03:26 +00:00
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clock-frequency = <100000>;
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};
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i2c@7000d000 {
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2012-05-11 23:32:56 +00:00
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status = "okay";
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2011-12-14 15:03:26 +00:00
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clock-frequency = <100000>;
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2012-03-27 18:41:37 +00:00
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wm8903: wm8903@1a {
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compatible = "wlf,wm8903";
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reg = <0x1a>;
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interrupt-parent = <&gpio>;
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interrupts = <179 0x04>; /* gpio PW3 */
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gpio-controller;
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#gpio-cells = <2>;
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micdet-cfg = <0>;
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micdet-delay = <100>;
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gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>;
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};
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2012-05-10 20:38:45 +00:00
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tps62361 {
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compatible = "ti,tps62361";
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reg = <0x60>;
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regulator-name = "tps62361-vout";
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <1500000>;
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regulator-boot-on;
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regulator-always-on;
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ti,vsel0-state-high;
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ti,vsel1-state-high;
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};
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2012-08-09 11:00:37 +00:00
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pmic: tps65911@2d {
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compatible = "ti,tps65911";
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reg = <0x2d>;
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interrupts = <0 86 0x4>;
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#interrupt-cells = <2>;
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interrupt-controller;
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2012-09-11 17:42:26 +00:00
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ti,system-power-controller;
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2012-08-09 11:00:37 +00:00
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#gpio-cells = <2>;
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gpio-controller;
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vcc1-supply = <&vdd_ac_bat_reg>;
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vcc2-supply = <&vdd_ac_bat_reg>;
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vcc3-supply = <&vio_reg>;
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2012-08-09 11:00:39 +00:00
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vcc4-supply = <&vdd_5v0_reg>;
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2012-08-09 11:00:37 +00:00
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vcc5-supply = <&vdd_ac_bat_reg>;
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vcc6-supply = <&vdd2_reg>;
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vcc7-supply = <&vdd_ac_bat_reg>;
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vccio-supply = <&vdd_ac_bat_reg>;
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regulators {
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2012-09-20 23:04:06 +00:00
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vdd1_reg: vdd1 {
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2012-08-09 11:00:37 +00:00
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regulator-name = "vddio_ddr_1v2";
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <1200000>;
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regulator-always-on;
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};
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2012-09-20 23:04:06 +00:00
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vdd2_reg: vdd2 {
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2012-08-09 11:00:37 +00:00
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regulator-name = "vdd_1v5_gen";
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regulator-min-microvolt = <1500000>;
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regulator-max-microvolt = <1500000>;
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regulator-always-on;
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};
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2012-09-20 23:04:06 +00:00
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vddctrl_reg: vddctrl {
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2012-08-09 11:00:37 +00:00
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regulator-name = "vdd_cpu,vdd_sys";
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <1000000>;
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regulator-always-on;
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};
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2012-09-20 23:04:06 +00:00
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vio_reg: vio {
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2012-08-09 11:00:37 +00:00
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regulator-name = "vdd_1v8_gen";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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};
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2012-09-20 23:04:06 +00:00
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ldo1_reg: ldo1 {
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2012-08-09 11:00:37 +00:00
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regulator-name = "vdd_pexa,vdd_pexb";
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regulator-min-microvolt = <1050000>;
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regulator-max-microvolt = <1050000>;
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};
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2012-09-20 23:04:06 +00:00
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ldo2_reg: ldo2 {
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2012-08-09 11:00:37 +00:00
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regulator-name = "vdd_sata,avdd_plle";
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regulator-min-microvolt = <1050000>;
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regulator-max-microvolt = <1050000>;
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};
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/* LDO3 is not connected to anything */
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2012-09-20 23:04:06 +00:00
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ldo4_reg: ldo4 {
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2012-08-09 11:00:37 +00:00
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regulator-name = "vdd_rtc";
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <1200000>;
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regulator-always-on;
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};
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2012-09-20 23:04:06 +00:00
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ldo5_reg: ldo5 {
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2012-08-09 11:00:39 +00:00
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regulator-name = "vddio_sdmmc,avdd_vdac";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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2012-09-20 23:04:06 +00:00
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ldo6_reg: ldo6 {
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2012-08-09 11:00:37 +00:00
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regulator-name = "avdd_dsi_csi,pwrdet_mipi";
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <1200000>;
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};
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2012-09-20 23:04:06 +00:00
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ldo7_reg: ldo7 {
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2012-08-09 11:00:37 +00:00
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regulator-name = "vdd_pllm,x,u,a_p_c_s";
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <1200000>;
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regulator-always-on;
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};
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2012-09-20 23:04:06 +00:00
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ldo8_reg: ldo8 {
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2012-08-09 11:00:37 +00:00
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regulator-name = "vdd_ddr_hs";
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <1000000>;
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regulator-always-on;
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};
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};
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};
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2011-12-14 15:03:26 +00:00
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};
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2012-02-01 23:29:57 +00:00
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2012-10-31 09:02:54 +00:00
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spi@7000da00 {
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status = "okay";
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|
|
|
|
spi-max-frequency = <25000000>;
|
|
|
|
|
spi-flash@1 {
|
|
|
|
|
compatible = "winbond,w25q32";
|
|
|
|
|
reg = <1>;
|
|
|
|
|
spi-max-frequency = <20000000>;
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
2012-05-11 22:17:47 +00:00
|
|
|
ahub {
|
2012-05-11 23:32:56 +00:00
|
|
|
i2s@70080400 {
|
|
|
|
|
status = "okay";
|
2012-03-27 18:41:37 +00:00
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
2012-08-09 11:00:37 +00:00
|
|
|
pmc {
|
|
|
|
|
status = "okay";
|
|
|
|
|
nvidia,invert-interrupt;
|
|
|
|
|
};
|
|
|
|
|
|
2012-05-11 23:03:26 +00:00
|
|
|
sdhci@78000000 {
|
2012-05-11 23:32:56 +00:00
|
|
|
status = "okay";
|
2013-02-22 03:23:39 +00:00
|
|
|
cd-gpios = <&gpio 69 1>; /* gpio PI5 */
|
2012-05-11 23:03:26 +00:00
|
|
|
wp-gpios = <&gpio 155 0>; /* gpio PT3 */
|
|
|
|
|
power-gpios = <&gpio 31 0>; /* gpio PD7 */
|
2012-05-13 04:14:24 +00:00
|
|
|
bus-width = <4>;
|
2012-05-11 23:03:26 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
|
|
sdhci@78000600 {
|
2012-05-11 23:32:56 +00:00
|
|
|
status = "okay";
|
2012-05-13 04:14:24 +00:00
|
|
|
bus-width = <8>;
|
2012-05-11 23:03:26 +00:00
|
|
|
};
|
|
|
|
|
|
2012-08-09 11:00:37 +00:00
|
|
|
regulators {
|
|
|
|
|
compatible = "simple-bus";
|
|
|
|
|
#address-cells = <1>;
|
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
|
|
|
|
vdd_ac_bat_reg: regulator@0 {
|
|
|
|
|
compatible = "regulator-fixed";
|
|
|
|
|
reg = <0>;
|
|
|
|
|
regulator-name = "vdd_ac_bat";
|
|
|
|
|
regulator-min-microvolt = <5000000>;
|
|
|
|
|
regulator-max-microvolt = <5000000>;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
2012-08-09 11:00:39 +00:00
|
|
|
|
|
|
|
|
cam_1v8_reg: regulator@1 {
|
|
|
|
|
compatible = "regulator-fixed";
|
|
|
|
|
reg = <1>;
|
|
|
|
|
regulator-name = "cam_1v8";
|
|
|
|
|
regulator-min-microvolt = <1800000>;
|
|
|
|
|
regulator-max-microvolt = <1800000>;
|
|
|
|
|
enable-active-high;
|
|
|
|
|
gpio = <&gpio 220 0>; /* gpio PBB4 */
|
|
|
|
|
vin-supply = <&vio_reg>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
cp_5v_reg: regulator@2 {
|
|
|
|
|
compatible = "regulator-fixed";
|
|
|
|
|
reg = <2>;
|
|
|
|
|
regulator-name = "cp_5v";
|
|
|
|
|
regulator-min-microvolt = <5000000>;
|
|
|
|
|
regulator-max-microvolt = <5000000>;
|
|
|
|
|
regulator-boot-on;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
enable-active-high;
|
|
|
|
|
gpio = <&pmic 0 0>; /* PMIC TPS65911 GPIO0 */
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
emmc_3v3_reg: regulator@3 {
|
|
|
|
|
compatible = "regulator-fixed";
|
|
|
|
|
reg = <3>;
|
|
|
|
|
regulator-name = "emmc_3v3";
|
|
|
|
|
regulator-min-microvolt = <3300000>;
|
|
|
|
|
regulator-max-microvolt = <3300000>;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
regulator-boot-on;
|
|
|
|
|
enable-active-high;
|
|
|
|
|
gpio = <&gpio 25 0>; /* gpio PD1 */
|
|
|
|
|
vin-supply = <&sys_3v3_reg>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
modem_3v3_reg: regulator@4 {
|
|
|
|
|
compatible = "regulator-fixed";
|
|
|
|
|
reg = <4>;
|
|
|
|
|
regulator-name = "modem_3v3";
|
|
|
|
|
regulator-min-microvolt = <3300000>;
|
|
|
|
|
regulator-max-microvolt = <3300000>;
|
|
|
|
|
enable-active-high;
|
|
|
|
|
gpio = <&gpio 30 0>; /* gpio PD6 */
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
pex_hvdd_3v3_reg: regulator@5 {
|
|
|
|
|
compatible = "regulator-fixed";
|
|
|
|
|
reg = <5>;
|
|
|
|
|
regulator-name = "pex_hvdd_3v3";
|
|
|
|
|
regulator-min-microvolt = <3300000>;
|
|
|
|
|
regulator-max-microvolt = <3300000>;
|
|
|
|
|
enable-active-high;
|
|
|
|
|
gpio = <&gpio 95 0>; /* gpio PL7 */
|
|
|
|
|
vin-supply = <&sys_3v3_reg>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
vdd_cam1_ldo_reg: regulator@6 {
|
|
|
|
|
compatible = "regulator-fixed";
|
|
|
|
|
reg = <6>;
|
|
|
|
|
regulator-name = "vdd_cam1_ldo";
|
|
|
|
|
regulator-min-microvolt = <2800000>;
|
|
|
|
|
regulator-max-microvolt = <2800000>;
|
|
|
|
|
enable-active-high;
|
|
|
|
|
gpio = <&gpio 142 0>; /* gpio PR6 */
|
|
|
|
|
vin-supply = <&sys_3v3_reg>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
vdd_cam2_ldo_reg: regulator@7 {
|
|
|
|
|
compatible = "regulator-fixed";
|
|
|
|
|
reg = <7>;
|
|
|
|
|
regulator-name = "vdd_cam2_ldo";
|
|
|
|
|
regulator-min-microvolt = <2800000>;
|
|
|
|
|
regulator-max-microvolt = <2800000>;
|
|
|
|
|
enable-active-high;
|
|
|
|
|
gpio = <&gpio 143 0>; /* gpio PR7 */
|
|
|
|
|
vin-supply = <&sys_3v3_reg>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
vdd_cam3_ldo_reg: regulator@8 {
|
|
|
|
|
compatible = "regulator-fixed";
|
|
|
|
|
reg = <8>;
|
|
|
|
|
regulator-name = "vdd_cam3_ldo";
|
|
|
|
|
regulator-min-microvolt = <3300000>;
|
|
|
|
|
regulator-max-microvolt = <3300000>;
|
|
|
|
|
enable-active-high;
|
|
|
|
|
gpio = <&gpio 144 0>; /* gpio PS0 */
|
|
|
|
|
vin-supply = <&sys_3v3_reg>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
vdd_com_reg: regulator@9 {
|
|
|
|
|
compatible = "regulator-fixed";
|
|
|
|
|
reg = <9>;
|
|
|
|
|
regulator-name = "vdd_com";
|
|
|
|
|
regulator-min-microvolt = <3300000>;
|
|
|
|
|
regulator-max-microvolt = <3300000>;
|
2012-09-21 08:54:59 +00:00
|
|
|
regulator-always-on;
|
|
|
|
|
regulator-boot-on;
|
2012-08-09 11:00:39 +00:00
|
|
|
enable-active-high;
|
|
|
|
|
gpio = <&gpio 24 0>; /* gpio PD0 */
|
|
|
|
|
vin-supply = <&sys_3v3_reg>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
vdd_fuse_3v3_reg: regulator@10 {
|
|
|
|
|
compatible = "regulator-fixed";
|
|
|
|
|
reg = <10>;
|
|
|
|
|
regulator-name = "vdd_fuse_3v3";
|
|
|
|
|
regulator-min-microvolt = <3300000>;
|
|
|
|
|
regulator-max-microvolt = <3300000>;
|
|
|
|
|
enable-active-high;
|
|
|
|
|
gpio = <&gpio 94 0>; /* gpio PL6 */
|
|
|
|
|
vin-supply = <&sys_3v3_reg>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
vdd_pnl1_reg: regulator@11 {
|
|
|
|
|
compatible = "regulator-fixed";
|
|
|
|
|
reg = <11>;
|
|
|
|
|
regulator-name = "vdd_pnl1";
|
|
|
|
|
regulator-min-microvolt = <3300000>;
|
|
|
|
|
regulator-max-microvolt = <3300000>;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
regulator-boot-on;
|
|
|
|
|
enable-active-high;
|
|
|
|
|
gpio = <&gpio 92 0>; /* gpio PL4 */
|
|
|
|
|
vin-supply = <&sys_3v3_reg>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
vdd_vid_reg: regulator@12 {
|
|
|
|
|
compatible = "regulator-fixed";
|
|
|
|
|
reg = <12>;
|
|
|
|
|
regulator-name = "vddio_vid";
|
|
|
|
|
regulator-min-microvolt = <5000000>;
|
|
|
|
|
regulator-max-microvolt = <5000000>;
|
|
|
|
|
enable-active-high;
|
|
|
|
|
gpio = <&gpio 152 0>; /* GPIO PT0 */
|
|
|
|
|
gpio-open-drain;
|
|
|
|
|
vin-supply = <&vdd_5v0_reg>;
|
|
|
|
|
};
|
2012-08-09 11:00:37 +00:00
|
|
|
};
|
|
|
|
|
|
2012-03-27 18:41:37 +00:00
|
|
|
sound {
|
|
|
|
|
compatible = "nvidia,tegra-audio-wm8903-cardhu",
|
|
|
|
|
"nvidia,tegra-audio-wm8903";
|
|
|
|
|
nvidia,model = "NVIDIA Tegra Cardhu";
|
|
|
|
|
|
|
|
|
|
nvidia,audio-routing =
|
|
|
|
|
"Headphone Jack", "HPOUTR",
|
|
|
|
|
"Headphone Jack", "HPOUTL",
|
|
|
|
|
"Int Spk", "ROP",
|
|
|
|
|
"Int Spk", "RON",
|
|
|
|
|
"Int Spk", "LOP",
|
|
|
|
|
"Int Spk", "LON",
|
|
|
|
|
"Mic Jack", "MICBIAS",
|
|
|
|
|
"IN1L", "Mic Jack";
|
|
|
|
|
|
|
|
|
|
nvidia,i2s-controller = <&tegra_i2s1>;
|
|
|
|
|
nvidia,audio-codec = <&wm8903>;
|
|
|
|
|
|
|
|
|
|
nvidia,spkr-en-gpios = <&wm8903 2 0>;
|
|
|
|
|
nvidia,hp-det-gpios = <&gpio 178 0>; /* gpio PW2 */
|
|
|
|
|
};
|
2011-12-14 15:03:26 +00:00
|
|
|
};
|
