2008-11-26 16:21:24 +00:00
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/*
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* Copyright (C) 2007-2008 Advanced Micro Devices, Inc.
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* Author: Joerg Roedel <joerg.roedel@amd.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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iommu/core: split mapping to page sizes as supported by the hardware
When mapping a memory region, split it to page sizes as supported
by the iommu hardware. Always prefer bigger pages, when possible,
in order to reduce the TLB pressure.
The logic to do that is now added to the IOMMU core, so neither the iommu
drivers themselves nor users of the IOMMU API have to duplicate it.
This allows a more lenient granularity of mappings; traditionally the
IOMMU API took 'order' (of a page) as a mapping size, and directly let
the low level iommu drivers handle the mapping, but now that the IOMMU
core can split arbitrary memory regions into pages, we can remove this
limitation, so users don't have to split those regions by themselves.
Currently the supported page sizes are advertised once and they then
remain static. That works well for OMAP and MSM but it would probably
not fly well with intel's hardware, where the page size capabilities
seem to have the potential to be different between several DMA
remapping devices.
register_iommu() currently sets a default pgsize behavior, so we can convert
the IOMMU drivers in subsequent patches. After all the drivers
are converted, the temporary default settings will be removed.
Mainline users of the IOMMU API (kvm and omap-iovmm) are adopted
to deal with bytes instead of page order.
Many thanks to Joerg Roedel <Joerg.Roedel@amd.com> for significant review!
Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com>
Cc: David Brown <davidb@codeaurora.org>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Joerg Roedel <Joerg.Roedel@amd.com>
Cc: Stepan Moskovchenko <stepanm@codeaurora.org>
Cc: KyongHo Cho <pullip.cho@samsung.com>
Cc: Hiroshi DOYU <hdoyu@nvidia.com>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: kvm@vger.kernel.org
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2011-11-10 09:32:26 +00:00
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#define pr_fmt(fmt) "%s: " fmt, __func__
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2011-09-06 14:03:26 +00:00
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#include <linux/device.h>
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2011-09-02 17:32:32 +00:00
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#include <linux/kernel.h>
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2008-11-26 16:21:24 +00:00
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#include <linux/bug.h>
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#include <linux/types.h>
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2009-05-06 23:03:07 +00:00
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#include <linux/module.h>
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#include <linux/slab.h>
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2008-11-26 16:21:24 +00:00
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#include <linux/errno.h>
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#include <linux/iommu.h>
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2011-10-21 19:56:05 +00:00
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static ssize_t show_iommu_group(struct device *dev,
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struct device_attribute *attr, char *buf)
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{
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unsigned int groupid;
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if (iommu_device_group(dev, &groupid))
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return 0;
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return sprintf(buf, "%u", groupid);
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}
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static DEVICE_ATTR(iommu_group, S_IRUGO, show_iommu_group, NULL);
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static int add_iommu_group(struct device *dev, void *data)
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{
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unsigned int groupid;
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if (iommu_device_group(dev, &groupid) == 0)
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return device_create_file(dev, &dev_attr_iommu_group);
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return 0;
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}
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static int remove_iommu_group(struct device *dev)
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{
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unsigned int groupid;
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if (iommu_device_group(dev, &groupid) == 0)
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device_remove_file(dev, &dev_attr_iommu_group);
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return 0;
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}
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static int iommu_device_notifier(struct notifier_block *nb,
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unsigned long action, void *data)
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{
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struct device *dev = data;
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if (action == BUS_NOTIFY_ADD_DEVICE)
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return add_iommu_group(dev, NULL);
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else if (action == BUS_NOTIFY_DEL_DEVICE)
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return remove_iommu_group(dev);
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return 0;
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}
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static struct notifier_block iommu_device_nb = {
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.notifier_call = iommu_device_notifier,
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};
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2011-08-26 14:48:26 +00:00
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static void iommu_bus_init(struct bus_type *bus, struct iommu_ops *ops)
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{
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2011-10-21 19:56:05 +00:00
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bus_register_notifier(bus, &iommu_device_nb);
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bus_for_each_dev(bus, NULL, NULL, add_iommu_group);
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2011-08-26 14:48:26 +00:00
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}
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2008-11-26 16:21:24 +00:00
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2011-08-26 14:48:26 +00:00
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/**
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* bus_set_iommu - set iommu-callbacks for the bus
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* @bus: bus.
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* @ops: the callbacks provided by the iommu-driver
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*
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* This function is called by an iommu driver to set the iommu methods
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* used for a particular bus. Drivers for devices on that bus can use
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* the iommu-api after these ops are registered.
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* This special function is needed because IOMMUs are usually devices on
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* the bus itself, so the iommu drivers are not initialized when the bus
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* is set up. With this function the iommu-driver can set the iommu-ops
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* afterwards.
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*/
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int bus_set_iommu(struct bus_type *bus, struct iommu_ops *ops)
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2008-11-26 16:21:24 +00:00
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{
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2011-08-26 14:48:26 +00:00
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if (bus->iommu_ops != NULL)
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return -EBUSY;
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2008-11-26 16:21:24 +00:00
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2011-08-26 14:48:26 +00:00
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bus->iommu_ops = ops;
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/* Do IOMMU specific setup for this bus-type */
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iommu_bus_init(bus, ops);
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2008-11-26 16:21:24 +00:00
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2011-08-26 14:48:26 +00:00
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return 0;
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2008-11-26 16:21:24 +00:00
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}
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2011-08-26 14:48:26 +00:00
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EXPORT_SYMBOL_GPL(bus_set_iommu);
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2008-11-26 16:21:24 +00:00
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2011-09-06 16:46:34 +00:00
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bool iommu_present(struct bus_type *bus)
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2008-11-26 16:21:24 +00:00
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{
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2011-09-06 16:58:54 +00:00
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return bus->iommu_ops != NULL;
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2008-11-26 16:21:24 +00:00
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}
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2011-09-06 16:46:34 +00:00
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EXPORT_SYMBOL_GPL(iommu_present);
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2008-11-26 16:21:24 +00:00
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2011-09-13 19:25:23 +00:00
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/**
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* iommu_set_fault_handler() - set a fault handler for an iommu domain
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* @domain: iommu domain
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* @handler: fault handler
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2012-05-21 17:20:05 +00:00
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* @token: user data, will be passed back to the fault handler
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2011-09-27 11:36:40 +00:00
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*
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* This function should be used by IOMMU users which want to be notified
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* whenever an IOMMU fault happens.
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*
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* The fault handler itself should return 0 on success, and an appropriate
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* error code otherwise.
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2011-09-13 19:25:23 +00:00
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*/
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void iommu_set_fault_handler(struct iommu_domain *domain,
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2012-05-21 17:20:05 +00:00
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iommu_fault_handler_t handler,
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void *token)
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2011-09-13 19:25:23 +00:00
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{
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BUG_ON(!domain);
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domain->handler = handler;
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2012-05-21 17:20:05 +00:00
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domain->handler_token = token;
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2011-09-13 19:25:23 +00:00
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}
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2011-09-26 13:11:46 +00:00
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EXPORT_SYMBOL_GPL(iommu_set_fault_handler);
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2011-09-13 19:25:23 +00:00
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2011-09-06 14:03:26 +00:00
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struct iommu_domain *iommu_domain_alloc(struct bus_type *bus)
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2008-11-26 16:21:24 +00:00
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{
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struct iommu_domain *domain;
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int ret;
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2011-09-06 16:58:54 +00:00
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if (bus == NULL || bus->iommu_ops == NULL)
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2011-09-06 14:03:26 +00:00
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return NULL;
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2011-12-16 12:38:25 +00:00
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domain = kzalloc(sizeof(*domain), GFP_KERNEL);
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2008-11-26 16:21:24 +00:00
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if (!domain)
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return NULL;
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2011-09-06 16:58:54 +00:00
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domain->ops = bus->iommu_ops;
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2011-09-06 14:03:26 +00:00
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2011-09-06 16:58:54 +00:00
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ret = domain->ops->domain_init(domain);
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2008-11-26 16:21:24 +00:00
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if (ret)
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goto out_free;
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return domain;
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out_free:
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kfree(domain);
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return NULL;
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}
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EXPORT_SYMBOL_GPL(iommu_domain_alloc);
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void iommu_domain_free(struct iommu_domain *domain)
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{
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2011-09-06 14:44:29 +00:00
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if (likely(domain->ops->domain_destroy != NULL))
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domain->ops->domain_destroy(domain);
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2008-11-26 16:21:24 +00:00
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kfree(domain);
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}
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EXPORT_SYMBOL_GPL(iommu_domain_free);
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int iommu_attach_device(struct iommu_domain *domain, struct device *dev)
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{
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2011-09-06 14:44:29 +00:00
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if (unlikely(domain->ops->attach_dev == NULL))
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return -ENODEV;
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return domain->ops->attach_dev(domain, dev);
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2008-11-26 16:21:24 +00:00
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}
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EXPORT_SYMBOL_GPL(iommu_attach_device);
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void iommu_detach_device(struct iommu_domain *domain, struct device *dev)
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{
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2011-09-06 14:44:29 +00:00
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if (unlikely(domain->ops->detach_dev == NULL))
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return;
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domain->ops->detach_dev(domain, dev);
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2008-11-26 16:21:24 +00:00
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}
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EXPORT_SYMBOL_GPL(iommu_detach_device);
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phys_addr_t iommu_iova_to_phys(struct iommu_domain *domain,
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unsigned long iova)
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{
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2011-09-06 14:44:29 +00:00
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if (unlikely(domain->ops->iova_to_phys == NULL))
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return 0;
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return domain->ops->iova_to_phys(domain, iova);
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2008-11-26 16:21:24 +00:00
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}
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EXPORT_SYMBOL_GPL(iommu_iova_to_phys);
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2009-03-18 07:33:06 +00:00
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int iommu_domain_has_cap(struct iommu_domain *domain,
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unsigned long cap)
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{
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2011-09-06 14:44:29 +00:00
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if (unlikely(domain->ops->domain_has_cap == NULL))
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return 0;
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return domain->ops->domain_has_cap(domain, cap);
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2009-03-18 07:33:06 +00:00
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}
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EXPORT_SYMBOL_GPL(iommu_domain_has_cap);
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2010-01-08 12:35:09 +00:00
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int iommu_map(struct iommu_domain *domain, unsigned long iova,
|
iommu/core: split mapping to page sizes as supported by the hardware
When mapping a memory region, split it to page sizes as supported
by the iommu hardware. Always prefer bigger pages, when possible,
in order to reduce the TLB pressure.
The logic to do that is now added to the IOMMU core, so neither the iommu
drivers themselves nor users of the IOMMU API have to duplicate it.
This allows a more lenient granularity of mappings; traditionally the
IOMMU API took 'order' (of a page) as a mapping size, and directly let
the low level iommu drivers handle the mapping, but now that the IOMMU
core can split arbitrary memory regions into pages, we can remove this
limitation, so users don't have to split those regions by themselves.
Currently the supported page sizes are advertised once and they then
remain static. That works well for OMAP and MSM but it would probably
not fly well with intel's hardware, where the page size capabilities
seem to have the potential to be different between several DMA
remapping devices.
register_iommu() currently sets a default pgsize behavior, so we can convert
the IOMMU drivers in subsequent patches. After all the drivers
are converted, the temporary default settings will be removed.
Mainline users of the IOMMU API (kvm and omap-iovmm) are adopted
to deal with bytes instead of page order.
Many thanks to Joerg Roedel <Joerg.Roedel@amd.com> for significant review!
Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com>
Cc: David Brown <davidb@codeaurora.org>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Joerg Roedel <Joerg.Roedel@amd.com>
Cc: Stepan Moskovchenko <stepanm@codeaurora.org>
Cc: KyongHo Cho <pullip.cho@samsung.com>
Cc: Hiroshi DOYU <hdoyu@nvidia.com>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: kvm@vger.kernel.org
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2011-11-10 09:32:26 +00:00
|
|
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phys_addr_t paddr, size_t size, int prot)
|
2010-01-08 12:35:09 +00:00
|
|
|
{
|
iommu/core: split mapping to page sizes as supported by the hardware
When mapping a memory region, split it to page sizes as supported
by the iommu hardware. Always prefer bigger pages, when possible,
in order to reduce the TLB pressure.
The logic to do that is now added to the IOMMU core, so neither the iommu
drivers themselves nor users of the IOMMU API have to duplicate it.
This allows a more lenient granularity of mappings; traditionally the
IOMMU API took 'order' (of a page) as a mapping size, and directly let
the low level iommu drivers handle the mapping, but now that the IOMMU
core can split arbitrary memory regions into pages, we can remove this
limitation, so users don't have to split those regions by themselves.
Currently the supported page sizes are advertised once and they then
remain static. That works well for OMAP and MSM but it would probably
not fly well with intel's hardware, where the page size capabilities
seem to have the potential to be different between several DMA
remapping devices.
register_iommu() currently sets a default pgsize behavior, so we can convert
the IOMMU drivers in subsequent patches. After all the drivers
are converted, the temporary default settings will be removed.
Mainline users of the IOMMU API (kvm and omap-iovmm) are adopted
to deal with bytes instead of page order.
Many thanks to Joerg Roedel <Joerg.Roedel@amd.com> for significant review!
Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com>
Cc: David Brown <davidb@codeaurora.org>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Joerg Roedel <Joerg.Roedel@amd.com>
Cc: Stepan Moskovchenko <stepanm@codeaurora.org>
Cc: KyongHo Cho <pullip.cho@samsung.com>
Cc: Hiroshi DOYU <hdoyu@nvidia.com>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: kvm@vger.kernel.org
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2011-11-10 09:32:26 +00:00
|
|
|
unsigned long orig_iova = iova;
|
|
|
|
unsigned int min_pagesz;
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|
|
|
size_t orig_size = size;
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|
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int ret = 0;
|
2010-01-08 12:35:09 +00:00
|
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|
2011-09-06 14:44:29 +00:00
|
|
|
if (unlikely(domain->ops->map == NULL))
|
|
|
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return -ENODEV;
|
2010-01-08 12:35:09 +00:00
|
|
|
|
iommu/core: split mapping to page sizes as supported by the hardware
When mapping a memory region, split it to page sizes as supported
by the iommu hardware. Always prefer bigger pages, when possible,
in order to reduce the TLB pressure.
The logic to do that is now added to the IOMMU core, so neither the iommu
drivers themselves nor users of the IOMMU API have to duplicate it.
This allows a more lenient granularity of mappings; traditionally the
IOMMU API took 'order' (of a page) as a mapping size, and directly let
the low level iommu drivers handle the mapping, but now that the IOMMU
core can split arbitrary memory regions into pages, we can remove this
limitation, so users don't have to split those regions by themselves.
Currently the supported page sizes are advertised once and they then
remain static. That works well for OMAP and MSM but it would probably
not fly well with intel's hardware, where the page size capabilities
seem to have the potential to be different between several DMA
remapping devices.
register_iommu() currently sets a default pgsize behavior, so we can convert
the IOMMU drivers in subsequent patches. After all the drivers
are converted, the temporary default settings will be removed.
Mainline users of the IOMMU API (kvm and omap-iovmm) are adopted
to deal with bytes instead of page order.
Many thanks to Joerg Roedel <Joerg.Roedel@amd.com> for significant review!
Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com>
Cc: David Brown <davidb@codeaurora.org>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Joerg Roedel <Joerg.Roedel@amd.com>
Cc: Stepan Moskovchenko <stepanm@codeaurora.org>
Cc: KyongHo Cho <pullip.cho@samsung.com>
Cc: Hiroshi DOYU <hdoyu@nvidia.com>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: kvm@vger.kernel.org
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2011-11-10 09:32:26 +00:00
|
|
|
/* find out the minimum page size supported */
|
|
|
|
min_pagesz = 1 << __ffs(domain->ops->pgsize_bitmap);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* both the virtual address and the physical one, as well as
|
|
|
|
* the size of the mapping, must be aligned (at least) to the
|
|
|
|
* size of the smallest page supported by the hardware
|
|
|
|
*/
|
|
|
|
if (!IS_ALIGNED(iova | paddr | size, min_pagesz)) {
|
|
|
|
pr_err("unaligned: iova 0x%lx pa 0x%lx size 0x%lx min_pagesz "
|
|
|
|
"0x%x\n", iova, (unsigned long)paddr,
|
|
|
|
(unsigned long)size, min_pagesz);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
pr_debug("map: iova 0x%lx pa 0x%lx size 0x%lx\n", iova,
|
|
|
|
(unsigned long)paddr, (unsigned long)size);
|
|
|
|
|
|
|
|
while (size) {
|
|
|
|
unsigned long pgsize, addr_merge = iova | paddr;
|
|
|
|
unsigned int pgsize_idx;
|
|
|
|
|
|
|
|
/* Max page size that still fits into 'size' */
|
|
|
|
pgsize_idx = __fls(size);
|
|
|
|
|
|
|
|
/* need to consider alignment requirements ? */
|
|
|
|
if (likely(addr_merge)) {
|
|
|
|
/* Max page size allowed by both iova and paddr */
|
|
|
|
unsigned int align_pgsize_idx = __ffs(addr_merge);
|
|
|
|
|
|
|
|
pgsize_idx = min(pgsize_idx, align_pgsize_idx);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* build a mask of acceptable page sizes */
|
|
|
|
pgsize = (1UL << (pgsize_idx + 1)) - 1;
|
|
|
|
|
|
|
|
/* throw away page sizes not supported by the hardware */
|
|
|
|
pgsize &= domain->ops->pgsize_bitmap;
|
2010-01-08 12:35:09 +00:00
|
|
|
|
iommu/core: split mapping to page sizes as supported by the hardware
When mapping a memory region, split it to page sizes as supported
by the iommu hardware. Always prefer bigger pages, when possible,
in order to reduce the TLB pressure.
The logic to do that is now added to the IOMMU core, so neither the iommu
drivers themselves nor users of the IOMMU API have to duplicate it.
This allows a more lenient granularity of mappings; traditionally the
IOMMU API took 'order' (of a page) as a mapping size, and directly let
the low level iommu drivers handle the mapping, but now that the IOMMU
core can split arbitrary memory regions into pages, we can remove this
limitation, so users don't have to split those regions by themselves.
Currently the supported page sizes are advertised once and they then
remain static. That works well for OMAP and MSM but it would probably
not fly well with intel's hardware, where the page size capabilities
seem to have the potential to be different between several DMA
remapping devices.
register_iommu() currently sets a default pgsize behavior, so we can convert
the IOMMU drivers in subsequent patches. After all the drivers
are converted, the temporary default settings will be removed.
Mainline users of the IOMMU API (kvm and omap-iovmm) are adopted
to deal with bytes instead of page order.
Many thanks to Joerg Roedel <Joerg.Roedel@amd.com> for significant review!
Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com>
Cc: David Brown <davidb@codeaurora.org>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Joerg Roedel <Joerg.Roedel@amd.com>
Cc: Stepan Moskovchenko <stepanm@codeaurora.org>
Cc: KyongHo Cho <pullip.cho@samsung.com>
Cc: Hiroshi DOYU <hdoyu@nvidia.com>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: kvm@vger.kernel.org
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2011-11-10 09:32:26 +00:00
|
|
|
/* make sure we're still sane */
|
|
|
|
BUG_ON(!pgsize);
|
2010-01-08 12:35:09 +00:00
|
|
|
|
iommu/core: split mapping to page sizes as supported by the hardware
When mapping a memory region, split it to page sizes as supported
by the iommu hardware. Always prefer bigger pages, when possible,
in order to reduce the TLB pressure.
The logic to do that is now added to the IOMMU core, so neither the iommu
drivers themselves nor users of the IOMMU API have to duplicate it.
This allows a more lenient granularity of mappings; traditionally the
IOMMU API took 'order' (of a page) as a mapping size, and directly let
the low level iommu drivers handle the mapping, but now that the IOMMU
core can split arbitrary memory regions into pages, we can remove this
limitation, so users don't have to split those regions by themselves.
Currently the supported page sizes are advertised once and they then
remain static. That works well for OMAP and MSM but it would probably
not fly well with intel's hardware, where the page size capabilities
seem to have the potential to be different between several DMA
remapping devices.
register_iommu() currently sets a default pgsize behavior, so we can convert
the IOMMU drivers in subsequent patches. After all the drivers
are converted, the temporary default settings will be removed.
Mainline users of the IOMMU API (kvm and omap-iovmm) are adopted
to deal with bytes instead of page order.
Many thanks to Joerg Roedel <Joerg.Roedel@amd.com> for significant review!
Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com>
Cc: David Brown <davidb@codeaurora.org>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Joerg Roedel <Joerg.Roedel@amd.com>
Cc: Stepan Moskovchenko <stepanm@codeaurora.org>
Cc: KyongHo Cho <pullip.cho@samsung.com>
Cc: Hiroshi DOYU <hdoyu@nvidia.com>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: kvm@vger.kernel.org
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2011-11-10 09:32:26 +00:00
|
|
|
/* pick the biggest page */
|
|
|
|
pgsize_idx = __fls(pgsize);
|
|
|
|
pgsize = 1UL << pgsize_idx;
|
|
|
|
|
|
|
|
pr_debug("mapping: iova 0x%lx pa 0x%lx pgsize %lu\n", iova,
|
|
|
|
(unsigned long)paddr, pgsize);
|
|
|
|
|
|
|
|
ret = domain->ops->map(domain, iova, paddr, pgsize, prot);
|
|
|
|
if (ret)
|
|
|
|
break;
|
|
|
|
|
|
|
|
iova += pgsize;
|
|
|
|
paddr += pgsize;
|
|
|
|
size -= pgsize;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* unroll mapping in case something went wrong */
|
|
|
|
if (ret)
|
|
|
|
iommu_unmap(domain, orig_iova, orig_size - size);
|
|
|
|
|
|
|
|
return ret;
|
2010-01-08 12:35:09 +00:00
|
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(iommu_map);
|
|
|
|
|
iommu/core: split mapping to page sizes as supported by the hardware
When mapping a memory region, split it to page sizes as supported
by the iommu hardware. Always prefer bigger pages, when possible,
in order to reduce the TLB pressure.
The logic to do that is now added to the IOMMU core, so neither the iommu
drivers themselves nor users of the IOMMU API have to duplicate it.
This allows a more lenient granularity of mappings; traditionally the
IOMMU API took 'order' (of a page) as a mapping size, and directly let
the low level iommu drivers handle the mapping, but now that the IOMMU
core can split arbitrary memory regions into pages, we can remove this
limitation, so users don't have to split those regions by themselves.
Currently the supported page sizes are advertised once and they then
remain static. That works well for OMAP and MSM but it would probably
not fly well with intel's hardware, where the page size capabilities
seem to have the potential to be different between several DMA
remapping devices.
register_iommu() currently sets a default pgsize behavior, so we can convert
the IOMMU drivers in subsequent patches. After all the drivers
are converted, the temporary default settings will be removed.
Mainline users of the IOMMU API (kvm and omap-iovmm) are adopted
to deal with bytes instead of page order.
Many thanks to Joerg Roedel <Joerg.Roedel@amd.com> for significant review!
Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com>
Cc: David Brown <davidb@codeaurora.org>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Joerg Roedel <Joerg.Roedel@amd.com>
Cc: Stepan Moskovchenko <stepanm@codeaurora.org>
Cc: KyongHo Cho <pullip.cho@samsung.com>
Cc: Hiroshi DOYU <hdoyu@nvidia.com>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: kvm@vger.kernel.org
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2011-11-10 09:32:26 +00:00
|
|
|
size_t iommu_unmap(struct iommu_domain *domain, unsigned long iova, size_t size)
|
2010-01-08 12:35:09 +00:00
|
|
|
{
|
iommu/core: split mapping to page sizes as supported by the hardware
When mapping a memory region, split it to page sizes as supported
by the iommu hardware. Always prefer bigger pages, when possible,
in order to reduce the TLB pressure.
The logic to do that is now added to the IOMMU core, so neither the iommu
drivers themselves nor users of the IOMMU API have to duplicate it.
This allows a more lenient granularity of mappings; traditionally the
IOMMU API took 'order' (of a page) as a mapping size, and directly let
the low level iommu drivers handle the mapping, but now that the IOMMU
core can split arbitrary memory regions into pages, we can remove this
limitation, so users don't have to split those regions by themselves.
Currently the supported page sizes are advertised once and they then
remain static. That works well for OMAP and MSM but it would probably
not fly well with intel's hardware, where the page size capabilities
seem to have the potential to be different between several DMA
remapping devices.
register_iommu() currently sets a default pgsize behavior, so we can convert
the IOMMU drivers in subsequent patches. After all the drivers
are converted, the temporary default settings will be removed.
Mainline users of the IOMMU API (kvm and omap-iovmm) are adopted
to deal with bytes instead of page order.
Many thanks to Joerg Roedel <Joerg.Roedel@amd.com> for significant review!
Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com>
Cc: David Brown <davidb@codeaurora.org>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Joerg Roedel <Joerg.Roedel@amd.com>
Cc: Stepan Moskovchenko <stepanm@codeaurora.org>
Cc: KyongHo Cho <pullip.cho@samsung.com>
Cc: Hiroshi DOYU <hdoyu@nvidia.com>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: kvm@vger.kernel.org
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2011-11-10 09:32:26 +00:00
|
|
|
size_t unmapped_page, unmapped = 0;
|
|
|
|
unsigned int min_pagesz;
|
2010-01-08 12:35:09 +00:00
|
|
|
|
2011-09-06 14:44:29 +00:00
|
|
|
if (unlikely(domain->ops->unmap == NULL))
|
|
|
|
return -ENODEV;
|
|
|
|
|
iommu/core: split mapping to page sizes as supported by the hardware
When mapping a memory region, split it to page sizes as supported
by the iommu hardware. Always prefer bigger pages, when possible,
in order to reduce the TLB pressure.
The logic to do that is now added to the IOMMU core, so neither the iommu
drivers themselves nor users of the IOMMU API have to duplicate it.
This allows a more lenient granularity of mappings; traditionally the
IOMMU API took 'order' (of a page) as a mapping size, and directly let
the low level iommu drivers handle the mapping, but now that the IOMMU
core can split arbitrary memory regions into pages, we can remove this
limitation, so users don't have to split those regions by themselves.
Currently the supported page sizes are advertised once and they then
remain static. That works well for OMAP and MSM but it would probably
not fly well with intel's hardware, where the page size capabilities
seem to have the potential to be different between several DMA
remapping devices.
register_iommu() currently sets a default pgsize behavior, so we can convert
the IOMMU drivers in subsequent patches. After all the drivers
are converted, the temporary default settings will be removed.
Mainline users of the IOMMU API (kvm and omap-iovmm) are adopted
to deal with bytes instead of page order.
Many thanks to Joerg Roedel <Joerg.Roedel@amd.com> for significant review!
Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com>
Cc: David Brown <davidb@codeaurora.org>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Joerg Roedel <Joerg.Roedel@amd.com>
Cc: Stepan Moskovchenko <stepanm@codeaurora.org>
Cc: KyongHo Cho <pullip.cho@samsung.com>
Cc: Hiroshi DOYU <hdoyu@nvidia.com>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: kvm@vger.kernel.org
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2011-11-10 09:32:26 +00:00
|
|
|
/* find out the minimum page size supported */
|
|
|
|
min_pagesz = 1 << __ffs(domain->ops->pgsize_bitmap);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* The virtual address, as well as the size of the mapping, must be
|
|
|
|
* aligned (at least) to the size of the smallest page supported
|
|
|
|
* by the hardware
|
|
|
|
*/
|
|
|
|
if (!IS_ALIGNED(iova | size, min_pagesz)) {
|
|
|
|
pr_err("unaligned: iova 0x%lx size 0x%lx min_pagesz 0x%x\n",
|
|
|
|
iova, (unsigned long)size, min_pagesz);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
pr_debug("unmap this: iova 0x%lx size 0x%lx\n", iova,
|
|
|
|
(unsigned long)size);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Keep iterating until we either unmap 'size' bytes (or more)
|
|
|
|
* or we hit an area that isn't mapped.
|
|
|
|
*/
|
|
|
|
while (unmapped < size) {
|
|
|
|
size_t left = size - unmapped;
|
|
|
|
|
|
|
|
unmapped_page = domain->ops->unmap(domain, iova, left);
|
|
|
|
if (!unmapped_page)
|
|
|
|
break;
|
|
|
|
|
|
|
|
pr_debug("unmapped: iova 0x%lx size %lx\n", iova,
|
|
|
|
(unsigned long)unmapped_page);
|
|
|
|
|
|
|
|
iova += unmapped_page;
|
|
|
|
unmapped += unmapped_page;
|
|
|
|
}
|
|
|
|
|
|
|
|
return unmapped;
|
2010-01-08 12:35:09 +00:00
|
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(iommu_unmap);
|
2011-10-21 19:56:05 +00:00
|
|
|
|
|
|
|
int iommu_device_group(struct device *dev, unsigned int *groupid)
|
|
|
|
{
|
|
|
|
if (iommu_present(dev->bus) && dev->bus->iommu_ops->device_group)
|
|
|
|
return dev->bus->iommu_ops->device_group(dev, groupid);
|
|
|
|
|
|
|
|
return -ENODEV;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(iommu_device_group);
|