2013-06-17 18:50:02 +00:00
|
|
|
* Renesas Pin Function Controller (GPIO and Pin Mux/Config)
|
|
|
|
|
2015-01-26 06:20:12 +00:00
|
|
|
The Pin Function Controller (PFC) is a Pin Mux/Config controller. On SH73A0,
|
|
|
|
R8A73A4 and R8A7740 it also acts as a GPIO controller.
|
2013-06-17 18:50:02 +00:00
|
|
|
|
|
|
|
|
|
|
|
Pin Control
|
|
|
|
-----------
|
|
|
|
|
|
|
|
Required Properties:
|
|
|
|
|
|
|
|
- compatible: should be one of the following.
|
2015-01-25 13:49:52 +00:00
|
|
|
- "renesas,pfc-emev2": for EMEV2 (EMMA Mobile EV2) compatible pin-controller.
|
2013-06-17 18:50:02 +00:00
|
|
|
- "renesas,pfc-r8a73a4": for R8A73A4 (R-Mobile APE6) compatible pin-controller.
|
|
|
|
- "renesas,pfc-r8a7740": for R8A7740 (R-Mobile A1) compatible pin-controller.
|
|
|
|
- "renesas,pfc-r8a7778": for R8A7778 (R-Mobile M1) compatible pin-controller.
|
|
|
|
- "renesas,pfc-r8a7779": for R8A7779 (R-Car H1) compatible pin-controller.
|
|
|
|
- "renesas,pfc-r8a7790": for R8A7790 (R-Car H2) compatible pin-controller.
|
2015-05-12 09:13:21 +00:00
|
|
|
- "renesas,pfc-r8a7791": for R8A7791 (R-Car M2-W) compatible pin-controller.
|
|
|
|
- "renesas,pfc-r8a7793": for R8A7793 (R-Car M2-N) compatible pin-controller.
|
pinctrl: sh-pfc: add R8A7794 PFC support
Add PFC support for the R8A7794 SoC including pin groups for some
on-chip devices such as ETH, I2C, INTC, MSIOF, QSPI, [H]SCIF...
Sergei: squashed together several patches, fixed the MLB_CLK typo,
added IRQ4.. IRQ9 pin groups, fixed IRQn comments, added ETH B pin
group names, removed stray new line and fixed typos in the comments
in the pinmux_config_regs[] initializer, removed the platform device
ID, took into account limited number of signals in the GPIO1/5/6
controllers, added reasonable and removed unreasonable
copyrights, modified the bindings document, renamed, added changelog.
Changes in version 5:
- resolved rejects, refreshed the patch;
- added Laurent Pinchart's ACK.
Changes in version 4:
- reused the PORT_GP_26() macro to #define PORT_GP_28().
Changes in version 3:
- removed the platform device ID;
- added PORT_GP_26() and PORT_GP_28() macros, used them for GPIO1/5/6 in the
CPU_ALL_PORT() macro.
Changes in version 2:
- rebased the patch.
Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-06-05 22:34:48 +00:00
|
|
|
- "renesas,pfc-r8a7794": for R8A7794 (R-Car E2) compatible pin-controller.
|
2015-09-03 02:51:49 +00:00
|
|
|
- "renesas,pfc-r8a7795": for R8A7795 (R-Car H3) compatible pin-controller.
|
2013-06-17 18:50:02 +00:00
|
|
|
- "renesas,pfc-sh73a0": for SH73A0 (SH-Mobile AG5) compatible pin-controller.
|
|
|
|
|
|
|
|
- reg: Base address and length of each memory resource used by the pin
|
|
|
|
controller hardware module.
|
|
|
|
|
|
|
|
Optional properties:
|
|
|
|
|
|
|
|
- #gpio-range-cells: Mandatory when the PFC doesn't handle GPIO, forbidden
|
|
|
|
otherwise. Should be 3.
|
|
|
|
|
2013-12-11 03:26:26 +00:00
|
|
|
- interrupts-extended: Specify the interrupts associated with external
|
|
|
|
IRQ pins. This property is mandatory when the PFC handles GPIOs and
|
|
|
|
forbidden otherwise. When specified, it must contain one interrupt per
|
|
|
|
external IRQ, sorted by external IRQ number.
|
|
|
|
|
2013-06-17 18:50:02 +00:00
|
|
|
The PFC node also acts as a container for pin configuration nodes. Please refer
|
|
|
|
to pinctrl-bindings.txt in this directory for the definition of the term "pin
|
|
|
|
configuration node" and for the common pinctrl bindings used by client devices.
|
|
|
|
|
2013-06-17 18:50:03 +00:00
|
|
|
Each pin configuration node represents a desired configuration for a pin, a
|
|
|
|
pin group, or a list of pins or pin groups. The configuration can include the
|
|
|
|
function to select on those pin(s) and pin configuration parameters (such as
|
|
|
|
pull-up and pull-down).
|
2013-06-17 18:50:02 +00:00
|
|
|
|
2013-06-17 18:50:03 +00:00
|
|
|
Pin configuration nodes contain pin configuration properties, either directly
|
|
|
|
or grouped in child subnodes. Both pin muxing and configuration parameters can
|
|
|
|
be grouped in that way and referenced as a single pin configuration node by
|
|
|
|
client devices.
|
|
|
|
|
|
|
|
A configuration node or subnode must reference at least one pin (through the
|
|
|
|
pins or pin groups properties) and contain at least a function or one
|
|
|
|
configuration parameter. When the function is present only pin groups can be
|
|
|
|
used to reference pins.
|
2013-06-17 18:50:02 +00:00
|
|
|
|
|
|
|
All pin configuration nodes and subnodes names are ignored. All of those nodes
|
|
|
|
are parsed through phandles and processed purely based on their content.
|
|
|
|
|
|
|
|
Pin Configuration Node Properties:
|
|
|
|
|
2015-06-30 08:29:57 +00:00
|
|
|
- pins : An array of strings, each string containing the name of a pin.
|
|
|
|
- groups : An array of strings, each string containing the name of a pin
|
2013-06-17 18:50:02 +00:00
|
|
|
group.
|
|
|
|
|
2015-06-30 08:29:57 +00:00
|
|
|
- function: A string containing the name of the function to mux to the pin
|
|
|
|
group(s) specified by the groups property.
|
2013-06-17 18:50:02 +00:00
|
|
|
|
|
|
|
Valid values for pin, group and function names can be found in the group and
|
|
|
|
function arrays of the PFC data file corresponding to the SoC
|
|
|
|
(drivers/pinctrl/sh-pfc/pfc-*.c)
|
|
|
|
|
2013-06-17 18:50:03 +00:00
|
|
|
The pin configuration parameters use the generic pinconf bindings defined in
|
|
|
|
pinctrl-bindings.txt in this directory. The supported parameters are
|
2016-06-10 15:11:25 +00:00
|
|
|
bias-disable, bias-pull-up, bias-pull-down, drive-strength and power-source. For
|
2016-03-23 14:06:00 +00:00
|
|
|
pins that have a configurable I/O voltage, the power-source value should be the
|
2015-06-30 16:53:59 +00:00
|
|
|
nominal I/O voltage in millivolts.
|
2013-06-17 18:50:03 +00:00
|
|
|
|
2013-06-17 18:50:02 +00:00
|
|
|
|
|
|
|
GPIO
|
|
|
|
----
|
|
|
|
|
2015-01-26 06:20:12 +00:00
|
|
|
On SH73A0, R8A73A4 and R8A7740 the PFC node is also a GPIO controller node.
|
2013-06-17 18:50:02 +00:00
|
|
|
|
|
|
|
Required Properties:
|
|
|
|
|
|
|
|
- gpio-controller: Marks the device node as a gpio controller.
|
|
|
|
|
|
|
|
- #gpio-cells: Should be 2. The first cell is the GPIO number and the second
|
|
|
|
cell specifies GPIO flags, as defined in <dt-bindings/gpio/gpio.h>. Only the
|
|
|
|
GPIO_ACTIVE_HIGH and GPIO_ACTIVE_LOW flags are supported.
|
|
|
|
|
|
|
|
The syntax of the gpio specifier used by client nodes should be the following
|
|
|
|
with values derived from the SoC user manual.
|
|
|
|
|
|
|
|
<[phandle of the gpio controller node]
|
|
|
|
[pin number within the gpio controller]
|
|
|
|
[flags]>
|
|
|
|
|
|
|
|
On other mach-shmobile platforms GPIO is handled by the gpio-rcar driver.
|
|
|
|
Please refer to Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt
|
|
|
|
for documentation of the GPIO device tree bindings on those platforms.
|
|
|
|
|
|
|
|
|
|
|
|
Examples
|
|
|
|
--------
|
|
|
|
|
|
|
|
Example 1: SH73A0 (SH-Mobile AG5) pin controller node
|
|
|
|
|
|
|
|
pfc: pfc@e6050000 {
|
|
|
|
compatible = "renesas,pfc-sh73a0";
|
|
|
|
reg = <0xe6050000 0x8000>,
|
|
|
|
<0xe605801c 0x1c>;
|
|
|
|
gpio-controller;
|
|
|
|
#gpio-cells = <2>;
|
2013-12-11 03:26:26 +00:00
|
|
|
interrupts-extended =
|
|
|
|
<&irqpin0 0 0>, <&irqpin0 1 0>, <&irqpin0 2 0>, <&irqpin0 3 0>,
|
|
|
|
<&irqpin0 4 0>, <&irqpin0 5 0>, <&irqpin0 6 0>, <&irqpin0 7 0>,
|
|
|
|
<&irqpin1 0 0>, <&irqpin1 1 0>, <&irqpin1 2 0>, <&irqpin1 3 0>,
|
|
|
|
<&irqpin1 4 0>, <&irqpin1 5 0>, <&irqpin1 6 0>, <&irqpin1 7 0>,
|
|
|
|
<&irqpin2 0 0>, <&irqpin2 1 0>, <&irqpin2 2 0>, <&irqpin2 3 0>,
|
|
|
|
<&irqpin2 4 0>, <&irqpin2 5 0>, <&irqpin2 6 0>, <&irqpin2 7 0>,
|
|
|
|
<&irqpin3 0 0>, <&irqpin3 1 0>, <&irqpin3 2 0>, <&irqpin3 3 0>,
|
|
|
|
<&irqpin3 4 0>, <&irqpin3 5 0>, <&irqpin3 6 0>, <&irqpin3 7 0>;
|
2013-06-17 18:50:02 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
Example 2: A GPIO LED node that references a GPIO
|
|
|
|
|
|
|
|
#include <dt-bindings/gpio/gpio.h>
|
|
|
|
|
|
|
|
leds {
|
|
|
|
compatible = "gpio-leds";
|
|
|
|
led1 {
|
|
|
|
gpios = <&pfc 20 GPIO_ACTIVE_LOW>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
Example 3: KZM-A9-GT (SH-Mobile AG5) default pin state hog and pin control maps
|
|
|
|
for the MMCIF and SCIFA4 devices
|
|
|
|
|
|
|
|
&pfc {
|
|
|
|
pinctrl-0 = <&scifa4_pins>;
|
|
|
|
pinctrl-names = "default";
|
|
|
|
|
|
|
|
mmcif_pins: mmcif {
|
2013-06-17 18:50:03 +00:00
|
|
|
mux {
|
2015-06-30 08:29:57 +00:00
|
|
|
groups = "mmc0_data8_0", "mmc0_ctrl_0";
|
|
|
|
function = "mmc0";
|
2013-06-17 18:50:03 +00:00
|
|
|
};
|
|
|
|
cfg {
|
2015-06-30 08:29:57 +00:00
|
|
|
groups = "mmc0_data8_0";
|
|
|
|
pins = "PORT279";
|
2013-06-17 18:50:03 +00:00
|
|
|
bias-pull-up;
|
|
|
|
};
|
2013-06-17 18:50:02 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
scifa4_pins: scifa4 {
|
2015-06-30 08:29:57 +00:00
|
|
|
groups = "scifa4_data", "scifa4_ctrl";
|
|
|
|
function = "scifa4";
|
2013-06-17 18:50:02 +00:00
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
Example 4: KZM-A9-GT (SH-Mobile AG5) default pin state for the MMCIF device
|
|
|
|
|
|
|
|
&mmcif {
|
|
|
|
pinctrl-0 = <&mmcif_pins>;
|
|
|
|
pinctrl-names = "default";
|
|
|
|
|
|
|
|
bus-width = <8>;
|
|
|
|
vmmc-supply = <®_1p8v>;
|
|
|
|
status = "okay";
|
|
|
|
};
|