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52 lines
1.5 KiB
Plaintext
52 lines
1.5 KiB
Plaintext
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* Texas Instruments Davinci NAND
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This file provides information, what the device node for the
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davinci nand interface contain.
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Required properties:
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- compatible: "ti,davinci-nand";
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- reg : contain 2 offset/length values:
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- offset and length for the access window
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- offset and length for accessing the aemif control registers
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- ti,davinci-chipselect: Indicates on the davinci_nand driver which
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chipselect is used for accessing the nand.
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Recommended properties :
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- ti,davinci-mask-ale: mask for ale
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- ti,davinci-mask-cle: mask for cle
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- ti,davinci-mask-chipsel: mask for chipselect
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- ti,davinci-ecc-mode: ECC mode valid values for davinci driver:
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- "none"
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- "soft"
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- "hw"
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- ti,davinci-ecc-bits: used ECC bits, currently supported 1 or 4.
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- ti,davinci-nand-buswidth: buswidth 8 or 16
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- ti,davinci-nand-use-bbt: use flash based bad block table support.
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Example (enbw_cmc board):
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aemif@60000000 {
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compatible = "ti,davinci-aemif";
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#address-cells = <2>;
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#size-cells = <1>;
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reg = <0x68000000 0x80000>;
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ranges = <2 0 0x60000000 0x02000000
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3 0 0x62000000 0x02000000
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4 0 0x64000000 0x02000000
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5 0 0x66000000 0x02000000
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6 0 0x68000000 0x02000000>;
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nand@3,0 {
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compatible = "ti,davinci-nand";
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reg = <3 0x0 0x807ff
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6 0x0 0x8000>;
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#address-cells = <1>;
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#size-cells = <1>;
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ti,davinci-chipselect = <1>;
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ti,davinci-mask-ale = <0>;
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ti,davinci-mask-cle = <0>;
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ti,davinci-mask-chipsel = <0>;
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ti,davinci-ecc-mode = "hw";
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ti,davinci-ecc-bits = <4>;
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ti,davinci-nand-use-bbt;
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};
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};
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