2019-05-27 06:55:06 +00:00
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// SPDX-License-Identifier: GPL-2.0-or-later
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2012-10-13 06:01:58 +00:00
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/*
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* Copyright (c) 2012 Guenter Roeck <linux@roeck-us.net>
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*
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* based on max1668.c
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* Copyright (c) 2011 David George <david.george@ska.ac.za>
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*/
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2024-07-12 21:46:19 +00:00
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#include <linux/bitfield.h>
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#include <linux/bits.h>
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2024-07-12 20:06:30 +00:00
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#include <linux/err.h>
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2012-10-13 06:01:58 +00:00
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#include <linux/hwmon.h>
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2024-07-12 20:06:30 +00:00
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#include <linux/i2c.h>
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#include <linux/init.h>
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#include <linux/module.h>
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2012-10-13 06:01:58 +00:00
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#include <linux/mutex.h>
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#include <linux/of.h>
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2024-07-12 22:45:38 +00:00
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#include <linux/regmap.h>
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2024-07-12 20:06:30 +00:00
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#include <linux/slab.h>
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2012-10-13 06:01:58 +00:00
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enum chips { max6581, max6602, max6622, max6636, max6689, max6693, max6694,
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max6697, max6698, max6699 };
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/* Report local sensor as temp1 */
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static const u8 MAX6697_REG_TEMP[] = {
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0x07, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x08 };
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static const u8 MAX6697_REG_TEMP_EXT[] = {
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0x57, 0x09, 0x52, 0x53, 0x54, 0x55, 0x56, 0 };
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static const u8 MAX6697_REG_MAX[] = {
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0x17, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x18 };
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static const u8 MAX6697_REG_CRIT[] = {
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0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27 };
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/*
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2024-07-12 21:46:19 +00:00
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* Map device tree / internal register bit map to chip bit map.
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2012-10-13 06:01:58 +00:00
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* Applies to alert register and over-temperature register.
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*/
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2024-07-12 21:46:19 +00:00
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#define MAX6697_EXTERNAL_MASK_DT GENMASK(7, 1)
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#define MAX6697_LOCAL_MASK_DT BIT(0)
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#define MAX6697_EXTERNAL_MASK_CHIP GENMASK(6, 0)
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#define MAX6697_LOCAL_MASK_CHIP BIT(7)
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/* alert - local channel is in bit 6 */
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2020-06-23 22:13:08 +00:00
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#define MAX6697_ALERT_MAP_BITS(reg) ((((reg) & 0x7e) >> 1) | \
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2012-10-13 06:01:58 +00:00
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(((reg) & 0x01) << 6) | ((reg) & 0x80))
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2024-07-12 21:46:19 +00:00
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/* over-temperature - local channel is in bit 7 */
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#define MAX6697_OVERT_MAP_BITS(reg) \
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(FIELD_PREP(MAX6697_EXTERNAL_MASK_CHIP, FIELD_GET(MAX6697_EXTERNAL_MASK_DT, reg)) | \
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FIELD_PREP(MAX6697_LOCAL_MASK_CHIP, FIELD_GET(MAX6697_LOCAL_MASK_DT, reg)))
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2012-10-13 06:01:58 +00:00
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2024-07-13 14:44:20 +00:00
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#define MAX6697_REG_STAT_ALARM 0x44
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#define MAX6697_REG_STAT_CRIT 0x45
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#define MAX6697_REG_STAT_FAULT 0x46
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2012-10-13 06:01:58 +00:00
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#define MAX6697_REG_CONFIG 0x41
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2024-07-12 21:46:19 +00:00
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#define MAX6581_CONF_EXTENDED BIT(1)
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#define MAX6693_CONF_BETA BIT(2)
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#define MAX6697_CONF_RESISTANCE BIT(3)
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#define MAX6697_CONF_TIMEOUT BIT(5)
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2012-10-13 06:01:58 +00:00
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#define MAX6697_REG_ALERT_MASK 0x42
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#define MAX6697_REG_OVERT_MASK 0x43
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#define MAX6581_REG_RESISTANCE 0x4a
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#define MAX6581_REG_IDEALITY 0x4b
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#define MAX6581_REG_IDEALITY_SELECT 0x4c
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#define MAX6581_REG_OFFSET 0x4d
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#define MAX6581_REG_OFFSET_SELECT 0x4e
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2020-07-07 17:15:28 +00:00
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#define MAX6581_OFFSET_MIN -31750
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#define MAX6581_OFFSET_MAX 31750
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2012-10-13 06:01:58 +00:00
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#define MAX6697_CONV_TIME 156 /* ms per channel, worst case */
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struct max6697_chip_data {
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int channels;
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u32 have_ext;
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u32 have_crit;
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u32 have_fault;
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u8 valid_conf;
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};
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struct max6697_data {
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2024-07-12 22:45:38 +00:00
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struct regmap *regmap;
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2012-10-13 06:01:58 +00:00
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enum chips type;
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const struct max6697_chip_data *chip;
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int temp_offset; /* in degrees C */
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struct mutex update_lock;
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#define MAX6697_TEMP_INPUT 0
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#define MAX6697_TEMP_EXT 1
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#define MAX6697_TEMP_MAX 2
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#define MAX6697_TEMP_CRIT 3
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u32 alarms;
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};
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static const struct max6697_chip_data max6697_chip_data[] = {
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[max6581] = {
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.channels = 8,
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.have_crit = 0xff,
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.have_ext = 0x7f,
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.have_fault = 0xfe,
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.valid_conf = MAX6581_CONF_EXTENDED | MAX6697_CONF_TIMEOUT,
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},
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[max6602] = {
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.channels = 5,
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.have_crit = 0x12,
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.have_ext = 0x02,
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.have_fault = 0x1e,
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.valid_conf = MAX6697_CONF_RESISTANCE | MAX6697_CONF_TIMEOUT,
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},
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[max6622] = {
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.channels = 5,
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.have_crit = 0x12,
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.have_ext = 0x02,
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.have_fault = 0x1e,
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.valid_conf = MAX6697_CONF_RESISTANCE | MAX6697_CONF_TIMEOUT,
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},
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[max6636] = {
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.channels = 7,
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.have_crit = 0x72,
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.have_ext = 0x02,
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.have_fault = 0x7e,
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.valid_conf = MAX6697_CONF_RESISTANCE | MAX6697_CONF_TIMEOUT,
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},
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[max6689] = {
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.channels = 7,
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.have_crit = 0x72,
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.have_ext = 0x02,
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.have_fault = 0x7e,
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.valid_conf = MAX6697_CONF_RESISTANCE | MAX6697_CONF_TIMEOUT,
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},
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[max6693] = {
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.channels = 7,
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.have_crit = 0x72,
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.have_ext = 0x02,
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.have_fault = 0x7e,
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.valid_conf = MAX6697_CONF_RESISTANCE | MAX6693_CONF_BETA |
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MAX6697_CONF_TIMEOUT,
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},
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[max6694] = {
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.channels = 5,
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.have_crit = 0x12,
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.have_ext = 0x02,
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.have_fault = 0x1e,
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.valid_conf = MAX6697_CONF_RESISTANCE | MAX6693_CONF_BETA |
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MAX6697_CONF_TIMEOUT,
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},
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[max6697] = {
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.channels = 7,
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.have_crit = 0x72,
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.have_ext = 0x02,
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.have_fault = 0x7e,
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.valid_conf = MAX6697_CONF_RESISTANCE | MAX6697_CONF_TIMEOUT,
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},
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[max6698] = {
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.channels = 7,
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.have_crit = 0x72,
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.have_ext = 0x02,
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.have_fault = 0x0e,
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.valid_conf = MAX6697_CONF_RESISTANCE | MAX6697_CONF_TIMEOUT,
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},
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[max6699] = {
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.channels = 5,
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.have_crit = 0x12,
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.have_ext = 0x02,
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.have_fault = 0x1e,
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.valid_conf = MAX6697_CONF_RESISTANCE | MAX6697_CONF_TIMEOUT,
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},
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};
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2024-07-13 14:44:20 +00:00
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static int max6697_read(struct device *dev, enum hwmon_sensor_types type,
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u32 attr, int channel, long *val)
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2012-10-13 06:01:58 +00:00
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{
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2024-07-13 14:44:20 +00:00
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unsigned int offset_regs[2] = { MAX6581_REG_OFFSET_SELECT, MAX6581_REG_OFFSET };
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unsigned int temp_regs[2] = { MAX6697_REG_TEMP[channel],
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MAX6697_REG_TEMP_EXT[channel] };
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2024-07-12 22:45:38 +00:00
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struct max6697_data *data = dev_get_drvdata(dev);
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2024-07-13 14:44:20 +00:00
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struct regmap *regmap = data->regmap;
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2024-07-12 22:45:38 +00:00
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u8 regdata[2] = { };
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2024-07-13 14:44:20 +00:00
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u32 regval;
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2012-10-13 06:01:58 +00:00
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int ret;
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2024-07-13 14:44:20 +00:00
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switch (attr) {
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case hwmon_temp_input:
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ret = regmap_multi_reg_read(regmap, temp_regs, regdata,
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data->chip->have_ext & BIT(channel) ? 2 : 1);
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if (ret)
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return ret;
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*val = (((regdata[0] - data->temp_offset) << 3) | (regdata[1] >> 5)) * 125;
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break;
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case hwmon_temp_max:
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ret = regmap_read(regmap, MAX6697_REG_MAX[channel], ®val);
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if (ret)
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return ret;
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*val = ((int)regval - data->temp_offset) * 1000;
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break;
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case hwmon_temp_crit:
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ret = regmap_read(regmap, MAX6697_REG_CRIT[channel], ®val);
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if (ret)
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return ret;
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*val = ((int)regval - data->temp_offset) * 1000;
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break;
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case hwmon_temp_offset:
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ret = regmap_multi_reg_read(regmap, offset_regs, regdata, 2);
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if (ret)
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return ret;
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2012-10-13 06:01:58 +00:00
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2024-07-13 14:44:20 +00:00
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if (!(regdata[0] & BIT(channel - 1)))
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regdata[1] = 0;
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2012-10-13 06:01:58 +00:00
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2024-07-13 14:44:20 +00:00
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*val = sign_extend32(regdata[1], 7) * 250;
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break;
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case hwmon_temp_fault:
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ret = regmap_read(regmap, MAX6697_REG_STAT_FAULT, ®val);
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if (ret)
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return ret;
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if (data->type == max6581)
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*val = !!(regval & BIT(channel - 1));
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else
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*val = !!(regval & BIT(channel));
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break;
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case hwmon_temp_crit_alarm:
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ret = regmap_read(regmap, MAX6697_REG_STAT_CRIT, ®val);
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if (ret)
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return ret;
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*val = !!(regval & BIT(channel ? channel - 1 : 7));
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break;
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case hwmon_temp_max_alarm:
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ret = regmap_read(regmap, MAX6697_REG_STAT_ALARM, ®val);
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if (ret)
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return ret;
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switch (channel) {
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case 0:
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*val = !!(regval & BIT(6));
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break;
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case 7:
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*val = !!(regval & BIT(7));
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break;
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default:
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*val = !!(regval & BIT(channel - 1));
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break;
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}
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break;
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default:
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return -EOPNOTSUPP;
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}
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return 0;
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2012-10-13 06:01:58 +00:00
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}
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2024-07-13 14:44:20 +00:00
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static int max6697_write(struct device *dev, enum hwmon_sensor_types type,
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u32 attr, int channel, long val)
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2020-07-07 17:15:28 +00:00
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{
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2024-07-12 22:45:38 +00:00
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struct max6697_data *data = dev_get_drvdata(dev);
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struct regmap *regmap = data->regmap;
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int ret;
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2020-07-07 17:15:28 +00:00
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2024-07-13 14:44:20 +00:00
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switch (attr) {
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case hwmon_temp_max:
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val = clamp_val(val, -1000000, 1000000); /* prevent underflow */
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val = DIV_ROUND_CLOSEST(val, 1000) + data->temp_offset;
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val = clamp_val(val, 0, data->type == max6581 ? 255 : 127);
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return regmap_write(regmap, MAX6697_REG_MAX[channel], val);
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case hwmon_temp_crit:
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val = clamp_val(val, -1000000, 1000000); /* prevent underflow */
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val = DIV_ROUND_CLOSEST(val, 1000) + data->temp_offset;
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val = clamp_val(val, 0, data->type == max6581 ? 255 : 127);
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return regmap_write(regmap, MAX6697_REG_CRIT[channel], val);
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case hwmon_temp_offset:
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mutex_lock(&data->update_lock);
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val = clamp_val(val, MAX6581_OFFSET_MIN, MAX6581_OFFSET_MAX);
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val = DIV_ROUND_CLOSEST(val, 250);
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if (!val) { /* disable this (and only this) channel */
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ret = regmap_clear_bits(regmap, MAX6581_REG_OFFSET_SELECT,
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BIT(channel - 1));
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} else {
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/* enable channel and update offset */
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ret = regmap_set_bits(regmap, MAX6581_REG_OFFSET_SELECT,
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BIT(channel - 1));
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if (ret)
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goto unlock;
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ret = regmap_write(regmap, MAX6581_REG_OFFSET, val);
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}
|
2024-07-12 22:45:38 +00:00
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unlock:
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2024-07-13 14:44:20 +00:00
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mutex_unlock(&data->update_lock);
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2024-07-12 22:45:38 +00:00
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return ret;
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2024-07-13 14:44:20 +00:00
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default:
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return -EOPNOTSUPP;
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}
|
2020-07-07 17:15:28 +00:00
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}
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2024-07-13 14:44:20 +00:00
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static umode_t max6697_is_visible(const void *_data, enum hwmon_sensor_types type,
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u32 attr, int channel)
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2013-03-18 13:40:16 +00:00
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{
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2024-07-13 14:44:20 +00:00
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const struct max6697_data *data = _data;
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2013-03-18 13:40:16 +00:00
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const struct max6697_chip_data *chip = data->chip;
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if (channel >= chip->channels)
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return 0;
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2024-07-13 14:44:20 +00:00
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switch (attr) {
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case hwmon_temp_max:
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return 0644;
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case hwmon_temp_input:
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case hwmon_temp_max_alarm:
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|
|
return 0444;
|
|
|
|
case hwmon_temp_crit:
|
|
|
|
if (chip->have_crit & BIT(channel))
|
|
|
|
return 0644;
|
|
|
|
break;
|
|
|
|
case hwmon_temp_crit_alarm:
|
|
|
|
if (chip->have_crit & BIT(channel))
|
|
|
|
return 0444;
|
|
|
|
break;
|
|
|
|
case hwmon_temp_fault:
|
|
|
|
if (chip->have_fault & BIT(channel))
|
|
|
|
return 0444;
|
|
|
|
break;
|
|
|
|
case hwmon_temp_offset:
|
|
|
|
if (data->type == max6581 && channel)
|
|
|
|
return 0644;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
return 0;
|
2013-03-18 13:40:16 +00:00
|
|
|
}
|
|
|
|
|
2024-07-13 14:44:20 +00:00
|
|
|
/* Return 0 if detection is successful, -ENODEV otherwise */
|
|
|
|
static const struct hwmon_channel_info * const max6697_info[] = {
|
|
|
|
HWMON_CHANNEL_INFO(temp,
|
|
|
|
HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_CRIT |
|
|
|
|
HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM,
|
|
|
|
HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_CRIT |
|
|
|
|
HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM |
|
|
|
|
HWMON_T_FAULT | HWMON_T_OFFSET,
|
|
|
|
HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_CRIT |
|
|
|
|
HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM |
|
|
|
|
HWMON_T_FAULT | HWMON_T_OFFSET,
|
|
|
|
HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_CRIT |
|
|
|
|
HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM |
|
|
|
|
HWMON_T_FAULT | HWMON_T_OFFSET,
|
|
|
|
HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_CRIT |
|
|
|
|
HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM |
|
|
|
|
HWMON_T_FAULT | HWMON_T_OFFSET,
|
|
|
|
HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_CRIT |
|
|
|
|
HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM |
|
|
|
|
HWMON_T_FAULT | HWMON_T_OFFSET,
|
|
|
|
HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_CRIT |
|
|
|
|
HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM |
|
|
|
|
HWMON_T_FAULT | HWMON_T_OFFSET,
|
|
|
|
HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_CRIT |
|
|
|
|
HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM |
|
|
|
|
HWMON_T_FAULT | HWMON_T_OFFSET),
|
2013-03-18 13:40:16 +00:00
|
|
|
NULL
|
2012-10-13 06:01:58 +00:00
|
|
|
};
|
|
|
|
|
2024-07-13 14:44:20 +00:00
|
|
|
static const struct hwmon_ops max6697_hwmon_ops = {
|
|
|
|
.is_visible = max6697_is_visible,
|
|
|
|
.read = max6697_read,
|
|
|
|
.write = max6697_write,
|
|
|
|
};
|
|
|
|
|
|
|
|
static const struct hwmon_chip_info max6697_chip_info = {
|
|
|
|
.ops = &max6697_hwmon_ops,
|
|
|
|
.info = max6697_info,
|
2012-10-13 06:01:58 +00:00
|
|
|
};
|
|
|
|
|
2024-07-12 22:45:38 +00:00
|
|
|
static int max6697_config_of(struct device_node *node, struct max6697_data *data)
|
2012-10-13 06:01:58 +00:00
|
|
|
{
|
2024-07-12 20:57:13 +00:00
|
|
|
const struct max6697_chip_data *chip = data->chip;
|
2024-07-12 22:45:38 +00:00
|
|
|
struct regmap *regmap = data->regmap;
|
2024-07-12 20:57:13 +00:00
|
|
|
int ret, confreg;
|
|
|
|
u32 vals[2];
|
|
|
|
|
|
|
|
confreg = 0;
|
|
|
|
if (of_property_read_bool(node, "smbus-timeout-disable") &&
|
|
|
|
(chip->valid_conf & MAX6697_CONF_TIMEOUT)) {
|
|
|
|
confreg |= MAX6697_CONF_TIMEOUT;
|
|
|
|
}
|
|
|
|
if (of_property_read_bool(node, "extended-range-enable") &&
|
|
|
|
(chip->valid_conf & MAX6581_CONF_EXTENDED)) {
|
|
|
|
confreg |= MAX6581_CONF_EXTENDED;
|
|
|
|
data->temp_offset = 64;
|
|
|
|
}
|
|
|
|
if (of_property_read_bool(node, "beta-compensation-enable") &&
|
|
|
|
(chip->valid_conf & MAX6693_CONF_BETA)) {
|
|
|
|
confreg |= MAX6693_CONF_BETA;
|
2012-10-13 06:01:58 +00:00
|
|
|
}
|
2024-07-12 20:57:13 +00:00
|
|
|
|
|
|
|
if (of_property_read_u32(node, "alert-mask", vals))
|
|
|
|
vals[0] = 0;
|
2024-07-12 22:45:38 +00:00
|
|
|
ret = regmap_write(regmap, MAX6697_REG_ALERT_MASK,
|
|
|
|
MAX6697_ALERT_MAP_BITS(vals[0]));
|
2024-07-12 20:57:13 +00:00
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
if (of_property_read_u32(node, "over-temperature-mask", vals))
|
|
|
|
vals[0] = 0;
|
2024-07-12 22:45:38 +00:00
|
|
|
ret = regmap_write(regmap, MAX6697_REG_OVERT_MASK,
|
|
|
|
MAX6697_OVERT_MAP_BITS(vals[0]));
|
2024-07-12 20:57:13 +00:00
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
if (data->type != max6581) {
|
|
|
|
if (of_property_read_bool(node, "resistance-cancellation") &&
|
|
|
|
chip->valid_conf & MAX6697_CONF_RESISTANCE) {
|
|
|
|
confreg |= MAX6697_CONF_RESISTANCE;
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
if (of_property_read_u32(node, "resistance-cancellation", &vals[0])) {
|
|
|
|
if (of_property_read_bool(node, "resistance-cancellation"))
|
|
|
|
vals[0] = 0xfe;
|
|
|
|
else
|
|
|
|
vals[0] = 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
vals[0] &= 0xfe;
|
2024-07-12 22:45:38 +00:00
|
|
|
ret = regmap_write(regmap, MAX6581_REG_RESISTANCE, vals[0] >> 1);
|
2024-07-12 20:57:13 +00:00
|
|
|
if (ret < 0)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
if (of_property_read_u32_array(node, "transistor-ideality", vals, 2)) {
|
|
|
|
vals[0] = 0;
|
|
|
|
vals[1] = 0;
|
|
|
|
}
|
|
|
|
|
2024-07-12 22:45:38 +00:00
|
|
|
ret = regmap_write(regmap, MAX6581_REG_IDEALITY, vals[1]);
|
2024-07-12 20:57:13 +00:00
|
|
|
if (ret < 0)
|
|
|
|
return ret;
|
2024-07-12 22:45:38 +00:00
|
|
|
ret = regmap_write(regmap, MAX6581_REG_IDEALITY_SELECT,
|
|
|
|
(vals[0] & 0xfe) >> 1);
|
2024-07-12 20:57:13 +00:00
|
|
|
if (ret < 0)
|
|
|
|
return ret;
|
2012-10-13 06:01:58 +00:00
|
|
|
}
|
2024-07-12 22:45:38 +00:00
|
|
|
return regmap_write(regmap, MAX6697_REG_CONFIG, confreg);
|
2012-10-13 06:01:58 +00:00
|
|
|
}
|
|
|
|
|
2024-07-12 22:45:38 +00:00
|
|
|
static int max6697_init_chip(struct device_node *np, struct max6697_data *data)
|
2012-10-13 06:01:58 +00:00
|
|
|
{
|
2024-07-12 22:45:38 +00:00
|
|
|
unsigned int reg;
|
|
|
|
int ret;
|
2012-10-13 06:01:58 +00:00
|
|
|
|
|
|
|
/*
|
2024-07-12 20:57:13 +00:00
|
|
|
* Don't touch configuration if there is no devicetree configuration.
|
|
|
|
* If that is the case, use the current chip configuration.
|
2012-10-13 06:01:58 +00:00
|
|
|
*/
|
2024-07-12 22:45:38 +00:00
|
|
|
if (!np) {
|
|
|
|
struct regmap *regmap = data->regmap;
|
|
|
|
|
|
|
|
ret = regmap_read(regmap, MAX6697_REG_CONFIG, ®);
|
|
|
|
if (ret < 0)
|
|
|
|
return ret;
|
2012-10-13 06:01:58 +00:00
|
|
|
if (data->type == max6581) {
|
|
|
|
if (reg & MAX6581_CONF_EXTENDED)
|
|
|
|
data->temp_offset = 64;
|
2024-07-12 22:45:38 +00:00
|
|
|
ret = regmap_read(regmap, MAX6581_REG_RESISTANCE, ®);
|
2012-10-13 06:01:58 +00:00
|
|
|
}
|
2024-07-12 20:57:13 +00:00
|
|
|
} else {
|
2024-07-12 22:45:38 +00:00
|
|
|
ret = max6697_config_of(np, data);
|
2012-10-13 06:01:58 +00:00
|
|
|
}
|
2024-07-12 20:57:13 +00:00
|
|
|
|
2024-07-12 22:45:38 +00:00
|
|
|
return ret;
|
2012-10-13 06:01:58 +00:00
|
|
|
}
|
|
|
|
|
2024-07-12 22:45:38 +00:00
|
|
|
static bool max6697_volatile_reg(struct device *dev, unsigned int reg)
|
|
|
|
{
|
|
|
|
switch (reg) {
|
|
|
|
case 0x00 ... 0x09: /* temperature high bytes */
|
|
|
|
case 0x44 ... 0x47: /* status */
|
|
|
|
case 0x51 ... 0x58: /* temperature low bytes */
|
|
|
|
return true;
|
|
|
|
default:
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static bool max6697_writeable_reg(struct device *dev, unsigned int reg)
|
|
|
|
{
|
|
|
|
return reg != 0x0a && reg != 0x0f && !max6697_volatile_reg(dev, reg);
|
|
|
|
}
|
|
|
|
|
|
|
|
static const struct regmap_config max6697_regmap_config = {
|
|
|
|
.reg_bits = 8,
|
|
|
|
.val_bits = 8,
|
|
|
|
.max_register = 0x58,
|
|
|
|
.writeable_reg = max6697_writeable_reg,
|
|
|
|
.volatile_reg = max6697_volatile_reg,
|
|
|
|
.cache_type = REGCACHE_MAPLE,
|
|
|
|
};
|
|
|
|
|
2020-08-13 16:02:22 +00:00
|
|
|
static int max6697_probe(struct i2c_client *client)
|
2012-10-13 06:01:58 +00:00
|
|
|
{
|
|
|
|
struct device *dev = &client->dev;
|
|
|
|
struct max6697_data *data;
|
2013-09-02 05:49:25 +00:00
|
|
|
struct device *hwmon_dev;
|
2024-07-12 22:45:38 +00:00
|
|
|
struct regmap *regmap;
|
2013-03-18 13:40:16 +00:00
|
|
|
int err;
|
2012-10-13 06:01:58 +00:00
|
|
|
|
2024-07-12 22:45:38 +00:00
|
|
|
regmap = regmap_init_i2c(client, &max6697_regmap_config);
|
|
|
|
if (IS_ERR(regmap))
|
|
|
|
return PTR_ERR(regmap);
|
2012-10-13 06:01:58 +00:00
|
|
|
|
|
|
|
data = devm_kzalloc(dev, sizeof(struct max6697_data), GFP_KERNEL);
|
|
|
|
if (!data)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
2024-07-12 22:45:38 +00:00
|
|
|
data->regmap = regmap;
|
2024-04-03 20:36:23 +00:00
|
|
|
data->type = (uintptr_t)i2c_get_match_data(client);
|
2012-10-13 06:01:58 +00:00
|
|
|
data->chip = &max6697_chip_data[data->type];
|
|
|
|
mutex_init(&data->update_lock);
|
|
|
|
|
2024-07-12 22:45:38 +00:00
|
|
|
err = max6697_init_chip(client->dev.of_node, data);
|
2012-10-13 06:01:58 +00:00
|
|
|
if (err)
|
|
|
|
return err;
|
|
|
|
|
2024-07-13 14:44:20 +00:00
|
|
|
hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name, data,
|
|
|
|
&max6697_chip_info, NULL);
|
2013-09-18 03:54:12 +00:00
|
|
|
return PTR_ERR_OR_ZERO(hwmon_dev);
|
2012-10-13 06:01:58 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static const struct i2c_device_id max6697_id[] = {
|
|
|
|
{ "max6581", max6581 },
|
|
|
|
{ "max6602", max6602 },
|
|
|
|
{ "max6622", max6622 },
|
|
|
|
{ "max6636", max6636 },
|
|
|
|
{ "max6689", max6689 },
|
|
|
|
{ "max6693", max6693 },
|
|
|
|
{ "max6694", max6694 },
|
|
|
|
{ "max6697", max6697 },
|
|
|
|
{ "max6698", max6698 },
|
|
|
|
{ "max6699", max6699 },
|
|
|
|
{ }
|
|
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE(i2c, max6697_id);
|
|
|
|
|
2019-04-04 13:42:50 +00:00
|
|
|
static const struct of_device_id __maybe_unused max6697_of_match[] = {
|
2017-02-24 13:13:06 +00:00
|
|
|
{
|
|
|
|
.compatible = "maxim,max6581",
|
|
|
|
.data = (void *)max6581
|
|
|
|
},
|
|
|
|
{
|
|
|
|
.compatible = "maxim,max6602",
|
|
|
|
.data = (void *)max6602
|
|
|
|
},
|
|
|
|
{
|
|
|
|
.compatible = "maxim,max6622",
|
|
|
|
.data = (void *)max6622
|
|
|
|
},
|
|
|
|
{
|
|
|
|
.compatible = "maxim,max6636",
|
|
|
|
.data = (void *)max6636
|
|
|
|
},
|
|
|
|
{
|
|
|
|
.compatible = "maxim,max6689",
|
|
|
|
.data = (void *)max6689
|
|
|
|
},
|
|
|
|
{
|
|
|
|
.compatible = "maxim,max6693",
|
|
|
|
.data = (void *)max6693
|
|
|
|
},
|
|
|
|
{
|
|
|
|
.compatible = "maxim,max6694",
|
|
|
|
.data = (void *)max6694
|
|
|
|
},
|
|
|
|
{
|
|
|
|
.compatible = "maxim,max6697",
|
|
|
|
.data = (void *)max6697
|
|
|
|
},
|
|
|
|
{
|
|
|
|
.compatible = "maxim,max6698",
|
|
|
|
.data = (void *)max6698
|
|
|
|
},
|
|
|
|
{
|
|
|
|
.compatible = "maxim,max6699",
|
|
|
|
.data = (void *)max6699
|
|
|
|
},
|
|
|
|
{ },
|
|
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE(of, max6697_of_match);
|
|
|
|
|
2012-10-13 06:01:58 +00:00
|
|
|
static struct i2c_driver max6697_driver = {
|
|
|
|
.driver = {
|
|
|
|
.name = "max6697",
|
2017-02-24 13:13:06 +00:00
|
|
|
.of_match_table = of_match_ptr(max6697_of_match),
|
2012-10-13 06:01:58 +00:00
|
|
|
},
|
2023-05-05 13:17:18 +00:00
|
|
|
.probe = max6697_probe,
|
2012-10-13 06:01:58 +00:00
|
|
|
.id_table = max6697_id,
|
|
|
|
};
|
|
|
|
|
|
|
|
module_i2c_driver(max6697_driver);
|
|
|
|
|
|
|
|
MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
|
|
|
|
MODULE_DESCRIPTION("MAX6697 temperature sensor driver");
|
|
|
|
MODULE_LICENSE("GPL");
|