2012-03-08 20:44:17 +00:00
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/*
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* ppi.c Analog Devices Parallel Peripheral Interface driver
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*
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* Copyright (c) 2011 Analog Devices Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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2012-11-20 18:49:35 +00:00
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#include <linux/module.h>
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2012-03-08 20:44:17 +00:00
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#include <linux/slab.h>
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2014-07-23 09:57:14 +00:00
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#include <linux/platform_device.h>
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2012-03-08 20:44:17 +00:00
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#include <asm/bfin_ppi.h>
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#include <asm/blackfin.h>
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#include <asm/cacheflush.h>
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#include <asm/dma.h>
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#include <asm/portmux.h>
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#include <media/blackfin/ppi.h>
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static int ppi_attach_irq(struct ppi_if *ppi, irq_handler_t handler);
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static void ppi_detach_irq(struct ppi_if *ppi);
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static int ppi_start(struct ppi_if *ppi);
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static int ppi_stop(struct ppi_if *ppi);
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static int ppi_set_params(struct ppi_if *ppi, struct ppi_params *params);
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static void ppi_update_addr(struct ppi_if *ppi, unsigned long addr);
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static const struct ppi_ops ppi_ops = {
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.attach_irq = ppi_attach_irq,
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.detach_irq = ppi_detach_irq,
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.start = ppi_start,
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.stop = ppi_stop,
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.set_params = ppi_set_params,
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.update_addr = ppi_update_addr,
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};
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static irqreturn_t ppi_irq_err(int irq, void *dev_id)
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{
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struct ppi_if *ppi = dev_id;
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const struct ppi_info *info = ppi->info;
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switch (info->type) {
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case PPI_TYPE_PPI:
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{
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struct bfin_ppi_regs *reg = info->base;
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unsigned short status;
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/* register on bf561 is cleared when read
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* others are W1C
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*/
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status = bfin_read16(®->status);
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2013-01-18 20:09:48 +00:00
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if (status & 0x3000)
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ppi->err = true;
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2012-03-08 20:44:17 +00:00
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bfin_write16(®->status, 0xff00);
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break;
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}
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case PPI_TYPE_EPPI:
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{
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struct bfin_eppi_regs *reg = info->base;
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2013-01-18 20:09:48 +00:00
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unsigned short status;
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status = bfin_read16(®->status);
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if (status & 0x2)
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ppi->err = true;
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2012-03-08 20:44:17 +00:00
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bfin_write16(®->status, 0xffff);
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break;
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}
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2012-11-20 18:49:36 +00:00
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case PPI_TYPE_EPPI3:
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{
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struct bfin_eppi3_regs *reg = info->base;
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2013-01-18 20:09:48 +00:00
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unsigned long stat;
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2012-11-20 18:49:36 +00:00
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2013-01-18 20:09:48 +00:00
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stat = bfin_read32(®->stat);
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if (stat & 0x2)
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ppi->err = true;
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2012-11-20 18:49:36 +00:00
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bfin_write32(®->stat, 0xc0ff);
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break;
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}
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2012-03-08 20:44:17 +00:00
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default:
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break;
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}
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return IRQ_HANDLED;
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}
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static int ppi_attach_irq(struct ppi_if *ppi, irq_handler_t handler)
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{
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const struct ppi_info *info = ppi->info;
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int ret;
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ret = request_dma(info->dma_ch, "PPI_DMA");
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if (ret) {
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pr_err("Unable to allocate DMA channel for PPI\n");
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return ret;
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}
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set_dma_callback(info->dma_ch, handler, ppi);
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if (ppi->err_int) {
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ret = request_irq(info->irq_err, ppi_irq_err, 0, "PPI ERROR", ppi);
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if (ret) {
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pr_err("Unable to allocate IRQ for PPI\n");
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free_dma(info->dma_ch);
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}
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}
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return ret;
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}
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static void ppi_detach_irq(struct ppi_if *ppi)
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{
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const struct ppi_info *info = ppi->info;
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if (ppi->err_int)
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free_irq(info->irq_err, ppi);
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free_dma(info->dma_ch);
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}
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static int ppi_start(struct ppi_if *ppi)
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{
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const struct ppi_info *info = ppi->info;
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/* enable DMA */
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enable_dma(info->dma_ch);
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/* enable PPI */
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ppi->ppi_control |= PORT_EN;
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switch (info->type) {
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case PPI_TYPE_PPI:
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{
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struct bfin_ppi_regs *reg = info->base;
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bfin_write16(®->control, ppi->ppi_control);
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break;
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}
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case PPI_TYPE_EPPI:
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{
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struct bfin_eppi_regs *reg = info->base;
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bfin_write32(®->control, ppi->ppi_control);
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break;
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}
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2012-11-20 18:49:36 +00:00
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case PPI_TYPE_EPPI3:
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{
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struct bfin_eppi3_regs *reg = info->base;
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bfin_write32(®->ctl, ppi->ppi_control);
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break;
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}
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2012-03-08 20:44:17 +00:00
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default:
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return -EINVAL;
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}
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SSYNC();
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return 0;
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}
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static int ppi_stop(struct ppi_if *ppi)
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{
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const struct ppi_info *info = ppi->info;
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/* disable PPI */
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ppi->ppi_control &= ~PORT_EN;
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switch (info->type) {
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case PPI_TYPE_PPI:
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{
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struct bfin_ppi_regs *reg = info->base;
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bfin_write16(®->control, ppi->ppi_control);
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break;
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}
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case PPI_TYPE_EPPI:
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{
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struct bfin_eppi_regs *reg = info->base;
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bfin_write32(®->control, ppi->ppi_control);
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break;
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}
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2012-11-20 18:49:36 +00:00
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case PPI_TYPE_EPPI3:
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{
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struct bfin_eppi3_regs *reg = info->base;
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bfin_write32(®->ctl, ppi->ppi_control);
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break;
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}
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2012-03-08 20:44:17 +00:00
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default:
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return -EINVAL;
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}
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/* disable DMA */
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clear_dma_irqstat(info->dma_ch);
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disable_dma(info->dma_ch);
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SSYNC();
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return 0;
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}
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static int ppi_set_params(struct ppi_if *ppi, struct ppi_params *params)
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{
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const struct ppi_info *info = ppi->info;
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int dma32 = 0;
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2012-11-20 18:49:36 +00:00
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int dma_config, bytes_per_line;
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int hcount, hdelay, samples_per_line;
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2012-03-08 20:44:17 +00:00
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2014-07-23 09:57:16 +00:00
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#ifdef CONFIG_PINCTRL
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static const char * const pin_state[] = {"8bit", "16bit", "24bit"};
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struct pinctrl *pctrl;
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struct pinctrl_state *pstate;
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if (params->dlen > 24 || params->dlen <= 0)
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return -EINVAL;
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pctrl = devm_pinctrl_get(ppi->dev);
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pstate = pinctrl_lookup_state(pctrl,
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pin_state[(params->dlen + 7) / 8 - 1]);
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if (pinctrl_select_state(pctrl, pstate))
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return -EINVAL;
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#endif
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2012-03-08 20:44:17 +00:00
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bytes_per_line = params->width * params->bpp / 8;
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2012-11-20 18:49:36 +00:00
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/* convert parameters unit from pixels to samples */
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hcount = params->width * params->bpp / params->dlen;
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hdelay = params->hdelay * params->bpp / params->dlen;
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samples_per_line = params->line * params->bpp / params->dlen;
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2012-03-08 20:44:17 +00:00
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if (params->int_mask == 0xFFFFFFFF)
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ppi->err_int = false;
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else
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ppi->err_int = true;
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2012-11-20 18:49:36 +00:00
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dma_config = (DMA_FLOW_STOP | RESTART | DMA2D | DI_EN_Y);
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2012-03-08 20:44:17 +00:00
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ppi->ppi_control = params->ppi_control & ~PORT_EN;
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2012-11-20 18:49:36 +00:00
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if (!(ppi->ppi_control & PORT_DIR))
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dma_config |= WNR;
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2012-03-08 20:44:17 +00:00
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switch (info->type) {
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case PPI_TYPE_PPI:
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{
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struct bfin_ppi_regs *reg = info->base;
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if (params->ppi_control & DMA32)
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dma32 = 1;
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bfin_write16(®->control, ppi->ppi_control);
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2012-11-20 18:49:36 +00:00
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bfin_write16(®->count, samples_per_line - 1);
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bfin_write16(®->frame, params->frame);
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2012-03-08 20:44:17 +00:00
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break;
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}
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case PPI_TYPE_EPPI:
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{
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struct bfin_eppi_regs *reg = info->base;
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if ((params->ppi_control & PACK_EN)
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|| (params->ppi_control & 0x38000) > DLEN_16)
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dma32 = 1;
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bfin_write32(®->control, ppi->ppi_control);
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2012-11-20 18:49:36 +00:00
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bfin_write16(®->line, samples_per_line);
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bfin_write16(®->frame, params->frame);
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bfin_write16(®->hdelay, hdelay);
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bfin_write16(®->vdelay, params->vdelay);
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bfin_write16(®->hcount, hcount);
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bfin_write16(®->vcount, params->height);
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break;
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}
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case PPI_TYPE_EPPI3:
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{
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struct bfin_eppi3_regs *reg = info->base;
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if ((params->ppi_control & PACK_EN)
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|| (params->ppi_control & 0x70000) > DLEN_16)
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dma32 = 1;
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bfin_write32(®->ctl, ppi->ppi_control);
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bfin_write32(®->line, samples_per_line);
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bfin_write32(®->frame, params->frame);
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bfin_write32(®->hdly, hdelay);
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bfin_write32(®->vdly, params->vdelay);
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bfin_write32(®->hcnt, hcount);
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bfin_write32(®->vcnt, params->height);
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if (params->int_mask)
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bfin_write32(®->imsk, params->int_mask & 0xFF);
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2013-04-12 22:52:57 +00:00
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if (ppi->ppi_control & PORT_DIR) {
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u32 hsync_width, vsync_width, vsync_period;
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hsync_width = params->hsync
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* params->bpp / params->dlen;
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vsync_width = params->vsync * samples_per_line;
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vsync_period = samples_per_line * params->frame;
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bfin_write32(®->fs1_wlhb, hsync_width);
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bfin_write32(®->fs1_paspl, samples_per_line);
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bfin_write32(®->fs2_wlvb, vsync_width);
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bfin_write32(®->fs2_palpf, vsync_period);
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}
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2012-03-08 20:44:17 +00:00
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break;
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}
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default:
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return -EINVAL;
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}
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if (dma32) {
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2012-11-20 18:49:36 +00:00
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dma_config |= WDSIZE_32 | PSIZE_32;
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2012-03-08 20:44:17 +00:00
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set_dma_x_count(info->dma_ch, bytes_per_line >> 2);
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set_dma_x_modify(info->dma_ch, 4);
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set_dma_y_modify(info->dma_ch, 4);
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} else {
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2012-11-20 18:49:36 +00:00
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dma_config |= WDSIZE_16 | PSIZE_16;
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2012-03-08 20:44:17 +00:00
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set_dma_x_count(info->dma_ch, bytes_per_line >> 1);
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set_dma_x_modify(info->dma_ch, 2);
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set_dma_y_modify(info->dma_ch, 2);
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}
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2012-11-20 18:49:36 +00:00
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set_dma_y_count(info->dma_ch, params->height);
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2012-03-08 20:44:17 +00:00
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set_dma_config(info->dma_ch, dma_config);
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SSYNC();
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return 0;
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}
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static void ppi_update_addr(struct ppi_if *ppi, unsigned long addr)
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{
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set_dma_start_addr(ppi->info->dma_ch, addr);
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}
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2014-07-23 09:57:14 +00:00
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struct ppi_if *ppi_create_instance(struct platform_device *pdev,
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const struct ppi_info *info)
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2012-03-08 20:44:17 +00:00
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{
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struct ppi_if *ppi;
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if (!info || !info->pin_req)
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return NULL;
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2014-07-23 09:57:16 +00:00
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#ifndef CONFIG_PINCTRL
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2012-03-08 20:44:17 +00:00
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if (peripheral_request_list(info->pin_req, KBUILD_MODNAME)) {
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2014-07-23 09:57:14 +00:00
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dev_err(&pdev->dev, "request peripheral failed\n");
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2012-03-08 20:44:17 +00:00
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return NULL;
|
|
|
|
}
|
2014-07-23 09:57:16 +00:00
|
|
|
#endif
|
2012-03-08 20:44:17 +00:00
|
|
|
|
|
|
|
ppi = kzalloc(sizeof(*ppi), GFP_KERNEL);
|
|
|
|
if (!ppi) {
|
|
|
|
peripheral_free_list(info->pin_req);
|
2014-07-23 09:57:14 +00:00
|
|
|
dev_err(&pdev->dev, "unable to allocate memory for ppi handle\n");
|
2012-03-08 20:44:17 +00:00
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
ppi->ops = &ppi_ops;
|
|
|
|
ppi->info = info;
|
2014-07-23 09:57:16 +00:00
|
|
|
ppi->dev = &pdev->dev;
|
2012-03-08 20:44:17 +00:00
|
|
|
|
|
|
|
pr_info("ppi probe success\n");
|
|
|
|
return ppi;
|
|
|
|
}
|
2012-11-20 18:49:35 +00:00
|
|
|
EXPORT_SYMBOL(ppi_create_instance);
|
2012-03-08 20:44:17 +00:00
|
|
|
|
|
|
|
void ppi_delete_instance(struct ppi_if *ppi)
|
|
|
|
{
|
|
|
|
peripheral_free_list(ppi->info->pin_req);
|
|
|
|
kfree(ppi);
|
|
|
|
}
|
2012-11-20 18:49:35 +00:00
|
|
|
EXPORT_SYMBOL(ppi_delete_instance);
|
|
|
|
|
|
|
|
MODULE_DESCRIPTION("Analog Devices PPI driver");
|
|
|
|
MODULE_AUTHOR("Scott Jiang <Scott.Jiang.Linux@gmail.com>");
|
|
|
|
MODULE_LICENSE("GPL v2");
|