2013-07-10 21:03:46 +00:00
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/*
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* vsp1_bru.c -- R-Car VSP1 Blend ROP Unit
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*
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* Copyright (C) 2013 Renesas Corporation
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*
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* Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include <linux/device.h>
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#include <linux/gfp.h>
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#include <media/v4l2-subdev.h>
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#include "vsp1.h"
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#include "vsp1_bru.h"
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2014-05-27 23:35:36 +00:00
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#include "vsp1_rwpf.h"
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2013-07-10 21:03:46 +00:00
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#define BRU_MIN_SIZE 4U
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#define BRU_MAX_SIZE 8190U
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/* -----------------------------------------------------------------------------
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* Device Access
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*/
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static inline u32 vsp1_bru_read(struct vsp1_bru *bru, u32 reg)
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{
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return vsp1_read(bru->entity.vsp1, reg);
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}
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static inline void vsp1_bru_write(struct vsp1_bru *bru, u32 reg, u32 data)
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{
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vsp1_write(bru->entity.vsp1, reg, data);
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}
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/* -----------------------------------------------------------------------------
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* V4L2 Subdevice Core Operations
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*/
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static int bru_s_stream(struct v4l2_subdev *subdev, int enable)
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{
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struct vsp1_bru *bru = to_bru(subdev);
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struct v4l2_mbus_framefmt *format;
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unsigned int i;
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if (!enable)
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return 0;
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format = &bru->entity.formats[BRU_PAD_SOURCE];
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/* The hardware is extremely flexible but we have no userspace API to
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* expose all the parameters, nor is it clear whether we would have use
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* cases for all the supported modes. Let's just harcode the parameters
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* to sane default values for now.
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*/
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/* Disable both color data normalization and dithering. */
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vsp1_bru_write(bru, VI6_BRU_INCTRL, 0);
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/* Set the background position to cover the whole output image and
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* set its color to opaque black.
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*/
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vsp1_bru_write(bru, VI6_BRU_VIRRPF_SIZE,
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(format->width << VI6_BRU_VIRRPF_SIZE_HSIZE_SHIFT) |
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(format->height << VI6_BRU_VIRRPF_SIZE_VSIZE_SHIFT));
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vsp1_bru_write(bru, VI6_BRU_VIRRPF_LOC, 0);
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vsp1_bru_write(bru, VI6_BRU_VIRRPF_COL,
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0xff << VI6_BRU_VIRRPF_COL_A_SHIFT);
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/* Route BRU input 1 as SRC input to the ROP unit and configure the ROP
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* unit with a NOP operation to make BRU input 1 available as the
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* Blend/ROP unit B SRC input.
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*/
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vsp1_bru_write(bru, VI6_BRU_ROP, VI6_BRU_ROP_DSTSEL_BRUIN(1) |
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VI6_BRU_ROP_CROP(VI6_ROP_NOP) |
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VI6_BRU_ROP_AROP(VI6_ROP_NOP));
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for (i = 0; i < 4; ++i) {
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2014-05-27 23:35:36 +00:00
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bool premultiplied = false;
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2013-07-10 21:03:46 +00:00
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u32 ctrl = 0;
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/* Configure all Blend/ROP units corresponding to an enabled BRU
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* input for alpha blending. Blend/ROP units corresponding to
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* disabled BRU inputs are used in ROP NOP mode to ignore the
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* SRC input.
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*/
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2014-05-27 23:35:36 +00:00
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if (bru->inputs[i].rpf) {
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2013-07-10 21:03:46 +00:00
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ctrl |= VI6_BRU_CTRL_RBC;
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2014-05-27 23:35:36 +00:00
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premultiplied = bru->inputs[i].rpf->video.format.flags
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& V4L2_PIX_FMT_FLAG_PREMUL_ALPHA;
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} else {
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2013-07-10 21:03:46 +00:00
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ctrl |= VI6_BRU_CTRL_CROP(VI6_ROP_NOP)
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| VI6_BRU_CTRL_AROP(VI6_ROP_NOP);
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2014-05-27 23:35:36 +00:00
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}
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2013-07-10 21:03:46 +00:00
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/* Select the virtual RPF as the Blend/ROP unit A DST input to
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* serve as a background color.
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*/
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if (i == 0)
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ctrl |= VI6_BRU_CTRL_DSTSEL_VRPF;
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/* Route BRU inputs 0 to 3 as SRC inputs to Blend/ROP units A to
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* D in that order. The Blend/ROP unit B SRC is hardwired to the
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* ROP unit output, the corresponding register bits must be set
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* to 0.
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*/
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if (i != 1)
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ctrl |= VI6_BRU_CTRL_SRCSEL_BRUIN(i);
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vsp1_bru_write(bru, VI6_BRU_CTRL(i), ctrl);
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/* Harcode the blending formula to
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*
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* DSTc = DSTc * (1 - SRCa) + SRCc * SRCa
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* DSTa = DSTa * (1 - SRCa) + SRCa
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2014-05-27 23:35:36 +00:00
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*
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* when the SRC input isn't premultiplied, and to
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*
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* DSTc = DSTc * (1 - SRCa) + SRCc
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* DSTa = DSTa * (1 - SRCa) + SRCa
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*
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* otherwise.
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2013-07-10 21:03:46 +00:00
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*/
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vsp1_bru_write(bru, VI6_BRU_BLD(i),
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VI6_BRU_BLD_CCMDX_255_SRC_A |
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2014-05-27 23:35:36 +00:00
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(premultiplied ? VI6_BRU_BLD_CCMDY_COEFY :
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VI6_BRU_BLD_CCMDY_SRC_A) |
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2013-07-10 21:03:46 +00:00
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VI6_BRU_BLD_ACMDX_255_SRC_A |
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VI6_BRU_BLD_ACMDY_COEFY |
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(0xff << VI6_BRU_BLD_COEFY_SHIFT));
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}
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return 0;
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}
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/* -----------------------------------------------------------------------------
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* V4L2 Subdevice Pad Operations
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*/
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/*
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* The BRU can't perform format conversion, all sink and source formats must be
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* identical. We pick the format on the first sink pad (pad 0) and propagate it
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* to all other pads.
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*/
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static int bru_enum_mbus_code(struct v4l2_subdev *subdev,
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struct v4l2_subdev_fh *fh,
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struct v4l2_subdev_mbus_code_enum *code)
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{
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static const unsigned int codes[] = {
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V4L2_MBUS_FMT_ARGB8888_1X32,
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V4L2_MBUS_FMT_AYUV8_1X32,
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};
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struct v4l2_mbus_framefmt *format;
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if (code->pad == BRU_PAD_SINK(0)) {
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if (code->index >= ARRAY_SIZE(codes))
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return -EINVAL;
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code->code = codes[code->index];
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} else {
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if (code->index)
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return -EINVAL;
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format = v4l2_subdev_get_try_format(fh, BRU_PAD_SINK(0));
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code->code = format->code;
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}
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return 0;
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}
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static int bru_enum_frame_size(struct v4l2_subdev *subdev,
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struct v4l2_subdev_fh *fh,
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struct v4l2_subdev_frame_size_enum *fse)
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{
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if (fse->index)
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return -EINVAL;
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if (fse->code != V4L2_MBUS_FMT_ARGB8888_1X32 &&
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fse->code != V4L2_MBUS_FMT_AYUV8_1X32)
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return -EINVAL;
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fse->min_width = BRU_MIN_SIZE;
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fse->max_width = BRU_MAX_SIZE;
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fse->min_height = BRU_MIN_SIZE;
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fse->max_height = BRU_MAX_SIZE;
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return 0;
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}
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static struct v4l2_rect *bru_get_compose(struct vsp1_bru *bru,
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struct v4l2_subdev_fh *fh,
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unsigned int pad, u32 which)
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{
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switch (which) {
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case V4L2_SUBDEV_FORMAT_TRY:
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return v4l2_subdev_get_try_crop(fh, pad);
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case V4L2_SUBDEV_FORMAT_ACTIVE:
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2014-05-27 23:35:36 +00:00
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return &bru->inputs[pad].compose;
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2013-07-10 21:03:46 +00:00
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default:
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return NULL;
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}
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}
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static int bru_get_format(struct v4l2_subdev *subdev, struct v4l2_subdev_fh *fh,
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struct v4l2_subdev_format *fmt)
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{
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struct vsp1_bru *bru = to_bru(subdev);
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fmt->format = *vsp1_entity_get_pad_format(&bru->entity, fh, fmt->pad,
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fmt->which);
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return 0;
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}
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static void bru_try_format(struct vsp1_bru *bru, struct v4l2_subdev_fh *fh,
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unsigned int pad, struct v4l2_mbus_framefmt *fmt,
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enum v4l2_subdev_format_whence which)
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{
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struct v4l2_mbus_framefmt *format;
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switch (pad) {
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case BRU_PAD_SINK(0):
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/* Default to YUV if the requested format is not supported. */
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if (fmt->code != V4L2_MBUS_FMT_ARGB8888_1X32 &&
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fmt->code != V4L2_MBUS_FMT_AYUV8_1X32)
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fmt->code = V4L2_MBUS_FMT_AYUV8_1X32;
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break;
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default:
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/* The BRU can't perform format conversion. */
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format = vsp1_entity_get_pad_format(&bru->entity, fh,
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BRU_PAD_SINK(0), which);
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fmt->code = format->code;
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break;
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}
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fmt->width = clamp(fmt->width, BRU_MIN_SIZE, BRU_MAX_SIZE);
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fmt->height = clamp(fmt->height, BRU_MIN_SIZE, BRU_MAX_SIZE);
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fmt->field = V4L2_FIELD_NONE;
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fmt->colorspace = V4L2_COLORSPACE_SRGB;
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}
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static int bru_set_format(struct v4l2_subdev *subdev, struct v4l2_subdev_fh *fh,
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struct v4l2_subdev_format *fmt)
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{
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struct vsp1_bru *bru = to_bru(subdev);
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struct v4l2_mbus_framefmt *format;
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bru_try_format(bru, fh, fmt->pad, &fmt->format, fmt->which);
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format = vsp1_entity_get_pad_format(&bru->entity, fh, fmt->pad,
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fmt->which);
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*format = fmt->format;
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/* Reset the compose rectangle */
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if (fmt->pad != BRU_PAD_SOURCE) {
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struct v4l2_rect *compose;
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compose = bru_get_compose(bru, fh, fmt->pad, fmt->which);
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compose->left = 0;
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compose->top = 0;
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compose->width = format->width;
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compose->height = format->height;
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}
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/* Propagate the format code to all pads */
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if (fmt->pad == BRU_PAD_SINK(0)) {
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unsigned int i;
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for (i = 0; i <= BRU_PAD_SOURCE; ++i) {
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format = vsp1_entity_get_pad_format(&bru->entity, fh,
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i, fmt->which);
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format->code = fmt->format.code;
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}
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}
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return 0;
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}
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static int bru_get_selection(struct v4l2_subdev *subdev,
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struct v4l2_subdev_fh *fh,
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struct v4l2_subdev_selection *sel)
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{
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struct vsp1_bru *bru = to_bru(subdev);
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if (sel->pad == BRU_PAD_SOURCE)
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return -EINVAL;
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switch (sel->target) {
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case V4L2_SEL_TGT_COMPOSE_BOUNDS:
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sel->r.left = 0;
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sel->r.top = 0;
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sel->r.width = BRU_MAX_SIZE;
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sel->r.height = BRU_MAX_SIZE;
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return 0;
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case V4L2_SEL_TGT_COMPOSE:
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sel->r = *bru_get_compose(bru, fh, sel->pad, sel->which);
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return 0;
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default:
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return -EINVAL;
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}
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}
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static int bru_set_selection(struct v4l2_subdev *subdev,
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struct v4l2_subdev_fh *fh,
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struct v4l2_subdev_selection *sel)
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{
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struct vsp1_bru *bru = to_bru(subdev);
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struct v4l2_mbus_framefmt *format;
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struct v4l2_rect *compose;
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if (sel->pad == BRU_PAD_SOURCE)
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return -EINVAL;
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if (sel->target != V4L2_SEL_TGT_COMPOSE)
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return -EINVAL;
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/* The compose rectangle top left corner must be inside the output
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* frame.
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*/
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format = vsp1_entity_get_pad_format(&bru->entity, fh, BRU_PAD_SOURCE,
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sel->which);
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sel->r.left = clamp_t(unsigned int, sel->r.left, 0, format->width - 1);
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sel->r.top = clamp_t(unsigned int, sel->r.top, 0, format->height - 1);
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/* Scaling isn't supported, the compose rectangle size must be identical
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* to the sink format size.
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*/
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format = vsp1_entity_get_pad_format(&bru->entity, fh, sel->pad,
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sel->which);
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sel->r.width = format->width;
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sel->r.height = format->height;
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compose = bru_get_compose(bru, fh, sel->pad, sel->which);
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*compose = sel->r;
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return 0;
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|
|
}
|
|
|
|
|
|
|
|
/* -----------------------------------------------------------------------------
|
|
|
|
* V4L2 Subdevice Operations
|
|
|
|
*/
|
|
|
|
|
|
|
|
static struct v4l2_subdev_video_ops bru_video_ops = {
|
|
|
|
.s_stream = bru_s_stream,
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct v4l2_subdev_pad_ops bru_pad_ops = {
|
|
|
|
.enum_mbus_code = bru_enum_mbus_code,
|
|
|
|
.enum_frame_size = bru_enum_frame_size,
|
|
|
|
.get_fmt = bru_get_format,
|
|
|
|
.set_fmt = bru_set_format,
|
|
|
|
.get_selection = bru_get_selection,
|
|
|
|
.set_selection = bru_set_selection,
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct v4l2_subdev_ops bru_ops = {
|
|
|
|
.video = &bru_video_ops,
|
|
|
|
.pad = &bru_pad_ops,
|
|
|
|
};
|
|
|
|
|
|
|
|
/* -----------------------------------------------------------------------------
|
|
|
|
* Initialization and Cleanup
|
|
|
|
*/
|
|
|
|
|
|
|
|
struct vsp1_bru *vsp1_bru_create(struct vsp1_device *vsp1)
|
|
|
|
{
|
|
|
|
struct v4l2_subdev *subdev;
|
|
|
|
struct vsp1_bru *bru;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
bru = devm_kzalloc(vsp1->dev, sizeof(*bru), GFP_KERNEL);
|
|
|
|
if (bru == NULL)
|
|
|
|
return ERR_PTR(-ENOMEM);
|
|
|
|
|
|
|
|
bru->entity.type = VSP1_ENTITY_BRU;
|
|
|
|
|
|
|
|
ret = vsp1_entity_init(vsp1, &bru->entity, 5);
|
|
|
|
if (ret < 0)
|
|
|
|
return ERR_PTR(ret);
|
|
|
|
|
|
|
|
/* Initialize the V4L2 subdev. */
|
|
|
|
subdev = &bru->entity.subdev;
|
|
|
|
v4l2_subdev_init(subdev, &bru_ops);
|
|
|
|
|
|
|
|
subdev->entity.ops = &vsp1_media_ops;
|
|
|
|
subdev->internal_ops = &vsp1_subdev_internal_ops;
|
|
|
|
snprintf(subdev->name, sizeof(subdev->name), "%s bru",
|
|
|
|
dev_name(vsp1->dev));
|
|
|
|
v4l2_set_subdevdata(subdev, bru);
|
|
|
|
subdev->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
|
|
|
|
|
|
|
|
vsp1_entity_init_formats(subdev, NULL);
|
|
|
|
|
|
|
|
return bru;
|
|
|
|
}
|