2005-04-16 22:20:36 +00:00
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/*
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* fp_emu.S
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*
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* Copyright Roman Zippel, 1997. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, and the entire permission notice in its entirety,
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* including the disclaimer of warranties.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote
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* products derived from this software without specific prior
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* written permission.
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*
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* ALTERNATIVELY, this product may be distributed under the terms of
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* the GNU General Public License, in which case the provisions of the GPL are
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* required INSTEAD OF the above restrictions. (This clause is
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* necessary due to a potential bad interaction between the GPL and
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* the restrictions contained in a BSD-style copyright.)
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*
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* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
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* OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <linux/linkage.h>
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#include <asm/entry.h>
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#include "fp_emu.h"
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.globl fpu_emu
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.globl fp_debugprint
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.globl fp_err_ua1,fp_err_ua2
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.text
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fpu_emu:
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SAVE_ALL_INT
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GET_CURRENT(%d0)
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#if defined(CPU_M68020_OR_M68030) && defined(CPU_M68040_OR_M68060)
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tst.l m68k_is040or060
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jeq 1f
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#endif
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#if defined(CPU_M68040_OR_M68060)
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move.l (FPS_PC2,%sp),(FPS_PC,%sp)
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#endif
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1:
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| emulate the instruction
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jsr fp_scan
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#if defined(CONFIG_M68060)
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#if !defined(CPU_M68060_ONLY)
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btst #3,m68k_cputype+3
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jeq 1f
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#endif
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btst #7,(FPS_SR,%sp)
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jne fp_sendtrace060
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#endif
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1:
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| emulation successful?
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tst.l %d0
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jeq ret_from_exception
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| send some signal to program here
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jra ret_from_exception
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| we jump here after an access error while trying to access
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| user space, we correct stackpointer and send a SIGSEGV to
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| the user process
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fp_err_ua2:
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addq.l #4,%sp
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fp_err_ua1:
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addq.l #4,%sp
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move.l %a0,-(%sp)
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2009-08-31 12:43:34 +00:00
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pea LSEGV_MAPERR
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pea LSIGSEGV
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2005-04-16 22:20:36 +00:00
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jsr fpemu_signal
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add.w #12,%sp
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jra ret_from_exception
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#if defined(CONFIG_M68060)
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| send a trace signal if we are debugged
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| it does not really belong here, but...
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fp_sendtrace060:
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move.l (FPS_PC,%sp),-(%sp)
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2009-08-31 12:43:34 +00:00
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pea LTRAP_TRACE
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pea LSIGTRAP
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2005-04-16 22:20:36 +00:00
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jsr fpemu_signal
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add.w #12,%sp
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jra ret_from_exception
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#endif
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.globl fp_get_data_reg, fp_put_data_reg
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.globl fp_get_addr_reg, fp_put_addr_reg
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| Entry points to get/put a register. Some of them can be get/put
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| directly, others are on the stack, as we read/write the stack
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| directly here, these function may only be called from within
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| instruction decoding, otherwise the stack pointer is incorrect
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| and the stack gets corrupted.
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fp_get_data_reg:
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jmp ([0f:w,%pc,%d0.w*4])
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.align 4
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0:
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.long fp_get_d0, fp_get_d1
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.long fp_get_d2, fp_get_d3
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.long fp_get_d4, fp_get_d5
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.long fp_get_d6, fp_get_d7
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fp_get_d0:
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2009-08-31 12:43:33 +00:00
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move.l (PT_OFF_D0+8,%sp),%d0
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2005-04-16 22:20:36 +00:00
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printf PREGISTER,"{d0->%08x}",1,%d0
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rts
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fp_get_d1:
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2009-08-31 12:43:33 +00:00
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move.l (PT_OFF_D1+8,%sp),%d0
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2005-04-16 22:20:36 +00:00
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printf PREGISTER,"{d1->%08x}",1,%d0
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rts
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fp_get_d2:
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2009-08-31 12:43:33 +00:00
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move.l (PT_OFF_D2+8,%sp),%d0
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2005-04-16 22:20:36 +00:00
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printf PREGISTER,"{d2->%08x}",1,%d0
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rts
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fp_get_d3:
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move.l %d3,%d0
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printf PREGISTER,"{d3->%08x}",1,%d0
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rts
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fp_get_d4:
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move.l %d4,%d0
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printf PREGISTER,"{d4->%08x}",1,%d0
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rts
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fp_get_d5:
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move.l %d5,%d0
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printf PREGISTER,"{d5->%08x}",1,%d0
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rts
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fp_get_d6:
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move.l %d6,%d0
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printf PREGISTER,"{d6->%08x}",1,%d0
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rts
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fp_get_d7:
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move.l %d7,%d0
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printf PREGISTER,"{d7->%08x}",1,%d0
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rts
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fp_put_data_reg:
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jmp ([0f:w,%pc,%d1.w*4])
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.align 4
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0:
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.long fp_put_d0, fp_put_d1
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.long fp_put_d2, fp_put_d3
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.long fp_put_d4, fp_put_d5
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.long fp_put_d6, fp_put_d7
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fp_put_d0:
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printf PREGISTER,"{d0<-%08x}",1,%d0
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2009-08-31 12:43:33 +00:00
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move.l %d0,(PT_OFF_D0+8,%sp)
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2005-04-16 22:20:36 +00:00
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rts
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fp_put_d1:
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printf PREGISTER,"{d1<-%08x}",1,%d0
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2009-08-31 12:43:33 +00:00
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move.l %d0,(PT_OFF_D1+8,%sp)
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2005-04-16 22:20:36 +00:00
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rts
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fp_put_d2:
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printf PREGISTER,"{d2<-%08x}",1,%d0
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2009-08-31 12:43:33 +00:00
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move.l %d0,(PT_OFF_D2+8,%sp)
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2005-04-16 22:20:36 +00:00
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rts
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fp_put_d3:
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printf PREGISTER,"{d3<-%08x}",1,%d0
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| move.l %d0,%d3
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2009-08-31 12:43:33 +00:00
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move.l %d0,(PT_OFF_D3+8,%sp)
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2005-04-16 22:20:36 +00:00
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rts
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fp_put_d4:
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printf PREGISTER,"{d4<-%08x}",1,%d0
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| move.l %d0,%d4
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2009-08-31 12:43:33 +00:00
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move.l %d0,(PT_OFF_D4+8,%sp)
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2005-04-16 22:20:36 +00:00
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rts
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fp_put_d5:
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printf PREGISTER,"{d5<-%08x}",1,%d0
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| move.l %d0,%d5
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2009-08-31 12:43:33 +00:00
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move.l %d0,(PT_OFF_D5+8,%sp)
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2005-04-16 22:20:36 +00:00
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rts
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fp_put_d6:
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printf PREGISTER,"{d6<-%08x}",1,%d0
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move.l %d0,%d6
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rts
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fp_put_d7:
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printf PREGISTER,"{d7<-%08x}",1,%d0
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move.l %d0,%d7
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rts
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fp_get_addr_reg:
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jmp ([0f:w,%pc,%d0.w*4])
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.align 4
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0:
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.long fp_get_a0, fp_get_a1
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.long fp_get_a2, fp_get_a3
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.long fp_get_a4, fp_get_a5
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.long fp_get_a6, fp_get_a7
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fp_get_a0:
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2009-08-31 12:43:33 +00:00
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move.l (PT_OFF_A0+8,%sp),%a0
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2005-04-16 22:20:36 +00:00
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printf PREGISTER,"{a0->%08x}",1,%a0
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rts
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fp_get_a1:
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2009-08-31 12:43:33 +00:00
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move.l (PT_OFF_A1+8,%sp),%a0
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2005-04-16 22:20:36 +00:00
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printf PREGISTER,"{a1->%08x}",1,%a0
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rts
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fp_get_a2:
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2009-08-31 12:43:33 +00:00
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move.l (PT_OFF_A2+8,%sp),%a0
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2005-04-16 22:20:36 +00:00
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printf PREGISTER,"{a2->%08x}",1,%a0
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rts
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fp_get_a3:
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move.l %a3,%a0
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printf PREGISTER,"{a3->%08x}",1,%a0
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rts
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fp_get_a4:
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move.l %a4,%a0
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printf PREGISTER,"{a4->%08x}",1,%a0
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rts
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fp_get_a5:
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move.l %a5,%a0
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printf PREGISTER,"{a5->%08x}",1,%a0
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rts
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fp_get_a6:
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move.l %a6,%a0
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printf PREGISTER,"{a6->%08x}",1,%a0
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rts
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fp_get_a7:
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move.l %usp,%a0
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printf PREGISTER,"{a7->%08x}",1,%a0
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rts
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fp_put_addr_reg:
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jmp ([0f:w,%pc,%d0.w*4])
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.align 4
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0:
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.long fp_put_a0, fp_put_a1
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.long fp_put_a2, fp_put_a3
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.long fp_put_a4, fp_put_a5
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.long fp_put_a6, fp_put_a7
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fp_put_a0:
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printf PREGISTER,"{a0<-%08x}",1,%a0
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2009-08-31 12:43:33 +00:00
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move.l %a0,(PT_OFF_A0+8,%sp)
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2005-04-16 22:20:36 +00:00
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rts
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fp_put_a1:
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printf PREGISTER,"{a1<-%08x}",1,%a0
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2009-08-31 12:43:33 +00:00
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move.l %a0,(PT_OFF_A1+8,%sp)
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2005-04-16 22:20:36 +00:00
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rts
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fp_put_a2:
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printf PREGISTER,"{a2<-%08x}",1,%a0
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2009-08-31 12:43:33 +00:00
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move.l %a0,(PT_OFF_A2+8,%sp)
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2005-04-16 22:20:36 +00:00
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rts
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fp_put_a3:
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printf PREGISTER,"{a3<-%08x}",1,%a0
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move.l %a0,%a3
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rts
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fp_put_a4:
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printf PREGISTER,"{a4<-%08x}",1,%a0
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move.l %a0,%a4
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rts
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fp_put_a5:
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printf PREGISTER,"{a5<-%08x}",1,%a0
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move.l %a0,%a5
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rts
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fp_put_a6:
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printf PREGISTER,"{a6<-%08x}",1,%a0
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move.l %a0,%a6
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rts
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fp_put_a7:
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printf PREGISTER,"{a7<-%08x}",1,%a0
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move.l %a0,%usp
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rts
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.data
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.align 4
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fp_debugprint:
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| .long PMDECODE
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.long PMINSTR+PMDECODE+PMCONV+PMNORM
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| .long PMCONV+PMNORM+PMINSTR
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| .long 0
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