2007-08-29 13:39:42 +00:00
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/*
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* Device Tree Source for AMCC Sequoia
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*
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* Based on Bamboo code by Josh Boyer <jwboyer@linux.vnet.ibm.com>
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* Copyright (c) 2006, 2007 IBM Corp.
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*
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* FIXME: Draft only!
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without
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* any warranty of any kind, whether express or implied.
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*
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*/
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2008-05-15 06:46:39 +00:00
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/dts-v1/;
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2007-08-29 13:39:42 +00:00
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/ {
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#address-cells = <2>;
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#size-cells = <1>;
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model = "amcc,sequoia";
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compatible = "amcc,sequoia";
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2008-05-15 06:46:39 +00:00
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dcr-parent = <&{/cpus/cpu@0}>;
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2007-08-29 13:39:42 +00:00
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2007-12-15 07:55:16 +00:00
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aliases {
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ethernet0 = &EMAC0;
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ethernet1 = &EMAC1;
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serial0 = &UART0;
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serial1 = &UART1;
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serial2 = &UART2;
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serial3 = &UART3;
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};
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2007-08-29 13:39:42 +00:00
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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2007-12-06 19:20:05 +00:00
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cpu@0 {
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2007-08-29 13:39:42 +00:00
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device_type = "cpu";
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2007-12-06 19:20:05 +00:00
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model = "PowerPC,440EPx";
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2008-05-15 06:46:39 +00:00
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reg = <0x00000000>;
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2007-08-29 13:39:42 +00:00
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clock-frequency = <0>; /* Filled in by zImage */
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timebase-frequency = <0>; /* Filled in by zImage */
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2008-05-15 06:46:39 +00:00
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i-cache-line-size = <32>;
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d-cache-line-size = <32>;
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i-cache-size = <32768>;
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d-cache-size = <32768>;
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2007-08-29 13:39:42 +00:00
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dcr-controller;
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dcr-access-method = "native";
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};
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};
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memory {
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device_type = "memory";
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2008-05-15 06:46:39 +00:00
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reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by zImage */
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2007-08-29 13:39:42 +00:00
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};
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UIC0: interrupt-controller0 {
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compatible = "ibm,uic-440epx","ibm,uic";
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interrupt-controller;
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cell-index = <0>;
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2008-05-15 06:46:39 +00:00
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dcr-reg = <0x0c0 0x009>;
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2007-08-29 13:39:42 +00:00
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#address-cells = <0>;
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#size-cells = <0>;
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#interrupt-cells = <2>;
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};
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UIC1: interrupt-controller1 {
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compatible = "ibm,uic-440epx","ibm,uic";
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interrupt-controller;
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cell-index = <1>;
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2008-05-15 06:46:39 +00:00
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dcr-reg = <0x0d0 0x009>;
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2007-08-29 13:39:42 +00:00
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#address-cells = <0>;
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#size-cells = <0>;
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#interrupt-cells = <2>;
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2008-05-15 06:46:39 +00:00
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interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
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2007-08-29 13:39:42 +00:00
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interrupt-parent = <&UIC0>;
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};
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UIC2: interrupt-controller2 {
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compatible = "ibm,uic-440epx","ibm,uic";
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interrupt-controller;
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cell-index = <2>;
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2008-05-15 06:46:39 +00:00
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dcr-reg = <0x0e0 0x009>;
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2007-08-29 13:39:42 +00:00
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#address-cells = <0>;
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#size-cells = <0>;
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#interrupt-cells = <2>;
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2008-05-15 06:46:39 +00:00
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interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */
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2007-08-29 13:39:42 +00:00
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interrupt-parent = <&UIC0>;
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};
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SDR0: sdr {
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compatible = "ibm,sdr-440epx", "ibm,sdr-440ep";
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2008-05-15 06:46:39 +00:00
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dcr-reg = <0x00e 0x002>;
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2007-08-29 13:39:42 +00:00
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};
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CPR0: cpr {
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compatible = "ibm,cpr-440epx", "ibm,cpr-440ep";
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2008-05-15 06:46:39 +00:00
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dcr-reg = <0x00c 0x002>;
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2007-08-29 13:39:42 +00:00
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};
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plb {
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compatible = "ibm,plb-440epx", "ibm,plb4";
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#address-cells = <2>;
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#size-cells = <1>;
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ranges;
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clock-frequency = <0>; /* Filled in by zImage */
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SDRAM0: sdram {
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compatible = "ibm,sdram-440epx", "ibm,sdram-44x-ddr2denali";
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2008-05-15 06:46:39 +00:00
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dcr-reg = <0x010 0x002>;
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2007-08-29 13:39:42 +00:00
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};
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2011-06-21 12:20:07 +00:00
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CRYPTO: crypto@e0100000 {
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compatible = "amcc,ppc440epx-crypto","amcc,ppc4xx-crypto";
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reg = <0 0xE0100000 0x80400>;
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interrupt-parent = <&UIC0>;
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interrupts = <0x17 0x4>;
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};
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rng@e0120000 {
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compatible = "amcc,ppc440epx-rng","amcc,ppc4xx-rng";
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reg = <0 0xE0120000 0x150>;
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};
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2007-08-29 13:39:42 +00:00
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DMA0: dma {
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compatible = "ibm,dma-440epx", "ibm,dma-4xx";
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2008-05-15 06:46:39 +00:00
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dcr-reg = <0x100 0x027>;
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2007-08-29 13:39:42 +00:00
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};
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MAL0: mcmal {
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compatible = "ibm,mcmal-440epx", "ibm,mcmal2";
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2008-05-15 06:46:39 +00:00
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dcr-reg = <0x180 0x062>;
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2007-09-18 17:29:13 +00:00
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num-tx-chans = <2>;
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num-rx-chans = <2>;
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2007-08-29 13:39:42 +00:00
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interrupt-parent = <&MAL0>;
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2008-05-15 06:46:39 +00:00
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interrupts = <0x0 0x1 0x2 0x3 0x4>;
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2007-08-29 13:39:42 +00:00
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#interrupt-cells = <1>;
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#address-cells = <0>;
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#size-cells = <0>;
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2008-05-15 06:46:39 +00:00
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interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4
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/*RXEOB*/ 0x1 &UIC0 0xb 0x4
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/*SERR*/ 0x2 &UIC1 0x0 0x4
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/*TXDE*/ 0x3 &UIC1 0x1 0x4
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/*RXDE*/ 0x4 &UIC1 0x2 0x4>;
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interrupt-map-mask = <0xffffffff>;
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2007-08-29 13:39:42 +00:00
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};
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2007-10-08 14:26:58 +00:00
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USB1: usb@e0000400 {
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USB: powerpc: Workaround for the PPC440EPX USBH_23 errata [take 3]
A published errata for ppc440epx states, that when running Linux with
both EHCI and OHCI modules loaded, the EHCI module experiences a fatal
error when a high-speed device is connected to the USB2.0, and
functions normally if OHCI module is not loaded.
There used to be recommendation to use only hi-speed or full-speed
devices with specific conditions, when respective module was unloaded.
Later, it was observed that ohci suspend is enough to keep things
going, and it was turned into workaround, as explained below.
Quote from original descriprion:
The 440EPx USB 2.0 Host controller is an EHCI compliant controller. In
USB 2.0 Host controllers, each EHCI controller has one or more companion
controllers, which may be OHCI or UHCI. An USB 2.0 Host controller will
contain one or more ports. For each port, only one of the controllers
is connected at any one time. In the 440EPx, there is only one OHCI
companion controller, and only one USB 2.0 Host port.
All ports on an USB 2.0 controller default to the companion
controller. If you load only an ohci driver, it will have control of
the ports and any deviceplugged in will operate, although high speed
devices will be forced to operate at full speed. When an ehci driver
is loaded, it explicitly takes control of the ports. If there is a
device connected, and / or every time there is a new device connected,
the ehci driver determines if the device is high speed or not. If it
is high speed, the driver retains control of the port. If it is not,
the driver explicitly gives the companion controller control of the
port.
The is a software workaround that uses
Initial version of the software workaround was posted to
linux-usb-devel:
http://www.mail-archive.com/linux-usb-devel@lists.sourceforge.net/msg54019.html
and later available from amcc.com:
http://www.amcc.com/Embedded/Downloads/download.html?cat=1&family=15&ins=2
The patch below is generally based on the latter, but reworked to
powerpc/of_device USB drivers, and uses a few devicetree inquiries to
get rid of (some) hardcoded defines.
Signed-off-by: Vitaly Bordug <vitb@kernel.crashing.org>
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2008-11-09 18:43:30 +00:00
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compatible = "ibm,usb-ohci-440epx", "ohci-be";
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2008-05-15 06:46:39 +00:00
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reg = <0x00000000 0xe0000400 0x00000060>;
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2007-10-08 14:26:58 +00:00
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interrupt-parent = <&UIC0>;
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2008-05-15 06:46:39 +00:00
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interrupts = <0x15 0x8>;
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2007-10-08 14:26:58 +00:00
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};
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2007-09-24 19:29:52 +00:00
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USB0: ehci@e0000300 {
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compatible = "ibm,usb-ehci-440epx", "usb-ehci";
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interrupt-parent = <&UIC0>;
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2008-05-15 06:46:39 +00:00
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interrupts = <0x1a 0x4>;
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reg = <0x00000000 0xe0000300 0x00000090 0x00000000 0xe0000390 0x00000070>;
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2007-09-24 19:29:52 +00:00
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big-endian;
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};
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2007-08-29 13:39:42 +00:00
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POB0: opb {
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compatible = "ibm,opb-440epx", "ibm,opb";
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#address-cells = <1>;
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#size-cells = <1>;
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2008-05-15 06:46:39 +00:00
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ranges = <0x00000000 0x00000001 0x00000000 0x80000000
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0x80000000 0x00000001 0x80000000 0x80000000>;
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2007-08-29 13:39:42 +00:00
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interrupt-parent = <&UIC1>;
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2008-05-15 06:46:39 +00:00
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interrupts = <0x7 0x4>;
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2007-08-29 13:39:42 +00:00
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clock-frequency = <0>; /* Filled in by zImage */
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EBC0: ebc {
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compatible = "ibm,ebc-440epx", "ibm,ebc";
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2008-05-15 06:46:39 +00:00
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dcr-reg = <0x012 0x002>;
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2007-08-29 13:39:42 +00:00
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#address-cells = <2>;
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#size-cells = <1>;
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clock-frequency = <0>; /* Filled in by zImage */
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2008-05-15 06:46:39 +00:00
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interrupts = <0x5 0x1>;
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2007-08-29 13:39:42 +00:00
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interrupt-parent = <&UIC1>;
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nor_flash@0,0 {
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2007-09-14 18:54:14 +00:00
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compatible = "amd,s29gl256n", "cfi-flash";
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2007-08-29 13:39:42 +00:00
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bank-width = <2>;
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2008-05-15 06:46:39 +00:00
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reg = <0x00000000 0x00000000 0x04000000>;
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2007-09-14 18:54:14 +00:00
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "Kernel";
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2008-05-15 06:46:39 +00:00
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reg = <0x00000000 0x00180000>;
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2007-09-14 18:54:14 +00:00
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};
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partition@180000 {
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label = "ramdisk";
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2008-05-15 06:46:39 +00:00
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reg = <0x00180000 0x00200000>;
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2007-09-14 18:54:14 +00:00
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};
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partition@380000 {
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label = "file system";
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2008-05-15 06:46:39 +00:00
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reg = <0x00380000 0x03aa0000>;
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2007-09-14 18:54:14 +00:00
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};
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partition@3e20000 {
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label = "kozio";
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2008-05-15 06:46:39 +00:00
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reg = <0x03e20000 0x00140000>;
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2007-09-14 18:54:14 +00:00
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};
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partition@3f60000 {
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label = "env";
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2008-05-15 06:46:39 +00:00
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reg = <0x03f60000 0x00040000>;
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2007-09-14 18:54:14 +00:00
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};
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partition@3fa0000 {
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label = "u-boot";
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2008-05-15 06:46:39 +00:00
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reg = <0x03fa0000 0x00060000>;
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2007-09-14 18:54:14 +00:00
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};
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2007-08-29 13:39:42 +00:00
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};
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2009-04-07 05:31:05 +00:00
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ndfc@3,0 {
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compatible = "ibm,ndfc";
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reg = <0x00000003 0x00000000 0x00002000>;
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ccr = <0x00001000>;
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bank-settings = <0x80002222>;
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#address-cells = <1>;
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#size-cells = <1>;
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nand {
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "u-boot";
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reg = <0x00000000 0x00084000>;
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};
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partition@84000 {
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label = "user";
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reg = <0x00000000 0x01f7c000>;
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};
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};
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};
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2007-08-29 13:39:42 +00:00
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};
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UART0: serial@ef600300 {
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device_type = "serial";
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compatible = "ns16550";
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2008-05-15 06:46:39 +00:00
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reg = <0xef600300 0x00000008>;
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virtual-reg = <0xef600300>;
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2007-08-29 13:39:42 +00:00
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clock-frequency = <0>; /* Filled in by zImage */
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2008-05-15 06:46:39 +00:00
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current-speed = <115200>;
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2007-08-29 13:39:42 +00:00
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interrupt-parent = <&UIC0>;
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2008-05-15 06:46:39 +00:00
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interrupts = <0x0 0x4>;
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2007-08-29 13:39:42 +00:00
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};
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UART1: serial@ef600400 {
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device_type = "serial";
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compatible = "ns16550";
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2008-05-15 06:46:39 +00:00
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reg = <0xef600400 0x00000008>;
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virtual-reg = <0xef600400>;
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2007-08-29 13:39:42 +00:00
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clock-frequency = <0>;
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current-speed = <0>;
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interrupt-parent = <&UIC0>;
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2008-05-15 06:46:39 +00:00
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interrupts = <0x1 0x4>;
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2007-08-29 13:39:42 +00:00
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};
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UART2: serial@ef600500 {
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device_type = "serial";
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compatible = "ns16550";
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2008-05-15 06:46:39 +00:00
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reg = <0xef600500 0x00000008>;
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virtual-reg = <0xef600500>;
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2007-08-29 13:39:42 +00:00
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clock-frequency = <0>;
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current-speed = <0>;
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interrupt-parent = <&UIC1>;
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2008-05-15 06:46:39 +00:00
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interrupts = <0x3 0x4>;
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2007-08-29 13:39:42 +00:00
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};
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UART3: serial@ef600600 {
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device_type = "serial";
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compatible = "ns16550";
|
2008-05-15 06:46:39 +00:00
|
|
|
reg = <0xef600600 0x00000008>;
|
|
|
|
virtual-reg = <0xef600600>;
|
2007-08-29 13:39:42 +00:00
|
|
|
clock-frequency = <0>;
|
|
|
|
current-speed = <0>;
|
|
|
|
interrupt-parent = <&UIC1>;
|
2008-05-15 06:46:39 +00:00
|
|
|
interrupts = <0x4 0x4>;
|
2007-08-29 13:39:42 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
IIC0: i2c@ef600700 {
|
2008-09-07 21:57:21 +00:00
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
2007-08-29 13:39:42 +00:00
|
|
|
compatible = "ibm,iic-440epx", "ibm,iic";
|
2008-05-15 06:46:39 +00:00
|
|
|
reg = <0xef600700 0x00000014>;
|
2007-08-29 13:39:42 +00:00
|
|
|
interrupt-parent = <&UIC0>;
|
2008-05-15 06:46:39 +00:00
|
|
|
interrupts = <0x2 0x4>;
|
2008-09-07 21:57:21 +00:00
|
|
|
|
|
|
|
hwmon@48 {
|
|
|
|
compatible = "adi,ad7414";
|
|
|
|
reg = <0x48>;
|
|
|
|
};
|
2007-08-29 13:39:42 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
IIC1: i2c@ef600800 {
|
2008-09-07 21:57:21 +00:00
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
2007-08-29 13:39:42 +00:00
|
|
|
compatible = "ibm,iic-440epx", "ibm,iic";
|
2008-05-15 06:46:39 +00:00
|
|
|
reg = <0xef600800 0x00000014>;
|
2007-08-29 13:39:42 +00:00
|
|
|
interrupt-parent = <&UIC0>;
|
2008-05-15 06:46:39 +00:00
|
|
|
interrupts = <0x7 0x4>;
|
2007-08-29 13:39:42 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
ZMII0: emac-zmii@ef600d00 {
|
|
|
|
compatible = "ibm,zmii-440epx", "ibm,zmii";
|
2008-05-15 06:46:39 +00:00
|
|
|
reg = <0xef600d00 0x0000000c>;
|
2007-08-29 13:39:42 +00:00
|
|
|
};
|
|
|
|
|
2007-10-01 14:12:09 +00:00
|
|
|
RGMII0: emac-rgmii@ef601000 {
|
|
|
|
compatible = "ibm,rgmii-440epx", "ibm,rgmii";
|
2008-05-15 06:46:39 +00:00
|
|
|
reg = <0xef601000 0x00000008>;
|
2007-12-05 00:14:28 +00:00
|
|
|
has-mdio;
|
2007-10-01 14:12:09 +00:00
|
|
|
};
|
|
|
|
|
2007-08-29 13:39:42 +00:00
|
|
|
EMAC0: ethernet@ef600e00 {
|
|
|
|
device_type = "network";
|
|
|
|
compatible = "ibm,emac-440epx", "ibm,emac4";
|
|
|
|
interrupt-parent = <&EMAC0>;
|
2008-05-15 06:46:39 +00:00
|
|
|
interrupts = <0x0 0x1>;
|
2007-08-29 13:39:42 +00:00
|
|
|
#interrupt-cells = <1>;
|
|
|
|
#address-cells = <0>;
|
|
|
|
#size-cells = <0>;
|
2008-05-15 06:46:39 +00:00
|
|
|
interrupt-map = </*Status*/ 0x0 &UIC0 0x18 0x4
|
|
|
|
/*Wake*/ 0x1 &UIC1 0x1d 0x4>;
|
ibm_newemac: Parameterize EMAC Multicast Match Handling
Various instances of the EMAC core have varying: 1) number of address
match slots, 2) width of the registers for handling address match slots,
3) number of registers for handling address match slots and 4) base
offset for those registers.
As the driver stands today, it assumes that all EMACs have 4 IAHT and
GAHT 32-bit registers, starting at offset 0x30 from the register base,
with only 16-bits of each used for a total of 64 match slots.
The 405EX(r) and 460EX now use the EMAC4SYNC core rather than the EMAC4
core. This core has 8 IAHT and GAHT registers, starting at offset 0x80
from the register base, with ALL 32-bits of each used for a total of
256 match slots.
This adds a new compatible device tree entry "emac4sync" and a new,
related feature flag "EMAC_FTR_EMAC4SYNC" along with a series of macros
and inlines which supply the appropriate parameterized value based on
the presence or absence of the EMAC4SYNC feature.
The code has further been reworked where appropriate to use those macros
and inlines.
In addition, the register size passed to ioremap is now taken from the
device tree:
c4 for EMAC4SYNC cores
74 for EMAC4 cores
70 for EMAC cores
rather than sizeof (emac_regs).
Finally, the device trees have been updated with the appropriate compatible
entries and resource sizes.
This has been tested on an AMCC Haleakala board such that: 1) inbound
ICMP requests to 'haleakala.local' via MDNS from both Mac OS X 10.4.11
and Ubuntu 8.04 systems as well as 2) outbound ICMP requests from
'haleakala.local' to those same systems in the '.local' domain via MDNS
now work.
Signed-off-by: Grant Erickson <gerickson@nuovations.com>
Acked-by: Jeff Garzik <jgarzik@pobox.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2008-07-07 22:03:11 +00:00
|
|
|
reg = <0xef600e00 0x00000074>;
|
2007-08-29 13:39:42 +00:00
|
|
|
local-mac-address = [000000000000];
|
|
|
|
mal-device = <&MAL0>;
|
2007-09-18 17:29:13 +00:00
|
|
|
mal-tx-channel = <0>;
|
2007-08-29 13:39:42 +00:00
|
|
|
mal-rx-channel = <0>;
|
|
|
|
cell-index = <0>;
|
2008-05-15 06:46:39 +00:00
|
|
|
max-frame-size = <9000>;
|
|
|
|
rx-fifo-size = <4096>;
|
|
|
|
tx-fifo-size = <2048>;
|
2007-10-01 14:12:09 +00:00
|
|
|
phy-mode = "rgmii";
|
2008-05-15 06:46:39 +00:00
|
|
|
phy-map = <0x00000000>;
|
2007-08-29 13:39:42 +00:00
|
|
|
zmii-device = <&ZMII0>;
|
|
|
|
zmii-channel = <0>;
|
2007-10-01 14:12:09 +00:00
|
|
|
rgmii-device = <&RGMII0>;
|
|
|
|
rgmii-channel = <0>;
|
2007-12-05 00:14:29 +00:00
|
|
|
has-inverted-stacr-oc;
|
|
|
|
has-new-stacr-staopc;
|
2007-08-29 13:39:42 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
EMAC1: ethernet@ef600f00 {
|
|
|
|
device_type = "network";
|
|
|
|
compatible = "ibm,emac-440epx", "ibm,emac4";
|
|
|
|
interrupt-parent = <&EMAC1>;
|
2008-05-15 06:46:39 +00:00
|
|
|
interrupts = <0x0 0x1>;
|
2007-08-29 13:39:42 +00:00
|
|
|
#interrupt-cells = <1>;
|
|
|
|
#address-cells = <0>;
|
|
|
|
#size-cells = <0>;
|
2008-05-15 06:46:39 +00:00
|
|
|
interrupt-map = </*Status*/ 0x0 &UIC0 0x19 0x4
|
|
|
|
/*Wake*/ 0x1 &UIC1 0x1f 0x4>;
|
ibm_newemac: Parameterize EMAC Multicast Match Handling
Various instances of the EMAC core have varying: 1) number of address
match slots, 2) width of the registers for handling address match slots,
3) number of registers for handling address match slots and 4) base
offset for those registers.
As the driver stands today, it assumes that all EMACs have 4 IAHT and
GAHT 32-bit registers, starting at offset 0x30 from the register base,
with only 16-bits of each used for a total of 64 match slots.
The 405EX(r) and 460EX now use the EMAC4SYNC core rather than the EMAC4
core. This core has 8 IAHT and GAHT registers, starting at offset 0x80
from the register base, with ALL 32-bits of each used for a total of
256 match slots.
This adds a new compatible device tree entry "emac4sync" and a new,
related feature flag "EMAC_FTR_EMAC4SYNC" along with a series of macros
and inlines which supply the appropriate parameterized value based on
the presence or absence of the EMAC4SYNC feature.
The code has further been reworked where appropriate to use those macros
and inlines.
In addition, the register size passed to ioremap is now taken from the
device tree:
c4 for EMAC4SYNC cores
74 for EMAC4 cores
70 for EMAC cores
rather than sizeof (emac_regs).
Finally, the device trees have been updated with the appropriate compatible
entries and resource sizes.
This has been tested on an AMCC Haleakala board such that: 1) inbound
ICMP requests to 'haleakala.local' via MDNS from both Mac OS X 10.4.11
and Ubuntu 8.04 systems as well as 2) outbound ICMP requests from
'haleakala.local' to those same systems in the '.local' domain via MDNS
now work.
Signed-off-by: Grant Erickson <gerickson@nuovations.com>
Acked-by: Jeff Garzik <jgarzik@pobox.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2008-07-07 22:03:11 +00:00
|
|
|
reg = <0xef600f00 0x00000074>;
|
2007-08-29 13:39:42 +00:00
|
|
|
local-mac-address = [000000000000];
|
|
|
|
mal-device = <&MAL0>;
|
2007-09-18 17:29:13 +00:00
|
|
|
mal-tx-channel = <1>;
|
2007-08-29 13:39:42 +00:00
|
|
|
mal-rx-channel = <1>;
|
|
|
|
cell-index = <1>;
|
2008-05-15 06:46:39 +00:00
|
|
|
max-frame-size = <9000>;
|
|
|
|
rx-fifo-size = <4096>;
|
|
|
|
tx-fifo-size = <2048>;
|
2007-10-01 14:12:09 +00:00
|
|
|
phy-mode = "rgmii";
|
2008-05-15 06:46:39 +00:00
|
|
|
phy-map = <0x00000000>;
|
2007-08-29 13:39:42 +00:00
|
|
|
zmii-device = <&ZMII0>;
|
|
|
|
zmii-channel = <1>;
|
2007-10-01 14:12:09 +00:00
|
|
|
rgmii-device = <&RGMII0>;
|
|
|
|
rgmii-channel = <1>;
|
2007-12-05 00:14:29 +00:00
|
|
|
has-inverted-stacr-oc;
|
|
|
|
has-new-stacr-staopc;
|
2007-08-29 13:39:42 +00:00
|
|
|
};
|
|
|
|
};
|
2007-12-21 16:26:01 +00:00
|
|
|
|
|
|
|
PCI0: pci@1ec000000 {
|
|
|
|
device_type = "pci";
|
|
|
|
#interrupt-cells = <1>;
|
|
|
|
#size-cells = <2>;
|
|
|
|
#address-cells = <3>;
|
|
|
|
compatible = "ibm,plb440epx-pci", "ibm,plb-pci";
|
|
|
|
primary;
|
2008-05-15 06:46:39 +00:00
|
|
|
reg = <0x00000001 0xeec00000 0x00000008 /* Config space access */
|
|
|
|
0x00000001 0xeed00000 0x00000004 /* IACK */
|
|
|
|
0x00000001 0xeed00000 0x00000004 /* Special cycle */
|
|
|
|
0x00000001 0xef400000 0x00000040>; /* Internal registers */
|
2007-12-21 16:26:01 +00:00
|
|
|
|
|
|
|
/* Outbound ranges, one memory and one IO,
|
|
|
|
* later cannot be changed. Chip supports a second
|
|
|
|
* IO range but we don't use it for now
|
2008-05-06 17:37:15 +00:00
|
|
|
* From the 440EPx user manual:
|
|
|
|
* PCI 1 Memory 1 8000 0000 1 BFFF FFFF 1GB
|
|
|
|
* I/O 1 E800 0000 1 E800 FFFF 64KB
|
|
|
|
* I/O 1 E880 0000 1 EBFF FFFF 56MB
|
2007-12-21 16:26:01 +00:00
|
|
|
*/
|
2008-05-15 06:46:39 +00:00
|
|
|
ranges = <0x02000000 0x00000000 0x80000000 0x00000001 0x80000000 0x00000000 0x40000000
|
|
|
|
0x01000000 0x00000000 0x00000000 0x00000001 0xe8000000 0x00000000 0x00010000
|
|
|
|
0x01000000 0x00000000 0x00000000 0x00000001 0xe8800000 0x00000000 0x03800000>;
|
2007-12-21 16:26:01 +00:00
|
|
|
|
|
|
|
/* Inbound 2GB range starting at 0 */
|
2008-05-15 06:46:39 +00:00
|
|
|
dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
|
2007-12-21 16:26:01 +00:00
|
|
|
|
|
|
|
/* All PCI interrupts are routed to IRQ 67 */
|
2008-05-15 06:46:39 +00:00
|
|
|
interrupt-map-mask = <0x0 0x0 0x0 0x0>;
|
|
|
|
interrupt-map = < 0x0 0x0 0x0 0x0 &UIC2 0x3 0x8 >;
|
2007-12-21 16:26:01 +00:00
|
|
|
};
|
2007-08-29 13:39:42 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
chosen {
|
|
|
|
linux,stdout-path = "/plb/opb/serial@ef600300";
|
|
|
|
bootargs = "console=ttyS0,115200";
|
|
|
|
};
|
|
|
|
};
|