linux/include/asm-mips/mach-vr41xx/irq.h

#ifndef __ASM_MACH_VR41XX_IRQ_H
#define __ASM_MACH_VR41XX_IRQ_H

#include <asm/vr41xx/irq.h> /* for MIPS_CPU_IRQ_BASE */
#ifdef CONFIG_NEC_CMBVR4133
#include <asm/vr41xx/cmbvr4133.h> /* for I8259A_IRQ_BASE */
#endif

#include_next <irq.h>

#endif /* __ASM_MACH_VR41XX_IRQ_H */
[MIPS] Define MIPS_CPU_IRQ_BASE in generic header The irq_base for {mips,rm7k,rm9k}_cpu_irq_init() are constant on all platforms and are same value on most platforms (0 or 16, depends on CONFIG_I8259). Define them in asm-mips/mach-generic/irq.h and make them customizable. This will save a few cycle on each CPU interrupt. A good side effect is removing some dependencies to MALTA in generic SMTC code. Although MIPS_CPU_IRQ_BASE is customizable, this patch changes irq mappings on DDB5477, EMMA2RH and MIPS_SIM, since really customizing them might cause some header dependency problem and there seems no good reason to customize it. So currently only VR41XX is using custom MIPS_CPU_IRQ_BASE value, which is 0 regardless of CONFIG_I8259. Testing this patch on those platforms is greatly appreciated. Thank you. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org> 2007-01-07 17:14:29 +00:00			`#ifndef __ASM_MACH_VR41XX_IRQ_H`
			`#define __ASM_MACH_VR41XX_IRQ_H`

			`#include <asm/vr41xx/irq.h> /* for MIPS_CPU_IRQ_BASE */`
[MIPS] Make I8259A_IRQ_BASE customizable Move I8259A_IRQ_BASE from asm/i8259.h to asm/mach-generic/irq.h and make it really customizable. And remove I8259_IRQ_BASE declared on some platforms. Currently only NEC_CMBVR4133 is using custom I8259A_IRQ_BASE value. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org> 2007-01-14 14:41:42 +00:00			`#ifdef CONFIG_NEC_CMBVR4133`
			`#include <asm/vr41xx/cmbvr4133.h> /* for I8259A_IRQ_BASE */`
			`#endif`
[MIPS] Define MIPS_CPU_IRQ_BASE in generic header The irq_base for {mips,rm7k,rm9k}_cpu_irq_init() are constant on all platforms and are same value on most platforms (0 or 16, depends on CONFIG_I8259). Define them in asm-mips/mach-generic/irq.h and make them customizable. This will save a few cycle on each CPU interrupt. A good side effect is removing some dependencies to MALTA in generic SMTC code. Although MIPS_CPU_IRQ_BASE is customizable, this patch changes irq mappings on DDB5477, EMMA2RH and MIPS_SIM, since really customizing them might cause some header dependency problem and there seems no good reason to customize it. So currently only VR41XX is using custom MIPS_CPU_IRQ_BASE value, which is 0 regardless of CONFIG_I8259. Testing this patch on those platforms is greatly appreciated. Thank you. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org> 2007-01-07 17:14:29 +00:00
			`#include_next <irq.h>`

			`#endif /* __ASM_MACH_VR41XX_IRQ_H */`