2017-12-06 16:49:39 +00:00
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/*
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* Copyright 2015 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#ifndef _DRM_GPU_SCHEDULER_H_
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#define _DRM_GPU_SCHEDULER_H_
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#include <drm/spsc_queue.h>
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#include <linux/dma-fence.h>
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2019-11-08 05:31:10 +00:00
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#include <linux/completion.h>
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2017-12-06 16:49:39 +00:00
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2018-05-30 19:11:01 +00:00
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#define MAX_WAIT_SCHED_ENTITY_Q_EMPTY msecs_to_jiffies(1000)
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2017-12-06 16:49:39 +00:00
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struct drm_gpu_scheduler;
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struct drm_sched_rq;
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2020-08-11 23:59:58 +00:00
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/* These are often used as an (initial) index
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* to an array, and as such should start at 0.
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*/
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2017-12-06 16:49:39 +00:00
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enum drm_sched_priority {
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DRM_SCHED_PRIORITY_MIN,
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DRM_SCHED_PRIORITY_NORMAL,
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2020-08-11 23:59:58 +00:00
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DRM_SCHED_PRIORITY_HIGH,
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2017-12-06 16:49:39 +00:00
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DRM_SCHED_PRIORITY_KERNEL,
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2020-08-11 23:59:58 +00:00
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DRM_SCHED_PRIORITY_COUNT,
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2017-12-06 16:49:39 +00:00
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DRM_SCHED_PRIORITY_UNSET = -2
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};
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/**
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2018-05-29 05:53:07 +00:00
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* struct drm_sched_entity - A wrapper around a job queue (typically
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* attached to the DRM file_priv).
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*
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* @list: used to append this struct to the list of entities in the
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* runqueue.
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2018-08-01 08:19:59 +00:00
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* @rq: runqueue on which this entity is currently scheduled.
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2020-01-22 09:37:56 +00:00
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* @sched_list: A list of schedulers (drm_gpu_schedulers).
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* Jobs from this entity can be scheduled on any scheduler
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* on this list.
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2020-01-14 09:38:42 +00:00
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* @num_sched_list: number of drm_gpu_schedulers in the sched_list.
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2020-03-28 13:20:22 +00:00
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* @priority: priority of the entity
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2018-05-29 05:53:07 +00:00
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* @rq_lock: lock to modify the runqueue to which this entity belongs.
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* @job_queue: the list of jobs of this entity.
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* @fence_seq: a linearly increasing seqno incremented with each
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* new &drm_sched_fence which is part of the entity.
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* @fence_context: a unique context for all the fences which belong
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* to this entity.
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* The &drm_sched_fence.scheduled uses the
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* fence_context but &drm_sched_fence.finished uses
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* fence_context + 1.
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* @dependency: the dependency fence of the job which is on the top
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* of the job queue.
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* @cb: callback for the dependency fence above.
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* @guilty: points to ctx's guilty.
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* @fini_status: contains the exit status in case the process was signalled.
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* @last_scheduled: points to the finished fence of the last scheduled job.
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2018-07-26 11:43:49 +00:00
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* @last_user: last group leader pushing a job into the entity.
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2018-08-17 14:32:50 +00:00
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* @stopped: Marks the enity as removed from rq and destined for termination.
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2019-11-04 21:30:05 +00:00
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* @entity_idle: Signals when enityt is not in use
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2018-04-04 22:32:51 +00:00
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*
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* Entities will emit jobs in order to their corresponding hardware
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* ring, and the scheduler will alternate between entities based on
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* scheduling policy.
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2018-05-29 05:53:07 +00:00
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*/
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2017-12-06 16:49:39 +00:00
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struct drm_sched_entity {
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struct list_head list;
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struct drm_sched_rq *rq;
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2019-12-05 10:38:00 +00:00
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struct drm_gpu_scheduler **sched_list;
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2020-01-14 09:38:42 +00:00
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unsigned int num_sched_list;
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2019-12-05 10:38:00 +00:00
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enum drm_sched_priority priority;
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2017-12-06 16:49:39 +00:00
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spinlock_t rq_lock;
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struct spsc_queue job_queue;
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atomic_t fence_seq;
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uint64_t fence_context;
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struct dma_fence *dependency;
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struct dma_fence_cb cb;
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2018-05-29 05:53:07 +00:00
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atomic_t *guilty;
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struct dma_fence *last_scheduled;
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2018-07-26 11:43:49 +00:00
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struct task_struct *last_user;
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2018-08-17 14:32:50 +00:00
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bool stopped;
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2019-11-04 21:30:05 +00:00
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struct completion entity_idle;
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2017-12-06 16:49:39 +00:00
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};
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/**
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2018-05-29 05:53:07 +00:00
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* struct drm_sched_rq - queue of entities to be scheduled.
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*
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* @lock: to modify the entities list.
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2018-07-13 09:51:13 +00:00
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* @sched: the scheduler to which this rq belongs to.
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2018-05-29 05:53:07 +00:00
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* @entities: list of the entities to be scheduled.
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* @current_entity: the entity which is to be scheduled.
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*
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2017-12-06 16:49:39 +00:00
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* Run queue is a set of entities scheduling command submissions for
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* one specific ring. It implements the scheduling policy that selects
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* the next entity to emit commands from.
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2018-05-29 05:53:07 +00:00
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*/
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2017-12-06 16:49:39 +00:00
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struct drm_sched_rq {
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spinlock_t lock;
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2018-07-13 09:51:13 +00:00
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struct drm_gpu_scheduler *sched;
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2017-12-06 16:49:39 +00:00
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struct list_head entities;
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struct drm_sched_entity *current_entity;
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};
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2018-05-29 05:53:07 +00:00
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/**
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* struct drm_sched_fence - fences corresponding to the scheduling of a job.
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*/
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2017-12-06 16:49:39 +00:00
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struct drm_sched_fence {
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2018-05-29 05:53:07 +00:00
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/**
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* @scheduled: this fence is what will be signaled by the scheduler
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* when the job is scheduled.
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*/
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2017-12-06 16:49:39 +00:00
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struct dma_fence scheduled;
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2018-04-04 22:32:51 +00:00
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2018-05-29 05:53:07 +00:00
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/**
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* @finished: this fence is what will be signaled by the scheduler
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* when the job is completed.
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*
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* When setting up an out fence for the job, you should use
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* this, since it's available immediately upon
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* drm_sched_job_init(), and the fence returned by the driver
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* from run_job() won't be created until the dependencies have
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* resolved.
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*/
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2017-12-06 16:49:39 +00:00
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struct dma_fence finished;
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2018-04-04 22:32:51 +00:00
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2018-05-29 05:53:07 +00:00
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/**
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* @parent: the fence returned by &drm_sched_backend_ops.run_job
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* when scheduling the job on hardware. We signal the
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* &drm_sched_fence.finished fence once parent is signalled.
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*/
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2017-12-06 16:49:39 +00:00
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struct dma_fence *parent;
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2018-05-29 05:53:07 +00:00
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/**
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* @sched: the scheduler instance to which the job having this struct
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* belongs to.
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*/
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2017-12-06 16:49:39 +00:00
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struct drm_gpu_scheduler *sched;
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2018-05-29 05:53:07 +00:00
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/**
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* @lock: the lock used by the scheduled and the finished fences.
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*/
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2017-12-06 16:49:39 +00:00
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spinlock_t lock;
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2018-05-29 05:53:07 +00:00
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/**
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* @owner: job owner for debugging
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*/
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2017-12-06 16:49:39 +00:00
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void *owner;
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};
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struct drm_sched_fence *to_drm_sched_fence(struct dma_fence *f);
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2018-04-04 22:32:51 +00:00
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/**
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2018-05-29 05:53:07 +00:00
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* struct drm_sched_job - A job to be run by an entity.
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*
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* @queue_node: used to append this struct to the queue of jobs in an entity.
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2020-12-09 22:31:42 +00:00
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* @list: a job participates in a "pending" and "done" lists.
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2018-05-29 05:53:07 +00:00
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* @sched: the scheduler instance on which this job is scheduled.
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* @s_fence: contains the fences for the scheduling of job.
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* @finish_cb: the callback for the finished fence.
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* @id: a unique id assigned to each job scheduled on the scheduler.
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* @karma: increment on every hang caused by this job. If this exceeds the hang
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* limit of the scheduler then the job is marked guilty and will not
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* be scheduled further.
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* @s_priority: the priority of the job.
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* @entity: the entity to which this job belongs.
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2018-12-05 19:21:28 +00:00
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* @cb: the callback for the parent fence in s_fence.
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2018-04-04 22:32:51 +00:00
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*
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* A job is created by the driver using drm_sched_job_init(), and
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* should call drm_sched_entity_push_job() once it wants the scheduler
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* to schedule the job.
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*/
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2017-12-06 16:49:39 +00:00
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struct drm_sched_job {
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struct spsc_node queue_node;
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2020-12-04 03:17:18 +00:00
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struct list_head list;
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2017-12-06 16:49:39 +00:00
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struct drm_gpu_scheduler *sched;
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struct drm_sched_fence *s_fence;
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struct dma_fence_cb finish_cb;
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uint64_t id;
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atomic_t karma;
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enum drm_sched_priority s_priority;
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2020-12-04 03:17:18 +00:00
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struct drm_sched_entity *entity;
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2018-12-05 19:21:28 +00:00
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struct dma_fence_cb cb;
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2017-12-06 16:49:39 +00:00
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};
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static inline bool drm_sched_invalidate_job(struct drm_sched_job *s_job,
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int threshold)
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{
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gpu/drm: ring_mirror_list --> pending_list
Rename "ring_mirror_list" to "pending_list",
to describe what something is, not what it does,
how it's used, or how the hardware implements it.
This also abstracts the actual hardware
implementation, i.e. how the low-level driver
communicates with the device it drives, ring, CAM,
etc., shouldn't be exposed to DRM.
The pending_list keeps jobs submitted, which are
out of our control. Usually this means they are
pending execution status in hardware, but the
latter definition is a more general (inclusive)
definition.
Signed-off-by: Luben Tuikov <luben.tuikov@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Link: https://patchwork.freedesktop.org/patch/405573/
Cc: Alexander Deucher <Alexander.Deucher@amd.com>
Cc: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Cc: Christian König <christian.koenig@amd.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Christian König <christian.koenig@amd.com>
2020-12-04 03:17:19 +00:00
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return s_job && atomic_inc_return(&s_job->karma) > threshold;
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2017-12-06 16:49:39 +00:00
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}
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2021-01-20 20:09:59 +00:00
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enum drm_gpu_sched_stat {
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DRM_GPU_SCHED_STAT_NONE, /* Reserve 0 */
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DRM_GPU_SCHED_STAT_NOMINAL,
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DRM_GPU_SCHED_STAT_ENODEV,
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};
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2017-12-06 16:49:39 +00:00
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/**
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2018-05-29 05:53:07 +00:00
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* struct drm_sched_backend_ops
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*
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2017-12-06 16:49:39 +00:00
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* Define the backend operations called by the scheduler,
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2018-05-29 05:53:07 +00:00
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* these functions should be implemented in driver side.
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*/
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2017-12-06 16:49:39 +00:00
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struct drm_sched_backend_ops {
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2018-05-29 05:53:07 +00:00
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/**
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* @dependency: Called when the scheduler is considering scheduling
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* this job next, to get another struct dma_fence for this job to
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2018-04-04 22:32:51 +00:00
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* block on. Once it returns NULL, run_job() may be called.
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*/
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2017-12-06 16:49:39 +00:00
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struct dma_fence *(*dependency)(struct drm_sched_job *sched_job,
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struct drm_sched_entity *s_entity);
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2018-04-04 22:32:51 +00:00
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2018-05-29 05:53:07 +00:00
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/**
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* @run_job: Called to execute the job once all of the dependencies
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* have been resolved. This may be called multiple times, if
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2018-04-04 22:32:51 +00:00
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* timedout_job() has happened and drm_sched_job_recovery()
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* decides to try it again.
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*/
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2017-12-06 16:49:39 +00:00
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struct dma_fence *(*run_job)(struct drm_sched_job *sched_job);
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2018-04-04 22:32:51 +00:00
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2018-05-29 05:53:07 +00:00
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/**
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2021-01-20 20:09:59 +00:00
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* @timedout_job: Called when a job has taken too long to execute,
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* to trigger GPU recovery.
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*
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* Return DRM_GPU_SCHED_STAT_NOMINAL, when all is normal,
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* and the underlying driver has started or completed recovery.
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*
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* Return DRM_GPU_SCHED_STAT_ENODEV, if the device is no longer
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* available, i.e. has been unplugged.
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2018-04-04 22:32:51 +00:00
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*/
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2021-01-20 20:09:59 +00:00
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enum drm_gpu_sched_stat (*timedout_job)(struct drm_sched_job *sched_job);
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2018-04-04 22:32:51 +00:00
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2018-05-29 05:53:07 +00:00
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/**
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* @free_job: Called once the job's finished fence has been signaled
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* and it's time to clean it up.
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2018-04-04 22:32:51 +00:00
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*/
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2017-12-06 16:49:39 +00:00
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void (*free_job)(struct drm_sched_job *sched_job);
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};
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/**
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2018-05-29 05:53:07 +00:00
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* struct drm_gpu_scheduler
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*
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* @ops: backend operations provided by the driver.
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* @hw_submission_limit: the max size of the hardware queue.
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* @timeout: the time after which a job is removed from the scheduler.
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* @name: name of the ring for which this scheduler is being used.
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* @sched_rq: priority wise array of run queues.
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* @wake_up_worker: the wait queue on which the scheduler sleeps until a job
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* is ready to be scheduled.
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* @job_scheduled: once @drm_sched_entity_do_release is called the scheduler
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* waits on this wait queue until all the scheduled jobs are
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* finished.
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* @hw_rq_count: the number of jobs currently in the hardware queue.
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* @job_id_count: used to assign unique id to the each job.
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2018-09-25 17:09:02 +00:00
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* @work_tdr: schedules a delayed call to @drm_sched_job_timedout after the
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* timeout interval is over.
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2018-05-29 05:53:07 +00:00
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* @thread: the kthread on which the scheduler which run.
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gpu/drm: ring_mirror_list --> pending_list
Rename "ring_mirror_list" to "pending_list",
to describe what something is, not what it does,
how it's used, or how the hardware implements it.
This also abstracts the actual hardware
implementation, i.e. how the low-level driver
communicates with the device it drives, ring, CAM,
etc., shouldn't be exposed to DRM.
The pending_list keeps jobs submitted, which are
out of our control. Usually this means they are
pending execution status in hardware, but the
latter definition is a more general (inclusive)
definition.
Signed-off-by: Luben Tuikov <luben.tuikov@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Link: https://patchwork.freedesktop.org/patch/405573/
Cc: Alexander Deucher <Alexander.Deucher@amd.com>
Cc: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Cc: Christian König <christian.koenig@amd.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Christian König <christian.koenig@amd.com>
2020-12-04 03:17:19 +00:00
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* @pending_list: the list of jobs which are currently in the job queue.
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* @job_list_lock: lock to protect the pending_list.
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2018-05-29 05:53:07 +00:00
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* @hang_limit: once the hangs by a job crosses this limit then it is marked
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2021-05-28 23:51:52 +00:00
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* guilty and it will no longer be considered for scheduling.
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2020-06-25 12:07:23 +00:00
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* @score: score to help loadbalancer pick a idle sched
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2021-04-01 12:50:15 +00:00
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* @_score: score used when the driver doesn't provide one
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2018-10-18 16:32:46 +00:00
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* @ready: marks if the underlying HW is ready to work
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2019-04-18 15:00:23 +00:00
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* @free_guilty: A hit to time out handler to free the guilty job.
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2018-05-29 05:53:07 +00:00
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*
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* One scheduler is implemented for each hardware ring.
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*/
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2017-12-06 16:49:39 +00:00
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struct drm_gpu_scheduler {
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const struct drm_sched_backend_ops *ops;
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uint32_t hw_submission_limit;
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long timeout;
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const char *name;
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2020-08-11 23:59:58 +00:00
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struct drm_sched_rq sched_rq[DRM_SCHED_PRIORITY_COUNT];
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2017-12-06 16:49:39 +00:00
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wait_queue_head_t wake_up_worker;
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wait_queue_head_t job_scheduled;
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atomic_t hw_rq_count;
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atomic64_t job_id_count;
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2018-09-25 17:09:02 +00:00
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struct delayed_work work_tdr;
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2017-12-06 16:49:39 +00:00
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struct task_struct *thread;
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gpu/drm: ring_mirror_list --> pending_list
Rename "ring_mirror_list" to "pending_list",
to describe what something is, not what it does,
how it's used, or how the hardware implements it.
This also abstracts the actual hardware
implementation, i.e. how the low-level driver
communicates with the device it drives, ring, CAM,
etc., shouldn't be exposed to DRM.
The pending_list keeps jobs submitted, which are
out of our control. Usually this means they are
pending execution status in hardware, but the
latter definition is a more general (inclusive)
definition.
Signed-off-by: Luben Tuikov <luben.tuikov@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Link: https://patchwork.freedesktop.org/patch/405573/
Cc: Alexander Deucher <Alexander.Deucher@amd.com>
Cc: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Cc: Christian König <christian.koenig@amd.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Christian König <christian.koenig@amd.com>
2020-12-04 03:17:19 +00:00
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struct list_head pending_list;
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2017-12-06 16:49:39 +00:00
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spinlock_t job_list_lock;
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int hang_limit;
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2021-02-02 11:40:01 +00:00
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atomic_t *score;
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atomic_t _score;
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2020-06-25 12:07:23 +00:00
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bool ready;
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2019-04-18 15:00:23 +00:00
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bool free_guilty;
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2017-12-06 16:49:39 +00:00
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};
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int drm_sched_init(struct drm_gpu_scheduler *sched,
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const struct drm_sched_backend_ops *ops,
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uint32_t hw_submission, unsigned hang_limit, long timeout,
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2021-02-02 11:40:01 +00:00
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atomic_t *score, const char *name);
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2018-10-18 16:32:46 +00:00
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2017-12-06 16:49:39 +00:00
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void drm_sched_fini(struct drm_gpu_scheduler *sched);
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2018-08-06 12:25:32 +00:00
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int drm_sched_job_init(struct drm_sched_job *job,
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struct drm_sched_entity *entity,
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void *owner);
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2020-02-27 14:34:15 +00:00
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void drm_sched_entity_modify_sched(struct drm_sched_entity *entity,
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struct drm_gpu_scheduler **sched_list,
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unsigned int num_sched_list);
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2018-10-29 09:32:28 +00:00
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void drm_sched_job_cleanup(struct drm_sched_job *job);
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2018-08-06 12:25:32 +00:00
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void drm_sched_wakeup(struct drm_gpu_scheduler *sched);
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2019-04-18 15:00:21 +00:00
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void drm_sched_stop(struct drm_gpu_scheduler *sched, struct drm_sched_job *bad);
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2018-12-04 21:56:14 +00:00
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void drm_sched_start(struct drm_gpu_scheduler *sched, bool full_recovery);
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void drm_sched_resubmit_jobs(struct drm_gpu_scheduler *sched);
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2021-03-08 04:41:27 +00:00
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void drm_sched_resubmit_jobs_ext(struct drm_gpu_scheduler *sched, int max);
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2018-12-04 21:56:14 +00:00
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void drm_sched_increase_karma(struct drm_sched_job *bad);
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2021-03-08 04:41:27 +00:00
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void drm_sched_reset_karma(struct drm_sched_job *bad);
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void drm_sched_increase_karma_ext(struct drm_sched_job *bad, int type);
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2018-08-06 12:25:32 +00:00
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bool drm_sched_dependency_optimized(struct dma_fence* fence,
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struct drm_sched_entity *entity);
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2018-10-12 14:47:13 +00:00
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void drm_sched_fault(struct drm_gpu_scheduler *sched);
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2018-08-06 12:25:32 +00:00
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void drm_sched_job_kickout(struct drm_sched_job *s_job);
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void drm_sched_rq_add_entity(struct drm_sched_rq *rq,
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struct drm_sched_entity *entity);
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void drm_sched_rq_remove_entity(struct drm_sched_rq *rq,
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struct drm_sched_entity *entity);
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2017-12-06 16:49:39 +00:00
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2018-07-13 09:51:14 +00:00
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int drm_sched_entity_init(struct drm_sched_entity *entity,
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2019-12-05 10:38:00 +00:00
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enum drm_sched_priority priority,
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struct drm_gpu_scheduler **sched_list,
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2020-01-14 09:38:42 +00:00
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unsigned int num_sched_list,
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2018-03-29 17:06:32 +00:00
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atomic_t *guilty);
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2018-07-20 12:21:05 +00:00
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long drm_sched_entity_flush(struct drm_sched_entity *entity, long timeout);
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void drm_sched_entity_fini(struct drm_sched_entity *entity);
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void drm_sched_entity_destroy(struct drm_sched_entity *entity);
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2018-08-06 12:25:32 +00:00
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void drm_sched_entity_select_rq(struct drm_sched_entity *entity);
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struct drm_sched_job *drm_sched_entity_pop_job(struct drm_sched_entity *entity);
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2017-12-06 16:49:39 +00:00
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void drm_sched_entity_push_job(struct drm_sched_job *sched_job,
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struct drm_sched_entity *entity);
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2018-08-01 14:22:39 +00:00
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void drm_sched_entity_set_priority(struct drm_sched_entity *entity,
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enum drm_sched_priority priority);
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2018-08-06 12:25:32 +00:00
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bool drm_sched_entity_is_ready(struct drm_sched_entity *entity);
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2017-12-06 16:49:39 +00:00
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struct drm_sched_fence *drm_sched_fence_create(
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struct drm_sched_entity *s_entity, void *owner);
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void drm_sched_fence_scheduled(struct drm_sched_fence *fence);
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void drm_sched_fence_finished(struct drm_sched_fence *fence);
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2018-11-29 10:05:20 +00:00
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unsigned long drm_sched_suspend_timeout(struct drm_gpu_scheduler *sched);
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void drm_sched_resume_timeout(struct drm_gpu_scheduler *sched,
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unsigned long remaining);
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2020-03-13 10:39:27 +00:00
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struct drm_gpu_scheduler *
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drm_sched_pick_best(struct drm_gpu_scheduler **sched_list,
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unsigned int num_sched_list);
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2018-11-29 10:05:20 +00:00
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2017-12-06 16:49:39 +00:00
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#endif
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