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309 lines
7.6 KiB
ArmAsm
309 lines
7.6 KiB
ArmAsm
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/* MN10300 CPU core caching routines, using indirect regs on cache controller
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*
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* Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
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* Written by David Howells (dhowells@redhat.com)
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public Licence
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* as published by the Free Software Foundation; either version
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* 2 of the Licence, or (at your option) any later version.
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*/
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#include <linux/sys.h>
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#include <linux/linkage.h>
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#include <asm/smp.h>
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#include <asm/page.h>
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#include <asm/cache.h>
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#include <asm/irqflags.h>
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.am33_2
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#ifndef CONFIG_SMP
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.globl mn10300_dcache_flush
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.globl mn10300_dcache_flush_page
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.globl mn10300_dcache_flush_range
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.globl mn10300_dcache_flush_range2
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.globl mn10300_dcache_flush_inv
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.globl mn10300_dcache_flush_inv_page
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.globl mn10300_dcache_flush_inv_range
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.globl mn10300_dcache_flush_inv_range2
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mn10300_dcache_flush = mn10300_local_dcache_flush
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mn10300_dcache_flush_page = mn10300_local_dcache_flush_page
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mn10300_dcache_flush_range = mn10300_local_dcache_flush_range
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mn10300_dcache_flush_range2 = mn10300_local_dcache_flush_range2
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mn10300_dcache_flush_inv = mn10300_local_dcache_flush_inv
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mn10300_dcache_flush_inv_page = mn10300_local_dcache_flush_inv_page
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mn10300_dcache_flush_inv_range = mn10300_local_dcache_flush_inv_range
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mn10300_dcache_flush_inv_range2 = mn10300_local_dcache_flush_inv_range2
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#endif /* !CONFIG_SMP */
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###############################################################################
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#
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# void mn10300_local_dcache_flush(void)
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# Flush the entire data cache back to RAM
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#
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###############################################################################
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ALIGN
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.globl mn10300_local_dcache_flush
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.type mn10300_local_dcache_flush,@function
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mn10300_local_dcache_flush:
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movhu (CHCTR),d0
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btst CHCTR_DCEN,d0
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beq mn10300_local_dcache_flush_end
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mov DCPGCR,a0
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LOCAL_CLI_SAVE(d1)
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# wait for busy bit of area purge
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setlb
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mov (a0),d0
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btst DCPGCR_DCPGBSY,d0
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lne
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# set mask
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clr d0
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mov d0,(DCPGMR)
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# area purge
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#
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# DCPGCR = DCPGCR_DCP
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#
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mov DCPGCR_DCP,d0
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mov d0,(a0)
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# wait for busy bit of area purge
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setlb
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mov (a0),d0
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btst DCPGCR_DCPGBSY,d0
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lne
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LOCAL_IRQ_RESTORE(d1)
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mn10300_local_dcache_flush_end:
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ret [],0
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.size mn10300_local_dcache_flush,.-mn10300_local_dcache_flush
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###############################################################################
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#
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# void mn10300_local_dcache_flush_page(unsigned long start)
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# void mn10300_local_dcache_flush_range(unsigned long start, unsigned long end)
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# void mn10300_local_dcache_flush_range2(unsigned long start, unsigned long size)
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# Flush a range of addresses on a page in the dcache
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#
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###############################################################################
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ALIGN
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.globl mn10300_local_dcache_flush_page
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.globl mn10300_local_dcache_flush_range
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.globl mn10300_local_dcache_flush_range2
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.type mn10300_local_dcache_flush_page,@function
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.type mn10300_local_dcache_flush_range,@function
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.type mn10300_local_dcache_flush_range2,@function
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mn10300_local_dcache_flush_page:
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and ~(PAGE_SIZE-1),d0
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mov PAGE_SIZE,d1
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mn10300_local_dcache_flush_range2:
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add d0,d1
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mn10300_local_dcache_flush_range:
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movm [d2,d3,a2],(sp)
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movhu (CHCTR),d2
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btst CHCTR_DCEN,d2
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beq mn10300_local_dcache_flush_range_end
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# calculate alignsize
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#
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# alignsize = L1_CACHE_BYTES;
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# for (i = (end - start - 1) / L1_CACHE_BYTES ; i > 0; i >>= 1)
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# alignsize <<= 1;
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# d2 = alignsize;
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#
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mov L1_CACHE_BYTES,d2
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sub d0,d1,d3
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add -1,d3
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lsr L1_CACHE_SHIFT,d3
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beq 2f
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1:
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add d2,d2
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lsr 1,d3
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bne 1b
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2:
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mov d1,a1 # a1 = end
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LOCAL_CLI_SAVE(d3)
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mov DCPGCR,a0
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# wait for busy bit of area purge
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setlb
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mov (a0),d1
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btst DCPGCR_DCPGBSY,d1
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lne
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# determine the mask
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mov d2,d1
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add -1,d1
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not d1 # d1 = mask = ~(alignsize-1)
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mov d1,(DCPGMR)
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and d1,d0,a2 # a2 = mask & start
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dcpgloop:
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# area purge
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mov a2,d0
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or DCPGCR_DCP,d0
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mov d0,(a0) # DCPGCR = (mask & start) | DCPGCR_DCP
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# wait for busy bit of area purge
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setlb
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mov (a0),d1
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btst DCPGCR_DCPGBSY,d1
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lne
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# check purge of end address
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add d2,a2 # a2 += alignsize
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cmp a1,a2 # if (a2 < end) goto dcpgloop
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bns dcpgloop
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LOCAL_IRQ_RESTORE(d3)
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mn10300_local_dcache_flush_range_end:
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ret [d2,d3,a2],12
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.size mn10300_local_dcache_flush_page,.-mn10300_local_dcache_flush_page
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.size mn10300_local_dcache_flush_range,.-mn10300_local_dcache_flush_range
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.size mn10300_local_dcache_flush_range2,.-mn10300_local_dcache_flush_range2
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###############################################################################
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#
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# void mn10300_local_dcache_flush_inv(void)
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# Flush the entire data cache and invalidate all entries
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#
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###############################################################################
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ALIGN
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.globl mn10300_local_dcache_flush_inv
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.type mn10300_local_dcache_flush_inv,@function
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mn10300_local_dcache_flush_inv:
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movhu (CHCTR),d0
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btst CHCTR_DCEN,d0
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beq mn10300_local_dcache_flush_inv_end
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mov DCPGCR,a0
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LOCAL_CLI_SAVE(d1)
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# wait for busy bit of area purge & invalidate
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setlb
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mov (a0),d0
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btst DCPGCR_DCPGBSY,d0
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lne
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# set the mask to cover everything
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clr d0
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mov d0,(DCPGMR)
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# area purge & invalidate
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mov DCPGCR_DCP|DCPGCR_DCI,d0
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mov d0,(a0)
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# wait for busy bit of area purge & invalidate
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setlb
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mov (a0),d0
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btst DCPGCR_DCPGBSY,d0
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lne
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LOCAL_IRQ_RESTORE(d1)
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mn10300_local_dcache_flush_inv_end:
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ret [],0
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.size mn10300_local_dcache_flush_inv,.-mn10300_local_dcache_flush_inv
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###############################################################################
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#
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# void mn10300_local_dcache_flush_inv_page(unsigned long start)
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# void mn10300_local_dcache_flush_inv_range(unsigned long start, unsigned long end)
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# void mn10300_local_dcache_flush_inv_range2(unsigned long start, unsigned long size)
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# Flush and invalidate a range of addresses on a page in the dcache
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#
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###############################################################################
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ALIGN
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.globl mn10300_local_dcache_flush_inv_page
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.globl mn10300_local_dcache_flush_inv_range
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.globl mn10300_local_dcache_flush_inv_range2
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.type mn10300_local_dcache_flush_inv_page,@function
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.type mn10300_local_dcache_flush_inv_range,@function
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.type mn10300_local_dcache_flush_inv_range2,@function
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mn10300_local_dcache_flush_inv_page:
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and ~(PAGE_SIZE-1),d0
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mov PAGE_SIZE,d1
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mn10300_local_dcache_flush_inv_range2:
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add d0,d1
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mn10300_local_dcache_flush_inv_range:
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movm [d2,d3,a2],(sp)
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movhu (CHCTR),d2
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btst CHCTR_DCEN,d2
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beq mn10300_local_dcache_flush_inv_range_end
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# calculate alignsize
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#
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# alignsize = L1_CACHE_BYTES;
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# for (i = (end - start - 1) / L1_CACHE_BYTES; i > 0; i >>= 1)
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# alignsize <<= 1;
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# d2 = alignsize
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#
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mov L1_CACHE_BYTES,d2
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sub d0,d1,d3
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add -1,d3
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lsr L1_CACHE_SHIFT,d3
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beq 2f
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1:
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add d2,d2
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lsr 1,d3
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bne 1b
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2:
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mov d1,a1 # a1 = end
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LOCAL_CLI_SAVE(d3)
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mov DCPGCR,a0
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# wait for busy bit of area purge & invalidate
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setlb
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mov (a0),d1
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btst DCPGCR_DCPGBSY,d1
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lne
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# set the mask
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mov d2,d1
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add -1,d1
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not d1 # d1 = mask = ~(alignsize-1)
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mov d1,(DCPGMR)
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and d1,d0,a2 # a2 = mask & start
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dcpgivloop:
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# area purge & invalidate
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mov a2,d0
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or DCPGCR_DCP|DCPGCR_DCI,d0
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mov d0,(a0) # DCPGCR = (mask & start)|DCPGCR_DCP|DCPGCR_DCI
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# wait for busy bit of area purge & invalidate
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setlb
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mov (a0),d1
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btst DCPGCR_DCPGBSY,d1
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lne
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# check purge & invalidate of end address
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add d2,a2 # a2 += alignsize
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cmp a1,a2 # if (a2 < end) goto dcpgivloop
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bns dcpgivloop
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LOCAL_IRQ_RESTORE(d3)
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mn10300_local_dcache_flush_inv_range_end:
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ret [d2,d3,a2],12
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.size mn10300_local_dcache_flush_inv_page,.-mn10300_local_dcache_flush_inv_page
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.size mn10300_local_dcache_flush_inv_range,.-mn10300_local_dcache_flush_inv_range
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.size mn10300_local_dcache_flush_inv_range2,.-mn10300_local_dcache_flush_inv_range2
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