2005-10-28 12:53:37 +00:00
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# Makefile for xmon
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2009-06-09 20:48:51 +00:00
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subdir-ccflags-$(CONFIG_PPC_WERROR) := -Werror
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2009-08-09 19:02:51 +00:00
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GCOV_PROFILE := n
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2016-01-20 23:00:58 +00:00
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UBSAN_SANITIZE := n
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2009-08-09 19:02:51 +00:00
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2012-11-26 17:41:08 +00:00
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ccflags-$(CONFIG_PPC64) := $(NO_MINIMAL_TOC)
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2006-11-22 23:46:45 +00:00
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powerpc/xmon: Fix SPR read/write commands and add command to dump SPRs
xmon has commands for reading and writing SPRs, but they don't work
currently for several reasons. They attempt to synthesize a small
function containing an mfspr or mtspr instruction and call it. However,
the instructions are on the stack, which is usually not executable.
Also, for 64-bit we set up a procedure descriptor, which is fine for the
big-endian ABIv1, but not correct for ABIv2. Finally, the code uses the
infrastructure for catching memory errors, but that only catches data
storage interrupts and machine check interrupts, but a failed
mfspr/mtspr can generate a program interrupt or a hypervisor emulation
assist interrupt, or be a no-op.
Instead of trying to synthesize a function on the fly, this adds two new
functions, xmon_mfspr() and xmon_mtspr(), which take an SPR number as an
argument and read or write the SPR. Because there is no Power ISA
instruction which takes an SPR number in a register, we have to generate
one of each possible mfspr and mtspr instruction, for all 1024 possible
SPRs. Thus we get just over 8k bytes of code for each of xmon_mfspr()
and xmon_mtspr(). However, this 16kB of code pales in comparison to the
> 130kB of PPC opcode tables used by the xmon disassembler.
To catch interrupts caused by the mfspr/mtspr instructions, we add a new
'catch_spr_faults' flag. If an interrupt occurs while it is set, we come
back into xmon() via program_check_interrupt(), _exception() and die(),
see that catch_spr_faults is set and do a longjmp to bus_error_jmp, back
into read_spr() or write_spr().
This adds a couple of other nice features: first, a "Sa" command that
attempts to read and print out the value of all 1024 SPRs. If any mfspr
instruction acts as a no-op, then the SPR is not implemented and not
printed.
Secondly, the Sr and Sw commands detect when an SPR is not
implemented (i.e. mfspr is a no-op) and print a message to that effect
rather than printing a bogus value.
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2016-04-13 11:31:24 +00:00
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obj-y += xmon.o nonstdio.o spr_access.o
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2006-11-22 23:46:45 +00:00
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ifdef CONFIG_XMON_DISASSEMBLY
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obj-y += ppc-dis.o ppc-opc.o
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2006-11-27 18:18:55 +00:00
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obj-$(CONFIG_SPU_BASE) += spu-dis.o spu-opc.o
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2006-11-22 23:46:45 +00:00
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endif
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