2019-05-29 14:17:56 +00:00
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/* SPDX-License-Identifier: GPL-2.0-only */
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2016-06-29 19:05:33 +00:00
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/*
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* Copyright (c) 2016 Maxime Ripard. All rights reserved.
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*/
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#ifndef _CCU_NKMP_H_
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#define _CCU_NKMP_H_
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#include <linux/clk-provider.h>
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#include "ccu_common.h"
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#include "ccu_div.h"
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#include "ccu_mult.h"
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/*
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* struct ccu_nkmp - Definition of an N-K-M-P clock
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*
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* Clocks based on the formula parent * N * K >> P / M
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*/
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struct ccu_nkmp {
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u32 enable;
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u32 lock;
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2016-09-30 08:05:32 +00:00
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struct ccu_mult_internal n;
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struct ccu_mult_internal k;
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struct ccu_div_internal m;
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struct ccu_div_internal p;
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2016-06-29 19:05:33 +00:00
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2018-03-16 14:02:11 +00:00
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unsigned int fixed_post_div;
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2018-08-09 16:52:16 +00:00
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unsigned int max_rate;
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2018-03-16 14:02:11 +00:00
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2016-06-29 19:05:33 +00:00
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struct ccu_common common;
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};
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#define SUNXI_CCU_NKMP_WITH_GATE_LOCK(_struct, _name, _parent, _reg, \
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_nshift, _nwidth, \
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_kshift, _kwidth, \
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_mshift, _mwidth, \
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_pshift, _pwidth, \
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_gate, _lock, _flags) \
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struct ccu_nkmp _struct = { \
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.enable = _gate, \
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.lock = _lock, \
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.n = _SUNXI_CCU_MULT(_nshift, _nwidth), \
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.k = _SUNXI_CCU_MULT(_kshift, _kwidth), \
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.m = _SUNXI_CCU_DIV(_mshift, _mwidth), \
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.p = _SUNXI_CCU_DIV(_pshift, _pwidth), \
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.common = { \
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.reg = _reg, \
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.hw.init = CLK_HW_INIT(_name, \
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_parent, \
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&ccu_nkmp_ops, \
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_flags), \
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}, \
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}
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static inline struct ccu_nkmp *hw_to_ccu_nkmp(struct clk_hw *hw)
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{
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struct ccu_common *common = hw_to_ccu_common(hw);
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return container_of(common, struct ccu_nkmp, common);
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}
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extern const struct clk_ops ccu_nkmp_ops;
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#endif /* _CCU_NKMP_H_ */
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