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linux/drivers/clk/sunxi-ng/Makefile

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clk: sunxi-ng: Add common infrastructure Start our new clock infrastructure by adding the registration code, common structure and common code. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20160629190535.11855-3-maxime.ripard@free-electrons.com
2016-06-29 19:05:23 +00:00
# Common objects
obj-$(CONFIG_SUNXI_CCU) += ccu_common.o
obj-$(CONFIG_SUNXI_CCU) += ccu_reset.o
clk: sunxi-ng: Add fractional lib Some clocks can be switched to a mode called fractional that have two fixed output rate you can choose from. Add a small library to deal with those clocks. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20160629190535.11855-4-maxime.ripard@free-electrons.com
2016-06-29 19:05:24 +00:00
# Base clock types
clk: sunxi-ng: Add divider Add support for the various dividers (linear, table or pow-of-two based) found in the CCU. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20160629190535.11855-8-maxime.ripard@free-electrons.com
2016-06-29 19:05:28 +00:00
obj-$(CONFIG_SUNXI_CCU_DIV) += ccu_div.o
clk: sunxi-ng: Add fractional lib Some clocks can be switched to a mode called fractional that have two fixed output rate you can choose from. Add a small library to deal with those clocks. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20160629190535.11855-4-maxime.ripard@free-electrons.com
2016-06-29 19:05:24 +00:00
obj-$(CONFIG_SUNXI_CCU_FRAC) += ccu_frac.o
clk: sunxi-ng: Add gate clock support Some clocks in the Allwinner SoCs clocks unit are just simple gates. Add support for those clocks. Since it's a feature that can also be found in more complex clocks, provide a bunch of helpers that can be reused later on. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20160629190535.11855-5-maxime.ripard@free-electrons.com
2016-06-29 19:05:25 +00:00
obj-$(CONFIG_SUNXI_CCU_GATE) += ccu_gate.o
clk: sunxi-ng: Add mux clock support Some clocks in the Allwinner SoCs clocks unit are just muxes. However, those muxes might also be found in some other complicated clocks that would benefit from the code in there to deal with "advanced" features, like pre-dividers. Introduce a set of helpers to reduce the code duplication in such cases. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20160629190535.11855-6-maxime.ripard@free-electrons.com
2016-06-29 19:05:26 +00:00
obj-$(CONFIG_SUNXI_CCU_MUX) += ccu_mux.o
clk: sunxi-ng: Add N-class clocks support Add support for the class with a single factor, N, being a multiplier. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
2016-08-30 08:38:07 +00:00
obj-$(CONFIG_SUNXI_CCU_MULT) += ccu_mult.o
clk: sunxi-ng: Add phase clock support Add support for the clocks in the CCU that introduce a phase shift from their parent clock. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20160629190535.11855-7-maxime.ripard@free-electrons.com
2016-06-29 19:05:27 +00:00
obj-$(CONFIG_SUNXI_CCU_PHASE) += ccu_phase.o
clk: sunxi-ng: Add M-P factor clock support Introduce support for the clocks that combine a linear divider and a power-of-two based one. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20160629190535.11855-9-maxime.ripard@free-electrons.com
2016-06-29 19:05:29 +00:00
# Multi-factor clocks
clk: sunxi-ng: Add N-K-factor clock support Introduce support for clocks that use a combination of two linear multipliers. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20160629190535.11855-10-maxime.ripard@free-electrons.com
2016-06-29 19:05:30 +00:00
obj-$(CONFIG_SUNXI_CCU_NK) += ccu_nk.o
clk: sunxi-ng: Add N-K-M Factor clock Introduce support for clocks that multiply and divide using two linear multipliers and one linear divider. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20160629190535.11855-12-maxime.ripard@free-electrons.com
2016-06-29 19:05:32 +00:00
obj-$(CONFIG_SUNXI_CCU_NKM) += ccu_nkm.o
clk: sunxi-ng: Add N-K-M-P factor clock Introduce support for clocks that use a combination of two linear multipliers (N and K factors), one linear divider (M) and one power of two divider (P). Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20160629190535.11855-13-maxime.ripard@free-electrons.com
2016-06-29 19:05:33 +00:00
obj-$(CONFIG_SUNXI_CCU_NKMP) += ccu_nkmp.o
clk: sunxi-ng: Add N-M-factor clock support Introduce support for clocks that multiply and divide using linear factors. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20160629190535.11855-11-maxime.ripard@free-electrons.com
2016-06-29 19:05:31 +00:00
obj-$(CONFIG_SUNXI_CCU_NM) += ccu_nm.o
clk: sunxi-ng: Add M-P factor clock support Introduce support for the clocks that combine a linear divider and a power-of-two based one. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20160629190535.11855-9-maxime.ripard@free-electrons.com
2016-06-29 19:05:29 +00:00
obj-$(CONFIG_SUNXI_CCU_MP) += ccu_mp.o
clk: sunxi-ng: Add H3 clocks Add the list of clocks and resets found in the H3 CCU. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20160629190535.11855-14-maxime.ripard@free-electrons.com
2016-06-29 19:05:34 +00:00
# SoC support
clk: sunxi-ng: Add A64 clocks Add the A64 CCU clocks set. Acked-by: Rob Herring <robh@kernel.org> Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-07-06 06:31:34 +00:00
obj-$(CONFIG_SUN50I_A64_CCU) += ccu-sun50i-a64.o
clk: sunxi-ng: Add sun5i CCU driver The Allwinner A10s, A13, R8 and NextThing GR8 are all based on the same silicon, and all share the same clocks. However, they're not packaged in the same way, and therefore not all the controllers are actually available on all these SoCs. Introduce a clock controller driver for all these SoCs with different compatibles to take that into account. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-10-04 08:09:58 +00:00
obj-$(CONFIG_SUN5I_CCU) += ccu-sun5i.o
clk: sunxi-ng: Add A31/A31s clocks Add a new style driver for the clock control unit in Allwinner A31/A31s. A few clocks are still missing: - MIPI PLL's HDMI mode support - EMAC clock Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-08-25 06:21:59 +00:00
obj-$(CONFIG_SUN6I_A31_CCU) += ccu-sun6i-a31.o
clk: sunxi-ng: Add A23 CCU Add support for the clock unit found in the A23. Due to the similarities with the A33, it also shares its clock IDs to allow sharing the DTSI. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
2016-08-31 14:55:00 +00:00
obj-$(CONFIG_SUN8I_A23_CCU) += ccu-sun8i-a23.o
clk: sunxi-ng: Add A33 CCU support This commit introduces the clocks found in the Allwinner A33 CCU. Since this SoC is very similar to the A23, and we share a significant share of the DTSI, the clock IDs that are going to be used will also be shared with the A23, hence the name of the various header files. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
2016-08-24 12:10:15 +00:00
obj-$(CONFIG_SUN8I_A33_CCU) += ccu-sun8i-a33.o
clk: sunxi-ng: Add H3 clocks Add the list of clocks and resets found in the H3 CCU. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20160629190535.11855-14-maxime.ripard@free-electrons.com
2016-06-29 19:05:34 +00:00
obj-$(CONFIG_SUN8I_H3_CCU) += ccu-sun8i-h3.o
clk: sunxi-ng: add support for V3s CCU V3s has a similar but cut-down CCU to H3. Some muxes, especially clocks about CSI, are different, which makes it to need a new CCU driver. Add such a new driver for it. Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-01-19 17:54:45 +00:00
obj-$(CONFIG_SUN8I_V3S_CCU) += ccu-sun8i-v3s.o
clk: sunxi-ng: add support for PRCM CCUs SoCs after A31 has a clock controller module in the PRCM part. Support the clock controller module on H3/5 and A64 now. Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-04-04 09:50:57 +00:00
obj-$(CONFIG_SUN8I_R_CCU) += ccu-sun8i-r.o
clk: sunxi-ng: Add A80 CCU Add support for the main clock unit found in the A80. Some clocks were not documented in the released user manual, but were found in the official kernel from Allwinner. These include controls for the I2S, SPDIF, SATA, and eDP blocks. Note that on the A80, some subsystems have separate clock controllers downstream of the main clock unit. These include the MMC, USB, and display engine subsystems. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-01-28 12:22:34 +00:00
obj-$(CONFIG_SUN9I_A80_CCU) += ccu-sun9i-a80.o
clk: sunxi-ng: Add A80 Display Engine CCU With the A80 SoC, Allwinner grouped and moved some subsystem specific clock controls to a separate address space, and possibly separate hardware block. One such subsystem is the display engine. The main clock control unit now only has 1 set of bus gate, dram gate, module clock, and reset control for the entire display subsystem. These feed into a secondary clock control unit, which has controls for each individual module of the display pipeline. This block is not documented in the user manual. Allwinner's kernel was used as the reference. Add support for the display engine clock controls found on the A80. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-01-28 12:22:36 +00:00
obj-$(CONFIG_SUN9I_A80_CCU) += ccu-sun9i-a80-de.o
clk: sunxi-ng: Add A80 USB CCU Add support for the USB clock controls found on the A80. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-01-28 12:22:35 +00:00
obj-$(CONFIG_SUN9I_A80_CCU) += ccu-sun9i-a80-usb.o
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