2012-12-15 22:50:44 +00:00
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/*
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* SuperH Pin Function Controller support.
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*
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* Copyright (C) 2012 Renesas Solutions Corp.
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#ifndef __SH_PFC_CORE_H__
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#define __SH_PFC_CORE_H__
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#include <linux/compiler.h>
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2013-04-09 14:06:01 +00:00
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#include <linux/spinlock.h>
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2012-12-15 22:50:44 +00:00
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#include <linux/types.h>
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2012-12-15 22:51:55 +00:00
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#include "sh_pfc.h"
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2012-12-15 22:50:53 +00:00
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struct sh_pfc_window {
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2012-12-15 22:50:44 +00:00
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phys_addr_t phys;
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void __iomem *virt;
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unsigned long size;
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};
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2012-12-15 22:50:46 +00:00
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struct sh_pfc_chip;
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2012-12-15 22:50:47 +00:00
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struct sh_pfc_pinctrl;
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2012-12-15 22:50:46 +00:00
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2013-07-15 16:38:30 +00:00
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struct sh_pfc_pin_range {
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u16 start;
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u16 end;
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};
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2012-12-15 22:50:44 +00:00
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struct sh_pfc {
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2012-12-15 22:50:47 +00:00
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struct device *dev;
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2013-02-16 17:47:05 +00:00
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const struct sh_pfc_soc_info *info;
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2012-12-15 22:50:44 +00:00
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spinlock_t lock;
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2012-12-15 22:50:55 +00:00
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unsigned int num_windows;
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2013-12-11 03:26:25 +00:00
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struct sh_pfc_window *windows;
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2013-12-11 03:26:26 +00:00
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unsigned int num_irqs;
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unsigned int *irqs;
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2012-12-15 22:50:55 +00:00
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2013-07-15 16:38:30 +00:00
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struct sh_pfc_pin_range *ranges;
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unsigned int nr_ranges;
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2013-07-15 11:48:56 +00:00
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unsigned int nr_gpio_pins;
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2013-02-15 00:33:38 +00:00
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2012-12-15 22:50:46 +00:00
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struct sh_pfc_chip *gpio;
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2015-08-04 13:55:19 +00:00
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#ifdef CONFIG_SUPERH
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2012-12-06 13:49:25 +00:00
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struct sh_pfc_chip *func;
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2015-08-04 13:55:19 +00:00
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#endif
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2012-12-06 13:49:25 +00:00
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2012-12-15 22:50:47 +00:00
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struct sh_pfc_pinctrl *pinctrl;
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2012-12-15 22:50:44 +00:00
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};
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int sh_pfc_register_gpiochip(struct sh_pfc *pfc);
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2012-12-15 22:50:46 +00:00
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int sh_pfc_unregister_gpiochip(struct sh_pfc *pfc);
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2012-12-15 22:50:44 +00:00
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int sh_pfc_register_pinctrl(struct sh_pfc *pfc);
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2012-12-15 22:50:47 +00:00
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int sh_pfc_unregister_pinctrl(struct sh_pfc *pfc);
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2012-12-15 22:50:44 +00:00
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2015-03-12 10:09:14 +00:00
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u32 sh_pfc_read_raw_reg(void __iomem *mapped_reg, unsigned int reg_width);
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void sh_pfc_write_raw_reg(void __iomem *mapped_reg, unsigned int reg_width,
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2015-02-27 17:38:04 +00:00
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u32 data);
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2013-02-15 01:04:55 +00:00
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2013-03-08 16:43:54 +00:00
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int sh_pfc_get_pin_index(struct sh_pfc *pfc, unsigned int pin);
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2013-03-10 14:29:14 +00:00
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int sh_pfc_config_mux(struct sh_pfc *pfc, unsigned mark, int pinmux_type);
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2012-12-15 22:50:44 +00:00
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2015-01-25 13:49:52 +00:00
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extern const struct sh_pfc_soc_info emev2_pinmux_info;
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2013-03-26 13:49:49 +00:00
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extern const struct sh_pfc_soc_info r8a73a4_pinmux_info;
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2013-02-16 17:47:05 +00:00
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extern const struct sh_pfc_soc_info r8a7740_pinmux_info;
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2013-04-12 05:37:20 +00:00
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extern const struct sh_pfc_soc_info r8a7778_pinmux_info;
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2013-02-16 17:47:05 +00:00
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extern const struct sh_pfc_soc_info r8a7779_pinmux_info;
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2013-04-08 02:08:53 +00:00
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extern const struct sh_pfc_soc_info r8a7790_pinmux_info;
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2013-10-16 21:46:05 +00:00
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extern const struct sh_pfc_soc_info r8a7791_pinmux_info;
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2015-05-12 09:13:19 +00:00
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extern const struct sh_pfc_soc_info r8a7793_pinmux_info;
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pinctrl: sh-pfc: add R8A7794 PFC support
Add PFC support for the R8A7794 SoC including pin groups for some
on-chip devices such as ETH, I2C, INTC, MSIOF, QSPI, [H]SCIF...
Sergei: squashed together several patches, fixed the MLB_CLK typo,
added IRQ4.. IRQ9 pin groups, fixed IRQn comments, added ETH B pin
group names, removed stray new line and fixed typos in the comments
in the pinmux_config_regs[] initializer, removed the platform device
ID, took into account limited number of signals in the GPIO1/5/6
controllers, added reasonable and removed unreasonable
copyrights, modified the bindings document, renamed, added changelog.
Changes in version 5:
- resolved rejects, refreshed the patch;
- added Laurent Pinchart's ACK.
Changes in version 4:
- reused the PORT_GP_26() macro to #define PORT_GP_28().
Changes in version 3:
- removed the platform device ID;
- added PORT_GP_26() and PORT_GP_28() macros, used them for GPIO1/5/6 in the
CPU_ALL_PORT() macro.
Changes in version 2:
- rebased the patch.
Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-06-05 22:34:48 +00:00
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extern const struct sh_pfc_soc_info r8a7794_pinmux_info;
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2015-09-03 02:51:49 +00:00
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extern const struct sh_pfc_soc_info r8a7795_pinmux_info;
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2013-02-16 17:47:05 +00:00
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extern const struct sh_pfc_soc_info sh7203_pinmux_info;
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extern const struct sh_pfc_soc_info sh7264_pinmux_info;
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extern const struct sh_pfc_soc_info sh7269_pinmux_info;
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extern const struct sh_pfc_soc_info sh73a0_pinmux_info;
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extern const struct sh_pfc_soc_info sh7720_pinmux_info;
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extern const struct sh_pfc_soc_info sh7722_pinmux_info;
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extern const struct sh_pfc_soc_info sh7723_pinmux_info;
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extern const struct sh_pfc_soc_info sh7724_pinmux_info;
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extern const struct sh_pfc_soc_info sh7734_pinmux_info;
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extern const struct sh_pfc_soc_info sh7757_pinmux_info;
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extern const struct sh_pfc_soc_info sh7785_pinmux_info;
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extern const struct sh_pfc_soc_info sh7786_pinmux_info;
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extern const struct sh_pfc_soc_info shx3_pinmux_info;
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2012-12-15 22:51:21 +00:00
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2012-12-15 22:50:44 +00:00
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#endif /* __SH_PFC_CORE_H__ */
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