2020-05-21 09:13:52 +00:00
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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# Copyright 2019,2020 Lubomir Rintel <lkundrak@v3.sk>
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/media/marvell,mmp2-ccic.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Marvell MMP2 camera host interface bindings
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maintainers:
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- Lubomir Rintel <lkundrak@v3.sk>
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properties:
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$nodename:
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pattern: '^camera@[a-f0-9]+$'
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compatible:
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const: marvell,mmp2-ccic
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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2021-01-21 03:41:20 +00:00
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power-domains:
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maxItems: 1
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2020-05-21 09:13:52 +00:00
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port:
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2021-01-04 16:58:08 +00:00
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$ref: /schemas/graph.yaml#/$defs/port-base
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2020-05-21 09:13:52 +00:00
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additionalProperties: false
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properties:
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endpoint:
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2021-01-04 16:58:08 +00:00
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$ref: video-interfaces.yaml#
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unevaluatedProperties: false
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2020-05-21 09:13:52 +00:00
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properties:
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hsync-active: true
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vsync-active: true
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pclk-sample: true
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bus-type: true
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clocks:
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minItems: 1
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items:
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- description: AXI bus interface clock
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- description: Peripheral clock
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- description: Parallel video bus interface clock
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clock-names:
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const: axi
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'#clock-cells':
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const: 0
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clock-output-names:
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const: mclk
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required:
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- compatible
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- reg
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- interrupts
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- port
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/marvell,mmp2.h>
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2021-01-21 03:41:20 +00:00
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#include <dt-bindings/power/marvell,mmp2.h>
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2020-05-21 09:13:52 +00:00
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camera@d420a000 {
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compatible = "marvell,mmp2-ccic";
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reg = <0xd420a000 0x800>;
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interrupts = <42>;
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clocks = <&soc_clocks MMP2_CLK_CCIC0>;
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clock-names = "axi";
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#clock-cells = <0>;
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clock-output-names = "mclk";
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2021-01-21 03:41:20 +00:00
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power-domains = <&soc_clocks MMP3_POWER_DOMAIN_CAMERA>;
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2020-05-21 09:13:52 +00:00
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port {
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camera0_0: endpoint {
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remote-endpoint = <&ov7670_0>;
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bus-type = <5>; /* Parallel */
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hsync-active = <1>; /* Active high */
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vsync-active = <1>; /* Active high */
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pclk-sample = <0>; /* Falling */
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};
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};
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};
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...
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