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46 lines
1.4 KiB
Plaintext
46 lines
1.4 KiB
Plaintext
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HiSilicon STB xHCI
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The device node for HiSilicon STB xHCI host controller
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Required properties:
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- compatible: should be "hisilicon,hi3798cv200-xhci"
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- reg: specifies physical base address and size of the registers
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- interrupts : interrupt used by the controller
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- clocks: a list of phandle + clock-specifier pairs, one for each
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entry in clock-names
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- clock-names: must contain
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"bus": for bus clock
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"utmi": for utmi clock
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"pipe": for pipe clock
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"suspend": for suspend clock
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- resets: a list of phandle and reset specifier pairs as listed in
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reset-names property.
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- reset-names: must contain
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"soft": for soft reset
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- phys: a list of phandle + phy specifier pairs
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- phy-names: must contain at least one of following:
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"inno": for inno phy
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"combo": for combo phy
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Optional properties:
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- usb2-lpm-disable: indicate if we don't want to enable USB2 HW LPM
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- usb3-lpm-capable: determines if platform is USB3 LPM capable
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- imod-interval-ns: default interrupt moderation interval is 40000ns
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Example:
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xhci0: xchi@f98a0000 {
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compatible = "hisilicon,hi3798cv200-xhci";
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reg = <0xf98a0000 0x10000>;
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interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&crg HISTB_USB3_BUS_CLK>,
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<&crg HISTB_USB3_UTMI_CLK>,
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<&crg HISTB_USB3_PIPE_CLK>,
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<&crg HISTB_USB3_SUSPEND_CLK>;
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clock-names = "bus", "utmi", "pipe", "suspend";
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resets = <&crg 0xb0 12>;
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reset-names = "soft";
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phys = <&usb2_phy1_port1 0>, <&combphy0 PHY_TYPE_USB3>;
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phy-names = "inno", "combo";
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};
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