2012-03-02 23:07:21 +00:00
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/*
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* Copyright 2012 Linaro Ltd
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*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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/include/ "skeleton.dtsi"
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/ {
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soc-u9500 {
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#address-cells = <1>;
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#size-cells = <1>;
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2012-03-15 16:46:17 +00:00
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compatible = "stericsson,db8500";
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2012-03-07 17:22:30 +00:00
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interrupt-parent = <&intc>;
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2012-03-02 23:07:21 +00:00
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ranges;
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2012-03-15 16:46:17 +00:00
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2012-03-07 17:22:30 +00:00
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intc: interrupt-controller@a0411000 {
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compatible = "arm,cortex-a9-gic";
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#interrupt-cells = <3>;
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#address-cells = <1>;
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interrupt-controller;
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reg = <0xa0411000 0x1000>,
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<0xa0410100 0x100>;
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};
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2012-03-08 09:02:02 +00:00
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L2: l2-cache {
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compatible = "arm,pl310-cache";
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reg = <0xa0412000 0x1000>;
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interrupts = <0 13 4>;
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cache-unified;
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cache-level = <2>;
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};
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2012-03-15 16:46:17 +00:00
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pmu {
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compatible = "arm,cortex-a9-pmu";
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interrupts = <0 7 0x4>;
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};
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2012-03-16 09:53:24 +00:00
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timer@a0410600 {
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compatible = "arm,cortex-a9-twd-timer";
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reg = <0xa0410600 0x20>;
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interrupts = <1 13 0x304>;
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};
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2012-03-15 16:46:17 +00:00
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rtc@80154000 {
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compatible = "stericsson,db8500-rtc";
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reg = <0x80154000 0x1000>;
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interrupts = <0 18 0x4>;
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};
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gpio0: gpio@8012e000 {
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compatible = "stericsson,db8500-gpio",
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2012-04-13 14:05:03 +00:00
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"st,nomadik-gpio";
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2012-03-15 16:46:17 +00:00
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reg = <0x8012e000 0x80>;
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interrupts = <0 119 0x4>;
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2012-05-29 06:17:36 +00:00
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interrupt-controller;
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#interrupt-cells = <2>;
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2012-03-15 16:46:17 +00:00
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supports-sleepmode;
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gpio-controller;
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2012-04-13 14:05:05 +00:00
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#gpio-cells = <2>;
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gpio-bank = <0>;
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2012-03-15 16:46:17 +00:00
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};
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gpio1: gpio@8012e080 {
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compatible = "stericsson,db8500-gpio",
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2012-04-13 14:05:03 +00:00
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"st,nomadik-gpio";
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2012-03-15 16:46:17 +00:00
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reg = <0x8012e080 0x80>;
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interrupts = <0 120 0x4>;
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2012-05-29 06:17:36 +00:00
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interrupt-controller;
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#interrupt-cells = <2>;
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2012-03-15 16:46:17 +00:00
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supports-sleepmode;
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gpio-controller;
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2012-04-13 14:05:05 +00:00
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#gpio-cells = <2>;
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gpio-bank = <1>;
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2012-03-15 16:46:17 +00:00
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};
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gpio2: gpio@8000e000 {
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compatible = "stericsson,db8500-gpio",
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2012-04-13 14:05:03 +00:00
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"st,nomadik-gpio";
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2012-03-15 16:46:17 +00:00
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reg = <0x8000e000 0x80>;
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interrupts = <0 121 0x4>;
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2012-05-29 06:17:36 +00:00
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interrupt-controller;
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#interrupt-cells = <2>;
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2012-03-15 16:46:17 +00:00
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supports-sleepmode;
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gpio-controller;
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2012-04-13 14:05:05 +00:00
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#gpio-cells = <2>;
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gpio-bank = <2>;
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2012-03-15 16:46:17 +00:00
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};
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gpio3: gpio@8000e080 {
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compatible = "stericsson,db8500-gpio",
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2012-04-13 14:05:03 +00:00
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"st,nomadik-gpio";
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2012-03-15 16:46:17 +00:00
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reg = <0x8000e080 0x80>;
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interrupts = <0 122 0x4>;
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2012-05-29 06:17:36 +00:00
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interrupt-controller;
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#interrupt-cells = <2>;
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2012-03-15 16:46:17 +00:00
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supports-sleepmode;
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gpio-controller;
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2012-04-13 14:05:05 +00:00
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#gpio-cells = <2>;
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gpio-bank = <3>;
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2012-03-15 16:46:17 +00:00
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};
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gpio4: gpio@8000e100 {
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compatible = "stericsson,db8500-gpio",
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2012-04-13 14:05:03 +00:00
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"st,nomadik-gpio";
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2012-03-15 16:46:17 +00:00
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reg = <0x8000e100 0x80>;
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interrupts = <0 123 0x4>;
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2012-05-29 06:17:36 +00:00
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interrupt-controller;
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#interrupt-cells = <2>;
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2012-03-15 16:46:17 +00:00
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supports-sleepmode;
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gpio-controller;
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2012-04-13 14:05:05 +00:00
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#gpio-cells = <2>;
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gpio-bank = <4>;
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2012-03-15 16:46:17 +00:00
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};
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gpio5: gpio@8000e180 {
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compatible = "stericsson,db8500-gpio",
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2012-04-13 14:05:03 +00:00
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"st,nomadik-gpio";
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2012-03-15 16:46:17 +00:00
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reg = <0x8000e180 0x80>;
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interrupts = <0 124 0x4>;
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2012-05-29 06:17:36 +00:00
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interrupt-controller;
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#interrupt-cells = <2>;
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2012-03-15 16:46:17 +00:00
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supports-sleepmode;
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gpio-controller;
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2012-04-13 14:05:05 +00:00
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#gpio-cells = <2>;
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gpio-bank = <5>;
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2012-03-15 16:46:17 +00:00
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};
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gpio6: gpio@8011e000 {
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compatible = "stericsson,db8500-gpio",
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2012-04-13 14:05:03 +00:00
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"st,nomadik-gpio";
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2012-03-15 16:46:17 +00:00
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reg = <0x8011e000 0x80>;
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interrupts = <0 125 0x4>;
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2012-05-29 06:17:36 +00:00
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interrupt-controller;
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#interrupt-cells = <2>;
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2012-03-15 16:46:17 +00:00
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supports-sleepmode;
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gpio-controller;
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2012-04-13 14:05:05 +00:00
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#gpio-cells = <2>;
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gpio-bank = <6>;
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2012-03-15 16:46:17 +00:00
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};
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gpio7: gpio@8011e080 {
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compatible = "stericsson,db8500-gpio",
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2012-04-13 14:05:03 +00:00
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"st,nomadik-gpio";
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2012-03-15 16:46:17 +00:00
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reg = <0x8011e080 0x80>;
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interrupts = <0 126 0x4>;
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2012-05-29 06:17:36 +00:00
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interrupt-controller;
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#interrupt-cells = <2>;
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2012-03-15 16:46:17 +00:00
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supports-sleepmode;
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gpio-controller;
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2012-04-13 14:05:05 +00:00
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#gpio-cells = <2>;
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gpio-bank = <7>;
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2012-03-15 16:46:17 +00:00
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};
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gpio8: gpio@a03fe000 {
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compatible = "stericsson,db8500-gpio",
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2012-04-13 14:05:03 +00:00
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"st,nomadik-gpio";
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2012-03-15 16:46:17 +00:00
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reg = <0xa03fe000 0x80>;
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interrupts = <0 127 0x4>;
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2012-05-29 06:17:36 +00:00
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interrupt-controller;
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#interrupt-cells = <2>;
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2012-03-15 16:46:17 +00:00
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supports-sleepmode;
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gpio-controller;
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2012-04-13 14:05:05 +00:00
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#gpio-cells = <2>;
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gpio-bank = <8>;
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2012-03-15 16:46:17 +00:00
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};
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usb@a03e0000 {
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compatible = "stericsson,db8500-musb",
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"mentor,musb";
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reg = <0xa03e0000 0x10000>;
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interrupts = <0 23 0x4>;
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};
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dma-controller@801C0000 {
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compatible = "stericsson,db8500-dma40",
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"stericsson,dma40";
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reg = <0x801C0000 0x1000 0x40010000 0x800>;
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interrupts = <0 25 0x4>;
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};
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prcmu@80157000 {
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compatible = "stericsson,db8500-prcmu";
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reg = <0x80157000 0x1000>;
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2012-05-28 08:50:49 +00:00
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interrupts = <0 47 0x4>;
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2012-03-15 16:46:17 +00:00
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#address-cells = <1>;
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2012-04-24 09:00:15 +00:00
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#size-cells = <1>;
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ranges;
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2012-05-28 08:50:49 +00:00
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prcmu-timer-4@80157450 {
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2012-04-24 09:00:15 +00:00
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compatible = "stericsson,db8500-prcmu-timer-4";
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reg = <0x80157450 0xC>;
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};
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2012-03-15 16:46:17 +00:00
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2012-05-04 12:32:34 +00:00
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db8500-prcmu-regulators {
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compatible = "stericsson,db8500-prcmu-regulator";
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// DB8500_REGULATOR_VAPE
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db8500_vape_reg: db8500_vape {
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regulator-name = "db8500-vape";
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regulator-always-on;
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};
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// DB8500_REGULATOR_VARM
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db8500_varm_reg: db8500_varm {
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regulator-name = "db8500-varm";
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};
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// DB8500_REGULATOR_VMODEM
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db8500_vmodem_reg: db8500_vmodem {
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regulator-name = "db8500-vmodem";
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};
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// DB8500_REGULATOR_VPLL
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db8500_vpll_reg: db8500_vpll {
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regulator-name = "db8500-vpll";
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};
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// DB8500_REGULATOR_VSMPS1
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db8500_vsmps1_reg: db8500_vsmps1 {
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regulator-name = "db8500-vsmps1";
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};
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// DB8500_REGULATOR_VSMPS2
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db8500_vsmps2_reg: db8500_vsmps2 {
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regulator-name = "db8500-vsmps2";
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};
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// DB8500_REGULATOR_VSMPS3
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db8500_vsmps3_reg: db8500_vsmps3 {
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regulator-name = "db8500-vsmps3";
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};
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// DB8500_REGULATOR_VRF1
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db8500_vrf1_reg: db8500_vrf1 {
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regulator-name = "db8500-vrf1";
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};
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// DB8500_REGULATOR_SWITCH_SVAMMDSP
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db8500_sva_mmdsp_reg: db8500_sva_mmdsp {
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regulator-name = "db8500-sva-mmdsp";
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};
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// DB8500_REGULATOR_SWITCH_SVAMMDSPRET
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db8500_sva_mmdsp_ret_reg: db8500_sva_mmdsp_ret {
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regulator-name = "db8500-sva-mmdsp-ret";
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};
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// DB8500_REGULATOR_SWITCH_SVAPIPE
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db8500_sva_pipe_reg: db8500_sva_pipe {
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regulator-name = "db8500_sva_pipe";
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};
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// DB8500_REGULATOR_SWITCH_SIAMMDSP
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db8500_sia_mmdsp_reg: db8500_sia_mmdsp {
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regulator-name = "db8500_sia_mmdsp";
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};
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// DB8500_REGULATOR_SWITCH_SIAMMDSPRET
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db8500_sia_mmdsp_ret_reg: db8500_sia_mmdsp_ret {
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regulator-name = "db8500-sia-mmdsp-ret";
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};
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// DB8500_REGULATOR_SWITCH_SIAPIPE
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db8500_sia_pipe_reg: db8500_sia_pipe {
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regulator-name = "db8500-sia-pipe";
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};
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// DB8500_REGULATOR_SWITCH_SGA
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db8500_sga_reg: db8500_sga {
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regulator-name = "db8500-sga";
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vin-supply = <&db8500_vape_reg>;
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};
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// DB8500_REGULATOR_SWITCH_B2R2_MCDE
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db8500_b2r2_mcde_reg: db8500_b2r2_mcde {
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regulator-name = "db8500-b2r2-mcde";
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vin-supply = <&db8500_vape_reg>;
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};
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// DB8500_REGULATOR_SWITCH_ESRAM12
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db8500_esram12_reg: db8500_esram12 {
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regulator-name = "db8500-esram12";
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};
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// DB8500_REGULATOR_SWITCH_ESRAM12RET
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db8500_esram12_ret_reg: db8500_esram12_ret {
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regulator-name = "db8500-esram12-ret";
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};
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// DB8500_REGULATOR_SWITCH_ESRAM34
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db8500_esram34_reg: db8500_esram34 {
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regulator-name = "db8500-esram34";
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};
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// DB8500_REGULATOR_SWITCH_ESRAM34RET
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db8500_esram34_ret_reg: db8500_esram34_ret {
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regulator-name = "db8500-esram34-ret";
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};
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};
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2012-03-15 16:46:17 +00:00
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ab8500@5 {
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compatible = "stericsson,ab8500";
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reg = <5>; /* mailbox 5 is i2c */
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interrupts = <0 40 0x4>;
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2012-05-29 06:29:53 +00:00
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ab8500-regulators {
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compatible = "stericsson,ab8500-regulator";
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// supplies to the display/camera
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ab8500_ldo_aux1_reg: ab8500_ldo_aux1 {
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regulator-name = "V-DISPLAY";
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regulator-min-microvolt = <2500000>;
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regulator-max-microvolt = <2900000>;
|
|
|
|
regulator-boot-on;
|
|
|
|
/* BUG: If turned off MMC will be affected. */
|
|
|
|
regulator-always-on;
|
|
|
|
};
|
|
|
|
|
|
|
|
// supplies to the on-board eMMC
|
|
|
|
ab8500_ldo_aux2_reg: ab8500_ldo_aux2 {
|
|
|
|
regulator-name = "V-eMMC1";
|
|
|
|
regulator-min-microvolt = <1100000>;
|
|
|
|
regulator-max-microvolt = <3300000>;
|
|
|
|
};
|
|
|
|
|
|
|
|
// supply for VAUX3; SDcard slots
|
|
|
|
ab8500_ldo_aux3_reg: ab8500_ldo_aux3 {
|
|
|
|
regulator-name = "V-MMC-SD";
|
|
|
|
regulator-min-microvolt = <1100000>;
|
|
|
|
regulator-max-microvolt = <3300000>;
|
|
|
|
};
|
|
|
|
|
|
|
|
// supply for v-intcore12; VINTCORE12 LDO
|
|
|
|
ab8500_ldo_initcore_reg: ab8500_ldo_initcore {
|
|
|
|
regulator-name = "V-INTCORE";
|
|
|
|
};
|
|
|
|
|
|
|
|
// supply for tvout; gpadc; TVOUT LDO
|
|
|
|
ab8500_ldo_tvout_reg: ab8500_ldo_tvout {
|
|
|
|
regulator-name = "V-TVOUT";
|
|
|
|
};
|
|
|
|
|
|
|
|
// supply for ab8500-usb; USB LDO
|
|
|
|
ab8500_ldo_usb_reg: ab8500_ldo_usb {
|
|
|
|
regulator-name = "dummy";
|
|
|
|
};
|
|
|
|
|
|
|
|
// supply for ab8500-vaudio; VAUDIO LDO
|
|
|
|
ab8500_ldo_audio_reg: ab8500_ldo_audio {
|
|
|
|
regulator-name = "V-AUD";
|
|
|
|
};
|
|
|
|
|
|
|
|
// supply for v-anamic1 VAMic1-LDO
|
|
|
|
ab8500_ldo_anamic1_reg: ab8500_ldo_anamic1 {
|
|
|
|
regulator-name = "V-AMIC1";
|
|
|
|
};
|
|
|
|
|
|
|
|
// supply for v-amic2; VAMIC2 LDO; reuse constants for AMIC1
|
|
|
|
ab8500_ldo_amamic2_reg: ab8500_ldo_amamic2 {
|
|
|
|
regulator-name = "V-AMIC2";
|
|
|
|
};
|
|
|
|
|
|
|
|
// supply for v-dmic; VDMIC LDO
|
|
|
|
ab8500_ldo_dmic_reg: ab8500_ldo_dmic {
|
|
|
|
regulator-name = "V-DMIC";
|
|
|
|
};
|
|
|
|
|
|
|
|
// supply for U8500 CSI/DSI; VANA LDO
|
|
|
|
ab8500_ldo_ana_reg: ab8500_ldo_ana {
|
|
|
|
regulator-name = "V-CSI/DSI";
|
|
|
|
};
|
|
|
|
};
|
2012-03-15 16:46:17 +00:00
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
i2c@80004000 {
|
2012-04-13 14:05:04 +00:00
|
|
|
compatible = "stericsson,db8500-i2c", "st,nomadik-i2c";
|
2012-03-15 16:46:17 +00:00
|
|
|
reg = <0x80004000 0x1000>;
|
|
|
|
interrupts = <0 21 0x4>;
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
};
|
|
|
|
|
|
|
|
i2c@80122000 {
|
2012-04-13 14:05:04 +00:00
|
|
|
compatible = "stericsson,db8500-i2c", "st,nomadik-i2c";
|
2012-03-15 16:46:17 +00:00
|
|
|
reg = <0x80122000 0x1000>;
|
|
|
|
interrupts = <0 22 0x4>;
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
};
|
|
|
|
|
|
|
|
i2c@80128000 {
|
2012-04-13 14:05:04 +00:00
|
|
|
compatible = "stericsson,db8500-i2c", "st,nomadik-i2c";
|
2012-03-15 16:46:17 +00:00
|
|
|
reg = <0x80128000 0x1000>;
|
|
|
|
interrupts = <0 55 0x4>;
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
};
|
|
|
|
|
|
|
|
i2c@80110000 {
|
2012-04-13 14:05:04 +00:00
|
|
|
compatible = "stericsson,db8500-i2c", "st,nomadik-i2c";
|
2012-03-15 16:46:17 +00:00
|
|
|
reg = <0x80110000 0x1000>;
|
|
|
|
interrupts = <0 12 0x4>;
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
};
|
|
|
|
|
|
|
|
i2c@8012a000 {
|
2012-04-13 14:05:04 +00:00
|
|
|
compatible = "stericsson,db8500-i2c", "st,nomadik-i2c";
|
2012-03-15 16:46:17 +00:00
|
|
|
reg = <0x8012a000 0x1000>;
|
|
|
|
interrupts = <0 51 0x4>;
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
};
|
|
|
|
|
|
|
|
ssp@80002000 {
|
|
|
|
compatible = "arm,pl022", "arm,primecell";
|
|
|
|
reg = <80002000 0x1000>;
|
|
|
|
interrupts = <0 14 0x4>;
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
status = "disabled";
|
2012-03-15 16:47:11 +00:00
|
|
|
|
|
|
|
// Add one of these for each child device
|
2012-05-29 06:17:36 +00:00
|
|
|
cs-gpios = <&gpio0 31 0x4 &gpio4 14 0x4 &gpio4 16 0x4
|
|
|
|
&gpio6 22 0x4 &gpio7 0 0x4>;
|
2012-03-15 16:47:11 +00:00
|
|
|
|
2012-03-15 16:46:17 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
uart@80120000 {
|
|
|
|
compatible = "arm,pl011", "arm,primecell";
|
|
|
|
reg = <0x80120000 0x1000>;
|
|
|
|
interrupts = <0 11 0x4>;
|
|
|
|
status = "disabled";
|
|
|
|
};
|
|
|
|
uart@80121000 {
|
|
|
|
compatible = "arm,pl011", "arm,primecell";
|
|
|
|
reg = <0x80121000 0x1000>;
|
|
|
|
interrupts = <0 19 0x4>;
|
|
|
|
status = "disabled";
|
|
|
|
};
|
|
|
|
uart@80007000 {
|
|
|
|
compatible = "arm,pl011", "arm,primecell";
|
|
|
|
reg = <0x80007000 0x1000>;
|
|
|
|
interrupts = <0 26 0x4>;
|
|
|
|
status = "disabled";
|
|
|
|
};
|
|
|
|
|
|
|
|
sdi@80126000 {
|
|
|
|
compatible = "arm,pl18x", "arm,primecell";
|
|
|
|
reg = <0x80126000 0x1000>;
|
|
|
|
interrupts = <0 60 0x4>;
|
|
|
|
status = "disabled";
|
|
|
|
};
|
|
|
|
sdi@80118000 {
|
|
|
|
compatible = "arm,pl18x", "arm,primecell";
|
|
|
|
reg = <0x80118000 0x1000>;
|
|
|
|
interrupts = <0 50 0x4>;
|
|
|
|
status = "disabled";
|
|
|
|
};
|
|
|
|
sdi@80005000 {
|
|
|
|
compatible = "arm,pl18x", "arm,primecell";
|
|
|
|
reg = <0x80005000 0x1000>;
|
|
|
|
interrupts = <0 41 0x4>;
|
|
|
|
status = "disabled";
|
|
|
|
};
|
|
|
|
sdi@80119000 {
|
|
|
|
compatible = "arm,pl18x", "arm,primecell";
|
|
|
|
reg = <0x80119000 0x1000>;
|
|
|
|
interrupts = <0 59 0x4>;
|
|
|
|
status = "disabled";
|
|
|
|
};
|
|
|
|
sdi@80114000 {
|
|
|
|
compatible = "arm,pl18x", "arm,primecell";
|
|
|
|
reg = <0x80114000 0x1000>;
|
|
|
|
interrupts = <0 99 0x4>;
|
|
|
|
status = "disabled";
|
|
|
|
};
|
|
|
|
sdi@80008000 {
|
|
|
|
compatible = "arm,pl18x", "arm,primecell";
|
|
|
|
reg = <0x80114000 0x1000>;
|
|
|
|
interrupts = <0 100 0x4>;
|
|
|
|
status = "disabled";
|
|
|
|
};
|
2012-04-24 09:53:18 +00:00
|
|
|
|
|
|
|
external-bus@50000000 {
|
|
|
|
compatible = "simple-bus";
|
|
|
|
reg = <0x50000000 0x4000000>;
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <1>;
|
|
|
|
ranges = <0 0x50000000 0x4000000>;
|
|
|
|
status = "disabled";
|
|
|
|
};
|
2012-03-02 23:07:21 +00:00
|
|
|
};
|
|
|
|
};
|