License cleanup: add SPDX GPL-2.0 license identifier to files with no license
Many source files in the tree are missing licensing information, which
makes it harder for compliance tools to determine the correct license.
By default all files without license information are under the default
license of the kernel, which is GPL version 2.
Update the files which contain no license information with the 'GPL-2.0'
SPDX license identifier. The SPDX identifier is a legally binding
shorthand, which can be used instead of the full boiler plate text.
This patch is based on work done by Thomas Gleixner and Kate Stewart and
Philippe Ombredanne.
How this work was done:
Patches were generated and checked against linux-4.14-rc6 for a subset of
the use cases:
- file had no licensing information it it.
- file was a */uapi/* one with no licensing information in it,
- file was a */uapi/* one with existing licensing information,
Further patches will be generated in subsequent months to fix up cases
where non-standard license headers were used, and references to license
had to be inferred by heuristics based on keywords.
The analysis to determine which SPDX License Identifier to be applied to
a file was done in a spreadsheet of side by side results from of the
output of two independent scanners (ScanCode & Windriver) producing SPDX
tag:value files created by Philippe Ombredanne. Philippe prepared the
base worksheet, and did an initial spot review of a few 1000 files.
The 4.13 kernel was the starting point of the analysis with 60,537 files
assessed. Kate Stewart did a file by file comparison of the scanner
results in the spreadsheet to determine which SPDX license identifier(s)
to be applied to the file. She confirmed any determination that was not
immediately clear with lawyers working with the Linux Foundation.
Criteria used to select files for SPDX license identifier tagging was:
- Files considered eligible had to be source code files.
- Make and config files were included as candidates if they contained >5
lines of source
- File already had some variant of a license header in it (even if <5
lines).
All documentation files were explicitly excluded.
The following heuristics were used to determine which SPDX license
identifiers to apply.
- when both scanners couldn't find any license traces, file was
considered to have no license information in it, and the top level
COPYING file license applied.
For non */uapi/* files that summary was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 11139
and resulted in the first patch in this series.
If that file was a */uapi/* path one, it was "GPL-2.0 WITH
Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 WITH Linux-syscall-note 930
and resulted in the second patch in this series.
- if a file had some form of licensing information in it, and was one
of the */uapi/* ones, it was denoted with the Linux-syscall-note if
any GPL family license was found in the file or had no licensing in
it (per prior point). Results summary:
SPDX license identifier # files
---------------------------------------------------|------
GPL-2.0 WITH Linux-syscall-note 270
GPL-2.0+ WITH Linux-syscall-note 169
((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21
((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17
LGPL-2.1+ WITH Linux-syscall-note 15
GPL-1.0+ WITH Linux-syscall-note 14
((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5
LGPL-2.0+ WITH Linux-syscall-note 4
LGPL-2.1 WITH Linux-syscall-note 3
((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3
((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1
and that resulted in the third patch in this series.
- when the two scanners agreed on the detected license(s), that became
the concluded license(s).
- when there was disagreement between the two scanners (one detected a
license but the other didn't, or they both detected different
licenses) a manual inspection of the file occurred.
- In most cases a manual inspection of the information in the file
resulted in a clear resolution of the license that should apply (and
which scanner probably needed to revisit its heuristics).
- When it was not immediately clear, the license identifier was
confirmed with lawyers working with the Linux Foundation.
- If there was any question as to the appropriate license identifier,
the file was flagged for further research and to be revisited later
in time.
In total, over 70 hours of logged manual review was done on the
spreadsheet to determine the SPDX license identifiers to apply to the
source files by Kate, Philippe, Thomas and, in some cases, confirmation
by lawyers working with the Linux Foundation.
Kate also obtained a third independent scan of the 4.13 code base from
FOSSology, and compared selected files where the other two scanners
disagreed against that SPDX file, to see if there was new insights. The
Windriver scanner is based on an older version of FOSSology in part, so
they are related.
Thomas did random spot checks in about 500 files from the spreadsheets
for the uapi headers and agreed with SPDX license identifier in the
files he inspected. For the non-uapi files Thomas did random spot checks
in about 15000 files.
In initial set of patches against 4.14-rc6, 3 files were found to have
copy/paste license identifier errors, and have been fixed to reflect the
correct identifier.
Additionally Philippe spent 10 hours this week doing a detailed manual
inspection and review of the 12,461 patched files from the initial patch
version early this week with:
- a full scancode scan run, collecting the matched texts, detected
license ids and scores
- reviewing anything where there was a license detected (about 500+
files) to ensure that the applied SPDX license was correct
- reviewing anything where there was no detection but the patch license
was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied
SPDX license was correct
This produced a worksheet with 20 files needing minor correction. This
worksheet was then exported into 3 different .csv files for the
different types of files to be modified.
These .csv files were then reviewed by Greg. Thomas wrote a script to
parse the csv files and add the proper SPDX tag to the file, in the
format that the file expected. This script was further refined by Greg
based on the output to detect more types of files automatically and to
distinguish between header and source .c files (which need different
comment types.) Finally Greg ran the script using the .csv files to
generate the patches.
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-11-01 14:07:57 +00:00
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// SPDX-License-Identifier: GPL-2.0
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2014-01-01 15:26:52 +00:00
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/*
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* guest access functions
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*
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* Copyright IBM Corp. 2014
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*
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*/
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#include <linux/vmalloc.h>
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2017-02-03 23:16:44 +00:00
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#include <linux/mm_types.h>
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2014-01-01 15:26:52 +00:00
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#include <linux/err.h>
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2020-06-09 04:32:38 +00:00
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#include <linux/pgtable.h>
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2020-06-09 04:32:42 +00:00
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2016-03-08 11:16:35 +00:00
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#include <asm/gmap.h>
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2014-01-01 15:26:52 +00:00
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#include "kvm-s390.h"
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#include "gaccess.h"
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2015-03-09 11:17:25 +00:00
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#include <asm/switch_to.h>
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2014-01-01 15:26:52 +00:00
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union asce {
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unsigned long val;
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struct {
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unsigned long origin : 52; /* Region- or Segment-Table Origin */
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unsigned long : 2;
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unsigned long g : 1; /* Subspace Group Control */
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unsigned long p : 1; /* Private Space Control */
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unsigned long s : 1; /* Storage-Alteration-Event Control */
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unsigned long x : 1; /* Space-Switch-Event Control */
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unsigned long r : 1; /* Real-Space Control */
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unsigned long : 1;
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unsigned long dt : 2; /* Designation-Type Control */
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unsigned long tl : 2; /* Region- or Segment-Table Length */
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};
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};
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enum {
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ASCE_TYPE_SEGMENT = 0,
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ASCE_TYPE_REGION3 = 1,
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ASCE_TYPE_REGION2 = 2,
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ASCE_TYPE_REGION1 = 3
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};
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union region1_table_entry {
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unsigned long val;
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struct {
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unsigned long rto: 52;/* Region-Table Origin */
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unsigned long : 2;
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unsigned long p : 1; /* DAT-Protection Bit */
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unsigned long : 1;
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unsigned long tf : 2; /* Region-Second-Table Offset */
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unsigned long i : 1; /* Region-Invalid Bit */
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unsigned long : 1;
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unsigned long tt : 2; /* Table-Type Bits */
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unsigned long tl : 2; /* Region-Second-Table Length */
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};
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};
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union region2_table_entry {
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unsigned long val;
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struct {
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unsigned long rto: 52;/* Region-Table Origin */
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unsigned long : 2;
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unsigned long p : 1; /* DAT-Protection Bit */
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unsigned long : 1;
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unsigned long tf : 2; /* Region-Third-Table Offset */
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unsigned long i : 1; /* Region-Invalid Bit */
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unsigned long : 1;
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unsigned long tt : 2; /* Table-Type Bits */
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unsigned long tl : 2; /* Region-Third-Table Length */
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};
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};
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struct region3_table_entry_fc0 {
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unsigned long sto: 52;/* Segment-Table Origin */
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unsigned long : 1;
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unsigned long fc : 1; /* Format-Control */
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unsigned long p : 1; /* DAT-Protection Bit */
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unsigned long : 1;
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unsigned long tf : 2; /* Segment-Table Offset */
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unsigned long i : 1; /* Region-Invalid Bit */
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unsigned long cr : 1; /* Common-Region Bit */
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unsigned long tt : 2; /* Table-Type Bits */
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unsigned long tl : 2; /* Segment-Table Length */
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};
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struct region3_table_entry_fc1 {
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unsigned long rfaa : 33; /* Region-Frame Absolute Address */
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unsigned long : 14;
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unsigned long av : 1; /* ACCF-Validity Control */
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unsigned long acc: 4; /* Access-Control Bits */
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unsigned long f : 1; /* Fetch-Protection Bit */
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unsigned long fc : 1; /* Format-Control */
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unsigned long p : 1; /* DAT-Protection Bit */
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2017-06-07 10:45:22 +00:00
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unsigned long iep: 1; /* Instruction-Execution-Protection */
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2014-01-01 15:26:52 +00:00
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unsigned long : 2;
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unsigned long i : 1; /* Region-Invalid Bit */
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unsigned long cr : 1; /* Common-Region Bit */
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unsigned long tt : 2; /* Table-Type Bits */
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unsigned long : 2;
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};
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union region3_table_entry {
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unsigned long val;
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struct region3_table_entry_fc0 fc0;
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struct region3_table_entry_fc1 fc1;
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struct {
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unsigned long : 53;
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unsigned long fc : 1; /* Format-Control */
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unsigned long : 4;
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unsigned long i : 1; /* Region-Invalid Bit */
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unsigned long cr : 1; /* Common-Region Bit */
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unsigned long tt : 2; /* Table-Type Bits */
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unsigned long : 2;
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};
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};
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struct segment_entry_fc0 {
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unsigned long pto: 53;/* Page-Table Origin */
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unsigned long fc : 1; /* Format-Control */
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unsigned long p : 1; /* DAT-Protection Bit */
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unsigned long : 3;
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unsigned long i : 1; /* Segment-Invalid Bit */
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unsigned long cs : 1; /* Common-Segment Bit */
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unsigned long tt : 2; /* Table-Type Bits */
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unsigned long : 2;
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};
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struct segment_entry_fc1 {
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unsigned long sfaa : 44; /* Segment-Frame Absolute Address */
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unsigned long : 3;
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unsigned long av : 1; /* ACCF-Validity Control */
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unsigned long acc: 4; /* Access-Control Bits */
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unsigned long f : 1; /* Fetch-Protection Bit */
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unsigned long fc : 1; /* Format-Control */
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unsigned long p : 1; /* DAT-Protection Bit */
|
2017-06-07 10:45:22 +00:00
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unsigned long iep: 1; /* Instruction-Execution-Protection */
|
2014-01-01 15:26:52 +00:00
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unsigned long : 2;
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unsigned long i : 1; /* Segment-Invalid Bit */
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unsigned long cs : 1; /* Common-Segment Bit */
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unsigned long tt : 2; /* Table-Type Bits */
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unsigned long : 2;
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};
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union segment_table_entry {
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unsigned long val;
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struct segment_entry_fc0 fc0;
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struct segment_entry_fc1 fc1;
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struct {
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unsigned long : 53;
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unsigned long fc : 1; /* Format-Control */
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unsigned long : 4;
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unsigned long i : 1; /* Segment-Invalid Bit */
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unsigned long cs : 1; /* Common-Segment Bit */
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unsigned long tt : 2; /* Table-Type Bits */
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unsigned long : 2;
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};
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};
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enum {
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TABLE_TYPE_SEGMENT = 0,
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TABLE_TYPE_REGION3 = 1,
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TABLE_TYPE_REGION2 = 2,
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TABLE_TYPE_REGION1 = 3
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};
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union page_table_entry {
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unsigned long val;
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struct {
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unsigned long pfra : 52; /* Page-Frame Real Address */
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unsigned long z : 1; /* Zero Bit */
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unsigned long i : 1; /* Page-Invalid Bit */
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unsigned long p : 1; /* DAT-Protection Bit */
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2017-06-07 10:45:22 +00:00
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unsigned long iep: 1; /* Instruction-Execution-Protection */
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unsigned long : 8;
|
2014-01-01 15:26:52 +00:00
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};
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};
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/*
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* vaddress union in order to easily decode a virtual address into its
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* region first index, region second index etc. parts.
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*/
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union vaddress {
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unsigned long addr;
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struct {
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unsigned long rfx : 11;
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unsigned long rsx : 11;
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unsigned long rtx : 11;
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unsigned long sx : 11;
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unsigned long px : 8;
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unsigned long bx : 12;
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};
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struct {
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unsigned long rfx01 : 2;
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unsigned long : 9;
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unsigned long rsx01 : 2;
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unsigned long : 9;
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unsigned long rtx01 : 2;
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unsigned long : 9;
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unsigned long sx01 : 2;
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unsigned long : 29;
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};
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};
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/*
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* raddress union which will contain the result (real or absolute address)
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* after a page table walk. The rfaa, sfaa and pfra members are used to
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* simply assign them the value of a region, segment or page table entry.
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*/
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union raddress {
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unsigned long addr;
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unsigned long rfaa : 33; /* Region-Frame Absolute Address */
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unsigned long sfaa : 44; /* Segment-Frame Absolute Address */
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unsigned long pfra : 52; /* Page-Frame Real Address */
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};
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2015-03-09 11:17:25 +00:00
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union alet {
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u32 val;
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struct {
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u32 reserved : 7;
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u32 p : 1;
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u32 alesn : 8;
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u32 alen : 16;
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};
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};
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union ald {
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u32 val;
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struct {
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u32 : 1;
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u32 alo : 24;
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u32 all : 7;
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};
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};
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struct ale {
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unsigned long i : 1; /* ALEN-Invalid Bit */
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unsigned long : 5;
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unsigned long fo : 1; /* Fetch-Only Bit */
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unsigned long p : 1; /* Private Bit */
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unsigned long alesn : 8; /* Access-List-Entry Sequence Number */
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unsigned long aleax : 16; /* Access-List-Entry Authorization Index */
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unsigned long : 32;
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unsigned long : 1;
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unsigned long asteo : 25; /* ASN-Second-Table-Entry Origin */
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unsigned long : 6;
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unsigned long astesn : 32; /* ASTE Sequence Number */
|
2017-06-21 14:49:15 +00:00
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};
|
2015-03-09 11:17:25 +00:00
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struct aste {
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unsigned long i : 1; /* ASX-Invalid Bit */
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unsigned long ato : 29; /* Authority-Table Origin */
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unsigned long : 1;
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unsigned long b : 1; /* Base-Space Bit */
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unsigned long ax : 16; /* Authorization Index */
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|
|
unsigned long atl : 12; /* Authority-Table Length */
|
|
|
|
|
unsigned long : 2;
|
|
|
|
|
unsigned long ca : 1; /* Controlled-ASN Bit */
|
|
|
|
|
unsigned long ra : 1; /* Reusable-ASN Bit */
|
|
|
|
|
unsigned long asce : 64; /* Address-Space-Control Element */
|
|
|
|
|
unsigned long ald : 32;
|
|
|
|
|
unsigned long astesn : 32;
|
|
|
|
|
/* .. more fields there */
|
2017-06-21 14:49:15 +00:00
|
|
|
};
|
2014-01-10 13:33:28 +00:00
|
|
|
|
|
|
|
|
int ipte_lock_held(struct kvm_vcpu *vcpu)
|
|
|
|
|
{
|
2017-03-13 10:48:28 +00:00
|
|
|
if (vcpu->arch.sie_block->eca & ECA_SII) {
|
2015-04-22 16:08:39 +00:00
|
|
|
int rc;
|
|
|
|
|
|
|
|
|
|
read_lock(&vcpu->kvm->arch.sca_lock);
|
|
|
|
|
rc = kvm_s390_get_ipte_control(vcpu->kvm)->kh != 0;
|
|
|
|
|
read_unlock(&vcpu->kvm->arch.sca_lock);
|
|
|
|
|
return rc;
|
|
|
|
|
}
|
2014-10-01 12:48:42 +00:00
|
|
|
return vcpu->kvm->arch.ipte_lock_count != 0;
|
2014-01-10 13:33:28 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void ipte_lock_simple(struct kvm_vcpu *vcpu)
|
|
|
|
|
{
|
|
|
|
|
union ipte_control old, new, *ic;
|
|
|
|
|
|
2014-10-01 12:48:42 +00:00
|
|
|
mutex_lock(&vcpu->kvm->arch.ipte_mutex);
|
|
|
|
|
vcpu->kvm->arch.ipte_lock_count++;
|
|
|
|
|
if (vcpu->kvm->arch.ipte_lock_count > 1)
|
2014-01-10 13:33:28 +00:00
|
|
|
goto out;
|
2015-04-22 16:08:39 +00:00
|
|
|
retry:
|
|
|
|
|
read_lock(&vcpu->kvm->arch.sca_lock);
|
2015-04-21 12:44:54 +00:00
|
|
|
ic = kvm_s390_get_ipte_control(vcpu->kvm);
|
2014-01-10 13:33:28 +00:00
|
|
|
do {
|
2014-11-25 12:17:34 +00:00
|
|
|
old = READ_ONCE(*ic);
|
2015-04-22 16:08:39 +00:00
|
|
|
if (old.k) {
|
|
|
|
|
read_unlock(&vcpu->kvm->arch.sca_lock);
|
2014-01-10 13:33:28 +00:00
|
|
|
cond_resched();
|
2015-04-22 16:08:39 +00:00
|
|
|
goto retry;
|
2014-01-10 13:33:28 +00:00
|
|
|
}
|
|
|
|
|
new = old;
|
|
|
|
|
new.k = 1;
|
|
|
|
|
} while (cmpxchg(&ic->val, old.val, new.val) != old.val);
|
2015-04-22 16:08:39 +00:00
|
|
|
read_unlock(&vcpu->kvm->arch.sca_lock);
|
2014-01-10 13:33:28 +00:00
|
|
|
out:
|
2014-10-01 12:48:42 +00:00
|
|
|
mutex_unlock(&vcpu->kvm->arch.ipte_mutex);
|
2014-01-10 13:33:28 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void ipte_unlock_simple(struct kvm_vcpu *vcpu)
|
|
|
|
|
{
|
|
|
|
|
union ipte_control old, new, *ic;
|
|
|
|
|
|
2014-10-01 12:48:42 +00:00
|
|
|
mutex_lock(&vcpu->kvm->arch.ipte_mutex);
|
|
|
|
|
vcpu->kvm->arch.ipte_lock_count--;
|
|
|
|
|
if (vcpu->kvm->arch.ipte_lock_count)
|
2014-01-10 13:33:28 +00:00
|
|
|
goto out;
|
2015-04-22 16:08:39 +00:00
|
|
|
read_lock(&vcpu->kvm->arch.sca_lock);
|
2015-04-21 12:44:54 +00:00
|
|
|
ic = kvm_s390_get_ipte_control(vcpu->kvm);
|
2014-01-10 13:33:28 +00:00
|
|
|
do {
|
2014-11-25 12:17:34 +00:00
|
|
|
old = READ_ONCE(*ic);
|
KVM: s390: Fix ipte locking
ipte_unlock_siif uses cmpxchg to replace the in-memory data of the ipte
lock together with ACCESS_ONCE for the intial read.
union ipte_control {
unsigned long val;
struct {
unsigned long k : 1;
unsigned long kh : 31;
unsigned long kg : 32;
};
};
[...]
static void ipte_unlock_siif(struct kvm_vcpu *vcpu)
{
union ipte_control old, new, *ic;
ic = &vcpu->kvm->arch.sca->ipte_control;
do {
new = old = ACCESS_ONCE(*ic);
new.kh--;
if (!new.kh)
new.k = 0;
} while (cmpxchg(&ic->val, old.val, new.val) != old.val);
if (!new.kh)
wake_up(&vcpu->kvm->arch.ipte_wq);
}
The new value, is loaded twice from memory with gcc 4.7.2 of
fedora 18, despite the ACCESS_ONCE:
--->
l %r4,0(%r3) <--- load first 32 bit of lock (k and kh) in r4
alfi %r4,2147483647 <--- add -1 to r4
llgtr %r4,%r4 <--- zero out the sign bit of r4
lg %r1,0(%r3) <--- load all 64 bit of lock into new
lgr %r2,%r1 <--- load the same into old
risbg %r1,%r4,1,31,32 <--- shift and insert r4 into the bits 1-31 of
new
llihf %r4,2147483647
ngrk %r4,%r1,%r4
jne aa0 <ipte_unlock+0xf8>
nihh %r1,32767
lgr %r4,%r2
csg %r4,%r1,0(%r3)
cgr %r2,%r4
jne a70 <ipte_unlock+0xc8>
If the memory value changes between the first load (l) and the second
load (lg) we are broken. If that happens VCPU threads will hang
(unkillable) in handle_ipte_interlock.
Andreas Krebbel analyzed this and tracked it down to a compiler bug in
that version:
"while it is not that obvious the C99 standard basically forbids
duplicating the memory access also in that case. For an argumentation of
a similiar case please see:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=22278#c43
For the implementation-defined cases regarding volatile there are some
GCC-specific clarifications which can be found here:
https://gcc.gnu.org/onlinedocs/gcc/Volatiles.html#Volatiles
I've tracked down the problem with a reduced testcase. The problem was
that during a tree level optimization (SRA - scalar replacement of
aggregates) the volatile marker is lost. And an RTL level optimizer (CSE
- common subexpression elimination) then propagated the memory read into
its second use introducing another access to the memory location. So
indeed Christian's suspicion that the union access has something to do
with it is correct (since it triggered the SRA optimization).
This issue has been reported and fixed in the GCC 4.8 development cycle:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=58145"
This patch replaces the ACCESS_ONCE scheme with a barrier() based scheme
that should work for all supported compilers.
Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
Cc: stable@vger.kernel.org # v3.16+
2014-11-04 07:31:16 +00:00
|
|
|
new = old;
|
2014-01-10 13:33:28 +00:00
|
|
|
new.k = 0;
|
|
|
|
|
} while (cmpxchg(&ic->val, old.val, new.val) != old.val);
|
2015-04-22 16:08:39 +00:00
|
|
|
read_unlock(&vcpu->kvm->arch.sca_lock);
|
2014-09-03 19:17:03 +00:00
|
|
|
wake_up(&vcpu->kvm->arch.ipte_wq);
|
2014-01-10 13:33:28 +00:00
|
|
|
out:
|
2014-10-01 12:48:42 +00:00
|
|
|
mutex_unlock(&vcpu->kvm->arch.ipte_mutex);
|
2014-01-10 13:33:28 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void ipte_lock_siif(struct kvm_vcpu *vcpu)
|
|
|
|
|
{
|
|
|
|
|
union ipte_control old, new, *ic;
|
|
|
|
|
|
2015-04-22 16:08:39 +00:00
|
|
|
retry:
|
|
|
|
|
read_lock(&vcpu->kvm->arch.sca_lock);
|
2015-04-21 12:44:54 +00:00
|
|
|
ic = kvm_s390_get_ipte_control(vcpu->kvm);
|
2014-01-10 13:33:28 +00:00
|
|
|
do {
|
2014-11-25 12:17:34 +00:00
|
|
|
old = READ_ONCE(*ic);
|
2015-04-22 16:08:39 +00:00
|
|
|
if (old.kg) {
|
|
|
|
|
read_unlock(&vcpu->kvm->arch.sca_lock);
|
2014-01-10 13:33:28 +00:00
|
|
|
cond_resched();
|
2015-04-22 16:08:39 +00:00
|
|
|
goto retry;
|
2014-01-10 13:33:28 +00:00
|
|
|
}
|
|
|
|
|
new = old;
|
|
|
|
|
new.k = 1;
|
|
|
|
|
new.kh++;
|
|
|
|
|
} while (cmpxchg(&ic->val, old.val, new.val) != old.val);
|
2015-04-22 16:08:39 +00:00
|
|
|
read_unlock(&vcpu->kvm->arch.sca_lock);
|
2014-01-10 13:33:28 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void ipte_unlock_siif(struct kvm_vcpu *vcpu)
|
|
|
|
|
{
|
|
|
|
|
union ipte_control old, new, *ic;
|
|
|
|
|
|
2015-04-22 16:08:39 +00:00
|
|
|
read_lock(&vcpu->kvm->arch.sca_lock);
|
2015-04-21 12:44:54 +00:00
|
|
|
ic = kvm_s390_get_ipte_control(vcpu->kvm);
|
2014-01-10 13:33:28 +00:00
|
|
|
do {
|
2014-11-25 12:17:34 +00:00
|
|
|
old = READ_ONCE(*ic);
|
KVM: s390: Fix ipte locking
ipte_unlock_siif uses cmpxchg to replace the in-memory data of the ipte
lock together with ACCESS_ONCE for the intial read.
union ipte_control {
unsigned long val;
struct {
unsigned long k : 1;
unsigned long kh : 31;
unsigned long kg : 32;
};
};
[...]
static void ipte_unlock_siif(struct kvm_vcpu *vcpu)
{
union ipte_control old, new, *ic;
ic = &vcpu->kvm->arch.sca->ipte_control;
do {
new = old = ACCESS_ONCE(*ic);
new.kh--;
if (!new.kh)
new.k = 0;
} while (cmpxchg(&ic->val, old.val, new.val) != old.val);
if (!new.kh)
wake_up(&vcpu->kvm->arch.ipte_wq);
}
The new value, is loaded twice from memory with gcc 4.7.2 of
fedora 18, despite the ACCESS_ONCE:
--->
l %r4,0(%r3) <--- load first 32 bit of lock (k and kh) in r4
alfi %r4,2147483647 <--- add -1 to r4
llgtr %r4,%r4 <--- zero out the sign bit of r4
lg %r1,0(%r3) <--- load all 64 bit of lock into new
lgr %r2,%r1 <--- load the same into old
risbg %r1,%r4,1,31,32 <--- shift and insert r4 into the bits 1-31 of
new
llihf %r4,2147483647
ngrk %r4,%r1,%r4
jne aa0 <ipte_unlock+0xf8>
nihh %r1,32767
lgr %r4,%r2
csg %r4,%r1,0(%r3)
cgr %r2,%r4
jne a70 <ipte_unlock+0xc8>
If the memory value changes between the first load (l) and the second
load (lg) we are broken. If that happens VCPU threads will hang
(unkillable) in handle_ipte_interlock.
Andreas Krebbel analyzed this and tracked it down to a compiler bug in
that version:
"while it is not that obvious the C99 standard basically forbids
duplicating the memory access also in that case. For an argumentation of
a similiar case please see:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=22278#c43
For the implementation-defined cases regarding volatile there are some
GCC-specific clarifications which can be found here:
https://gcc.gnu.org/onlinedocs/gcc/Volatiles.html#Volatiles
I've tracked down the problem with a reduced testcase. The problem was
that during a tree level optimization (SRA - scalar replacement of
aggregates) the volatile marker is lost. And an RTL level optimizer (CSE
- common subexpression elimination) then propagated the memory read into
its second use introducing another access to the memory location. So
indeed Christian's suspicion that the union access has something to do
with it is correct (since it triggered the SRA optimization).
This issue has been reported and fixed in the GCC 4.8 development cycle:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=58145"
This patch replaces the ACCESS_ONCE scheme with a barrier() based scheme
that should work for all supported compilers.
Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
Cc: stable@vger.kernel.org # v3.16+
2014-11-04 07:31:16 +00:00
|
|
|
new = old;
|
2014-01-10 13:33:28 +00:00
|
|
|
new.kh--;
|
|
|
|
|
if (!new.kh)
|
|
|
|
|
new.k = 0;
|
|
|
|
|
} while (cmpxchg(&ic->val, old.val, new.val) != old.val);
|
2015-04-22 16:08:39 +00:00
|
|
|
read_unlock(&vcpu->kvm->arch.sca_lock);
|
2014-01-10 13:33:28 +00:00
|
|
|
if (!new.kh)
|
|
|
|
|
wake_up(&vcpu->kvm->arch.ipte_wq);
|
|
|
|
|
}
|
|
|
|
|
|
2014-02-04 13:48:07 +00:00
|
|
|
void ipte_lock(struct kvm_vcpu *vcpu)
|
2014-01-10 13:33:28 +00:00
|
|
|
{
|
2017-03-13 10:48:28 +00:00
|
|
|
if (vcpu->arch.sie_block->eca & ECA_SII)
|
2014-01-10 13:33:28 +00:00
|
|
|
ipte_lock_siif(vcpu);
|
|
|
|
|
else
|
|
|
|
|
ipte_lock_simple(vcpu);
|
|
|
|
|
}
|
|
|
|
|
|
2014-02-04 13:48:07 +00:00
|
|
|
void ipte_unlock(struct kvm_vcpu *vcpu)
|
2014-01-10 13:33:28 +00:00
|
|
|
{
|
2017-03-13 10:48:28 +00:00
|
|
|
if (vcpu->arch.sie_block->eca & ECA_SII)
|
2014-01-10 13:33:28 +00:00
|
|
|
ipte_unlock_siif(vcpu);
|
|
|
|
|
else
|
|
|
|
|
ipte_unlock_simple(vcpu);
|
|
|
|
|
}
|
|
|
|
|
|
2016-12-09 11:44:40 +00:00
|
|
|
static int ar_translation(struct kvm_vcpu *vcpu, union asce *asce, u8 ar,
|
2015-11-16 14:42:11 +00:00
|
|
|
enum gacc_mode mode)
|
2015-03-09 11:17:25 +00:00
|
|
|
{
|
|
|
|
|
union alet alet;
|
|
|
|
|
struct ale ale;
|
|
|
|
|
struct aste aste;
|
|
|
|
|
unsigned long ald_addr, authority_table_addr;
|
|
|
|
|
union ald ald;
|
|
|
|
|
int eax, rc;
|
|
|
|
|
u8 authority_table;
|
|
|
|
|
|
|
|
|
|
if (ar >= NUM_ACRS)
|
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
|
|
save_access_regs(vcpu->run->s.regs.acrs);
|
|
|
|
|
alet.val = vcpu->run->s.regs.acrs[ar];
|
|
|
|
|
|
|
|
|
|
if (ar == 0 || alet.val == 0) {
|
|
|
|
|
asce->val = vcpu->arch.sie_block->gcr[1];
|
|
|
|
|
return 0;
|
|
|
|
|
} else if (alet.val == 1) {
|
|
|
|
|
asce->val = vcpu->arch.sie_block->gcr[7];
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (alet.reserved)
|
|
|
|
|
return PGM_ALET_SPECIFICATION;
|
|
|
|
|
|
|
|
|
|
if (alet.p)
|
|
|
|
|
ald_addr = vcpu->arch.sie_block->gcr[5];
|
|
|
|
|
else
|
|
|
|
|
ald_addr = vcpu->arch.sie_block->gcr[2];
|
|
|
|
|
ald_addr &= 0x7fffffc0;
|
|
|
|
|
|
|
|
|
|
rc = read_guest_real(vcpu, ald_addr + 16, &ald.val, sizeof(union ald));
|
|
|
|
|
if (rc)
|
|
|
|
|
return rc;
|
|
|
|
|
|
|
|
|
|
if (alet.alen / 8 > ald.all)
|
|
|
|
|
return PGM_ALEN_TRANSLATION;
|
|
|
|
|
|
|
|
|
|
if (0x7fffffff - ald.alo * 128 < alet.alen * 16)
|
|
|
|
|
return PGM_ADDRESSING;
|
|
|
|
|
|
|
|
|
|
rc = read_guest_real(vcpu, ald.alo * 128 + alet.alen * 16, &ale,
|
|
|
|
|
sizeof(struct ale));
|
|
|
|
|
if (rc)
|
|
|
|
|
return rc;
|
|
|
|
|
|
|
|
|
|
if (ale.i == 1)
|
|
|
|
|
return PGM_ALEN_TRANSLATION;
|
|
|
|
|
if (ale.alesn != alet.alesn)
|
|
|
|
|
return PGM_ALE_SEQUENCE;
|
|
|
|
|
|
|
|
|
|
rc = read_guest_real(vcpu, ale.asteo * 64, &aste, sizeof(struct aste));
|
|
|
|
|
if (rc)
|
|
|
|
|
return rc;
|
|
|
|
|
|
|
|
|
|
if (aste.i)
|
|
|
|
|
return PGM_ASTE_VALIDITY;
|
|
|
|
|
if (aste.astesn != ale.astesn)
|
|
|
|
|
return PGM_ASTE_SEQUENCE;
|
|
|
|
|
|
|
|
|
|
if (ale.p == 1) {
|
|
|
|
|
eax = (vcpu->arch.sie_block->gcr[8] >> 16) & 0xffff;
|
|
|
|
|
if (ale.aleax != eax) {
|
|
|
|
|
if (eax / 16 > aste.atl)
|
|
|
|
|
return PGM_EXTENDED_AUTHORITY;
|
|
|
|
|
|
|
|
|
|
authority_table_addr = aste.ato * 4 + eax / 4;
|
|
|
|
|
|
|
|
|
|
rc = read_guest_real(vcpu, authority_table_addr,
|
|
|
|
|
&authority_table,
|
|
|
|
|
sizeof(u8));
|
|
|
|
|
if (rc)
|
|
|
|
|
return rc;
|
|
|
|
|
|
|
|
|
|
if ((authority_table & (0x40 >> ((eax & 3) * 2))) == 0)
|
|
|
|
|
return PGM_EXTENDED_AUTHORITY;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2015-11-16 14:42:11 +00:00
|
|
|
if (ale.fo == 1 && mode == GACC_STORE)
|
2015-03-09 11:17:25 +00:00
|
|
|
return PGM_PROTECTION;
|
|
|
|
|
|
|
|
|
|
asce->val = aste.asce;
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
struct trans_exc_code_bits {
|
|
|
|
|
unsigned long addr : 52; /* Translation-exception Address */
|
|
|
|
|
unsigned long fsi : 2; /* Access Exception Fetch/Store Indication */
|
2016-12-15 14:58:14 +00:00
|
|
|
unsigned long : 2;
|
|
|
|
|
unsigned long b56 : 1;
|
|
|
|
|
unsigned long : 3;
|
2015-03-09 11:17:25 +00:00
|
|
|
unsigned long b60 : 1;
|
|
|
|
|
unsigned long b61 : 1;
|
|
|
|
|
unsigned long as : 2; /* ASCE Identifier */
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
enum {
|
|
|
|
|
FSI_UNKNOWN = 0, /* Unknown wether fetch or store */
|
|
|
|
|
FSI_STORE = 1, /* Exception was due to store operation */
|
|
|
|
|
FSI_FETCH = 2 /* Exception was due to fetch operation */
|
|
|
|
|
};
|
|
|
|
|
|
2016-05-31 17:56:46 +00:00
|
|
|
enum prot_type {
|
|
|
|
|
PROT_TYPE_LA = 0,
|
|
|
|
|
PROT_TYPE_KEYC = 1,
|
|
|
|
|
PROT_TYPE_ALC = 2,
|
|
|
|
|
PROT_TYPE_DAT = 3,
|
2017-06-07 10:45:22 +00:00
|
|
|
PROT_TYPE_IEP = 4,
|
2016-05-31 17:56:46 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
|
|
static int trans_exc(struct kvm_vcpu *vcpu, int code, unsigned long gva,
|
2016-12-09 11:44:40 +00:00
|
|
|
u8 ar, enum gacc_mode mode, enum prot_type prot)
|
2016-05-31 17:56:46 +00:00
|
|
|
{
|
|
|
|
|
struct kvm_s390_pgm_info *pgm = &vcpu->arch.pgm;
|
|
|
|
|
struct trans_exc_code_bits *tec;
|
|
|
|
|
|
|
|
|
|
memset(pgm, 0, sizeof(*pgm));
|
|
|
|
|
pgm->code = code;
|
|
|
|
|
tec = (struct trans_exc_code_bits *)&pgm->trans_exc_code;
|
|
|
|
|
|
|
|
|
|
switch (code) {
|
2016-07-29 09:36:04 +00:00
|
|
|
case PGM_PROTECTION:
|
|
|
|
|
switch (prot) {
|
2017-06-07 10:45:22 +00:00
|
|
|
case PROT_TYPE_IEP:
|
|
|
|
|
tec->b61 = 1;
|
2020-03-11 04:51:32 +00:00
|
|
|
fallthrough;
|
2016-12-15 14:58:14 +00:00
|
|
|
case PROT_TYPE_LA:
|
|
|
|
|
tec->b56 = 1;
|
|
|
|
|
break;
|
|
|
|
|
case PROT_TYPE_KEYC:
|
|
|
|
|
tec->b60 = 1;
|
|
|
|
|
break;
|
2016-07-29 09:36:04 +00:00
|
|
|
case PROT_TYPE_ALC:
|
|
|
|
|
tec->b60 = 1;
|
2020-03-11 04:51:32 +00:00
|
|
|
fallthrough;
|
2016-07-29 09:36:04 +00:00
|
|
|
case PROT_TYPE_DAT:
|
|
|
|
|
tec->b61 = 1;
|
|
|
|
|
break;
|
|
|
|
|
}
|
2020-03-11 04:51:32 +00:00
|
|
|
fallthrough;
|
2016-05-31 17:56:46 +00:00
|
|
|
case PGM_ASCE_TYPE:
|
|
|
|
|
case PGM_PAGE_TRANSLATION:
|
|
|
|
|
case PGM_REGION_FIRST_TRANS:
|
|
|
|
|
case PGM_REGION_SECOND_TRANS:
|
|
|
|
|
case PGM_REGION_THIRD_TRANS:
|
|
|
|
|
case PGM_SEGMENT_TRANSLATION:
|
|
|
|
|
/*
|
|
|
|
|
* op_access_id only applies to MOVE_PAGE -> set bit 61
|
|
|
|
|
* exc_access_id has to be set to 0 for some instructions. Both
|
2016-07-29 09:36:04 +00:00
|
|
|
* cases have to be handled by the caller.
|
2016-05-31 17:56:46 +00:00
|
|
|
*/
|
|
|
|
|
tec->addr = gva >> PAGE_SHIFT;
|
|
|
|
|
tec->fsi = mode == GACC_STORE ? FSI_STORE : FSI_FETCH;
|
|
|
|
|
tec->as = psw_bits(vcpu->arch.sie_block->gpsw).as;
|
2020-03-11 04:51:32 +00:00
|
|
|
fallthrough;
|
2016-05-31 17:56:46 +00:00
|
|
|
case PGM_ALEN_TRANSLATION:
|
|
|
|
|
case PGM_ALE_SEQUENCE:
|
|
|
|
|
case PGM_ASTE_VALIDITY:
|
|
|
|
|
case PGM_ASTE_SEQUENCE:
|
|
|
|
|
case PGM_EXTENDED_AUTHORITY:
|
2016-07-29 09:36:04 +00:00
|
|
|
/*
|
|
|
|
|
* We can always store exc_access_id, as it is
|
|
|
|
|
* undefined for non-ar cases. It is undefined for
|
|
|
|
|
* most DAT protection exceptions.
|
|
|
|
|
*/
|
2016-05-31 17:56:46 +00:00
|
|
|
pgm->exc_access_id = ar;
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
return code;
|
|
|
|
|
}
|
|
|
|
|
|
2015-03-09 11:17:25 +00:00
|
|
|
static int get_vcpu_asce(struct kvm_vcpu *vcpu, union asce *asce,
|
2016-12-09 11:44:40 +00:00
|
|
|
unsigned long ga, u8 ar, enum gacc_mode mode)
|
2014-01-01 15:26:52 +00:00
|
|
|
{
|
2015-03-09 11:17:25 +00:00
|
|
|
int rc;
|
2015-11-16 14:48:59 +00:00
|
|
|
struct psw_bits psw = psw_bits(vcpu->arch.sie_block->gpsw);
|
2015-03-09 11:17:25 +00:00
|
|
|
|
2017-06-03 08:56:07 +00:00
|
|
|
if (!psw.dat) {
|
2015-03-09 11:17:25 +00:00
|
|
|
asce->val = 0;
|
|
|
|
|
asce->r = 1;
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
2017-06-03 08:19:55 +00:00
|
|
|
if ((mode == GACC_IFETCH) && (psw.as != PSW_BITS_AS_HOME))
|
|
|
|
|
psw.as = PSW_BITS_AS_PRIMARY;
|
2015-11-16 14:48:59 +00:00
|
|
|
|
|
|
|
|
switch (psw.as) {
|
2017-06-03 08:19:55 +00:00
|
|
|
case PSW_BITS_AS_PRIMARY:
|
2015-03-09 11:17:25 +00:00
|
|
|
asce->val = vcpu->arch.sie_block->gcr[1];
|
|
|
|
|
return 0;
|
2017-06-03 08:19:55 +00:00
|
|
|
case PSW_BITS_AS_SECONDARY:
|
2015-03-09 11:17:25 +00:00
|
|
|
asce->val = vcpu->arch.sie_block->gcr[7];
|
|
|
|
|
return 0;
|
2017-06-03 08:19:55 +00:00
|
|
|
case PSW_BITS_AS_HOME:
|
2015-03-09 11:17:25 +00:00
|
|
|
asce->val = vcpu->arch.sie_block->gcr[13];
|
|
|
|
|
return 0;
|
2017-06-03 08:19:55 +00:00
|
|
|
case PSW_BITS_AS_ACCREG:
|
2015-11-16 14:42:11 +00:00
|
|
|
rc = ar_translation(vcpu, asce, ar, mode);
|
2015-03-09 11:17:25 +00:00
|
|
|
if (rc > 0)
|
2016-05-31 18:21:03 +00:00
|
|
|
return trans_exc(vcpu, rc, ga, ar, mode, PROT_TYPE_ALC);
|
2015-03-09 11:17:25 +00:00
|
|
|
return rc;
|
2014-01-01 15:26:52 +00:00
|
|
|
}
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int deref_table(struct kvm *kvm, unsigned long gpa, unsigned long *val)
|
|
|
|
|
{
|
|
|
|
|
return kvm_read_guest(kvm, gpa, val, sizeof(*val));
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/**
|
|
|
|
|
* guest_translate - translate a guest virtual into a guest absolute address
|
|
|
|
|
* @vcpu: virtual cpu
|
|
|
|
|
* @gva: guest virtual address
|
|
|
|
|
* @gpa: points to where guest physical (absolute) address should be stored
|
2015-01-22 09:44:11 +00:00
|
|
|
* @asce: effective asce
|
2015-11-16 14:42:11 +00:00
|
|
|
* @mode: indicates the access mode to be used
|
2017-06-07 10:45:22 +00:00
|
|
|
* @prot: returns the type for protection exceptions
|
2014-01-01 15:26:52 +00:00
|
|
|
*
|
|
|
|
|
* Translate a guest virtual address into a guest absolute address by means
|
2015-02-26 22:16:44 +00:00
|
|
|
* of dynamic address translation as specified by the architecture.
|
2014-01-01 15:26:52 +00:00
|
|
|
* If the resulting absolute address is not available in the configuration
|
|
|
|
|
* an addressing exception is indicated and @gpa will not be changed.
|
|
|
|
|
*
|
|
|
|
|
* Returns: - zero on success; @gpa contains the resulting absolute address
|
|
|
|
|
* - a negative value if guest access failed due to e.g. broken
|
|
|
|
|
* guest mapping
|
|
|
|
|
* - a positve value if an access exception happened. In this case
|
|
|
|
|
* the returned value is the program interruption code as defined
|
|
|
|
|
* by the architecture
|
|
|
|
|
*/
|
|
|
|
|
static unsigned long guest_translate(struct kvm_vcpu *vcpu, unsigned long gva,
|
2015-01-22 09:44:11 +00:00
|
|
|
unsigned long *gpa, const union asce asce,
|
2017-06-07 10:45:22 +00:00
|
|
|
enum gacc_mode mode, enum prot_type *prot)
|
2014-01-01 15:26:52 +00:00
|
|
|
{
|
|
|
|
|
union vaddress vaddr = {.addr = gva};
|
|
|
|
|
union raddress raddr = {.addr = gva};
|
|
|
|
|
union page_table_entry pte;
|
|
|
|
|
int dat_protection = 0;
|
2017-06-07 10:45:22 +00:00
|
|
|
int iep_protection = 0;
|
2014-01-01 15:26:52 +00:00
|
|
|
union ctlreg0 ctlreg0;
|
|
|
|
|
unsigned long ptr;
|
2017-06-07 10:45:22 +00:00
|
|
|
int edat1, edat2, iep;
|
2014-01-01 15:26:52 +00:00
|
|
|
|
|
|
|
|
ctlreg0.val = vcpu->arch.sie_block->gcr[0];
|
2015-02-02 14:42:51 +00:00
|
|
|
edat1 = ctlreg0.edat && test_kvm_facility(vcpu->kvm, 8);
|
|
|
|
|
edat2 = edat1 && test_kvm_facility(vcpu->kvm, 78);
|
2017-06-07 10:45:22 +00:00
|
|
|
iep = ctlreg0.iep && test_kvm_facility(vcpu->kvm, 130);
|
2014-01-01 15:26:52 +00:00
|
|
|
if (asce.r)
|
|
|
|
|
goto real_address;
|
2017-07-05 05:37:14 +00:00
|
|
|
ptr = asce.origin * PAGE_SIZE;
|
2014-01-01 15:26:52 +00:00
|
|
|
switch (asce.dt) {
|
|
|
|
|
case ASCE_TYPE_REGION1:
|
|
|
|
|
if (vaddr.rfx01 > asce.tl)
|
|
|
|
|
return PGM_REGION_FIRST_TRANS;
|
|
|
|
|
ptr += vaddr.rfx * 8;
|
|
|
|
|
break;
|
|
|
|
|
case ASCE_TYPE_REGION2:
|
|
|
|
|
if (vaddr.rfx)
|
|
|
|
|
return PGM_ASCE_TYPE;
|
|
|
|
|
if (vaddr.rsx01 > asce.tl)
|
|
|
|
|
return PGM_REGION_SECOND_TRANS;
|
|
|
|
|
ptr += vaddr.rsx * 8;
|
|
|
|
|
break;
|
|
|
|
|
case ASCE_TYPE_REGION3:
|
|
|
|
|
if (vaddr.rfx || vaddr.rsx)
|
|
|
|
|
return PGM_ASCE_TYPE;
|
|
|
|
|
if (vaddr.rtx01 > asce.tl)
|
|
|
|
|
return PGM_REGION_THIRD_TRANS;
|
|
|
|
|
ptr += vaddr.rtx * 8;
|
|
|
|
|
break;
|
|
|
|
|
case ASCE_TYPE_SEGMENT:
|
|
|
|
|
if (vaddr.rfx || vaddr.rsx || vaddr.rtx)
|
|
|
|
|
return PGM_ASCE_TYPE;
|
|
|
|
|
if (vaddr.sx01 > asce.tl)
|
|
|
|
|
return PGM_SEGMENT_TRANSLATION;
|
|
|
|
|
ptr += vaddr.sx * 8;
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
switch (asce.dt) {
|
|
|
|
|
case ASCE_TYPE_REGION1: {
|
|
|
|
|
union region1_table_entry rfte;
|
|
|
|
|
|
|
|
|
|
if (kvm_is_error_gpa(vcpu->kvm, ptr))
|
|
|
|
|
return PGM_ADDRESSING;
|
|
|
|
|
if (deref_table(vcpu->kvm, ptr, &rfte.val))
|
|
|
|
|
return -EFAULT;
|
|
|
|
|
if (rfte.i)
|
|
|
|
|
return PGM_REGION_FIRST_TRANS;
|
|
|
|
|
if (rfte.tt != TABLE_TYPE_REGION1)
|
|
|
|
|
return PGM_TRANSLATION_SPEC;
|
|
|
|
|
if (vaddr.rsx01 < rfte.tf || vaddr.rsx01 > rfte.tl)
|
|
|
|
|
return PGM_REGION_SECOND_TRANS;
|
|
|
|
|
if (edat1)
|
|
|
|
|
dat_protection |= rfte.p;
|
2017-07-05 05:37:14 +00:00
|
|
|
ptr = rfte.rto * PAGE_SIZE + vaddr.rsx * 8;
|
2014-01-01 15:26:52 +00:00
|
|
|
}
|
2020-03-11 04:51:32 +00:00
|
|
|
fallthrough;
|
2014-01-01 15:26:52 +00:00
|
|
|
case ASCE_TYPE_REGION2: {
|
|
|
|
|
union region2_table_entry rste;
|
|
|
|
|
|
|
|
|
|
if (kvm_is_error_gpa(vcpu->kvm, ptr))
|
|
|
|
|
return PGM_ADDRESSING;
|
|
|
|
|
if (deref_table(vcpu->kvm, ptr, &rste.val))
|
|
|
|
|
return -EFAULT;
|
|
|
|
|
if (rste.i)
|
|
|
|
|
return PGM_REGION_SECOND_TRANS;
|
|
|
|
|
if (rste.tt != TABLE_TYPE_REGION2)
|
|
|
|
|
return PGM_TRANSLATION_SPEC;
|
|
|
|
|
if (vaddr.rtx01 < rste.tf || vaddr.rtx01 > rste.tl)
|
|
|
|
|
return PGM_REGION_THIRD_TRANS;
|
|
|
|
|
if (edat1)
|
|
|
|
|
dat_protection |= rste.p;
|
2017-07-05 05:37:14 +00:00
|
|
|
ptr = rste.rto * PAGE_SIZE + vaddr.rtx * 8;
|
2014-01-01 15:26:52 +00:00
|
|
|
}
|
2020-03-11 04:51:32 +00:00
|
|
|
fallthrough;
|
2014-01-01 15:26:52 +00:00
|
|
|
case ASCE_TYPE_REGION3: {
|
|
|
|
|
union region3_table_entry rtte;
|
|
|
|
|
|
|
|
|
|
if (kvm_is_error_gpa(vcpu->kvm, ptr))
|
|
|
|
|
return PGM_ADDRESSING;
|
|
|
|
|
if (deref_table(vcpu->kvm, ptr, &rtte.val))
|
|
|
|
|
return -EFAULT;
|
|
|
|
|
if (rtte.i)
|
|
|
|
|
return PGM_REGION_THIRD_TRANS;
|
|
|
|
|
if (rtte.tt != TABLE_TYPE_REGION3)
|
|
|
|
|
return PGM_TRANSLATION_SPEC;
|
|
|
|
|
if (rtte.cr && asce.p && edat2)
|
|
|
|
|
return PGM_TRANSLATION_SPEC;
|
|
|
|
|
if (rtte.fc && edat2) {
|
|
|
|
|
dat_protection |= rtte.fc1.p;
|
2017-06-07 10:45:22 +00:00
|
|
|
iep_protection = rtte.fc1.iep;
|
2014-01-01 15:26:52 +00:00
|
|
|
raddr.rfaa = rtte.fc1.rfaa;
|
|
|
|
|
goto absolute_address;
|
|
|
|
|
}
|
|
|
|
|
if (vaddr.sx01 < rtte.fc0.tf)
|
|
|
|
|
return PGM_SEGMENT_TRANSLATION;
|
|
|
|
|
if (vaddr.sx01 > rtte.fc0.tl)
|
|
|
|
|
return PGM_SEGMENT_TRANSLATION;
|
|
|
|
|
if (edat1)
|
|
|
|
|
dat_protection |= rtte.fc0.p;
|
2017-07-05 05:37:14 +00:00
|
|
|
ptr = rtte.fc0.sto * PAGE_SIZE + vaddr.sx * 8;
|
2014-01-01 15:26:52 +00:00
|
|
|
}
|
2020-03-11 04:51:32 +00:00
|
|
|
fallthrough;
|
2014-01-01 15:26:52 +00:00
|
|
|
case ASCE_TYPE_SEGMENT: {
|
|
|
|
|
union segment_table_entry ste;
|
|
|
|
|
|
|
|
|
|
if (kvm_is_error_gpa(vcpu->kvm, ptr))
|
|
|
|
|
return PGM_ADDRESSING;
|
|
|
|
|
if (deref_table(vcpu->kvm, ptr, &ste.val))
|
|
|
|
|
return -EFAULT;
|
|
|
|
|
if (ste.i)
|
|
|
|
|
return PGM_SEGMENT_TRANSLATION;
|
|
|
|
|
if (ste.tt != TABLE_TYPE_SEGMENT)
|
|
|
|
|
return PGM_TRANSLATION_SPEC;
|
|
|
|
|
if (ste.cs && asce.p)
|
|
|
|
|
return PGM_TRANSLATION_SPEC;
|
|
|
|
|
if (ste.fc && edat1) {
|
|
|
|
|
dat_protection |= ste.fc1.p;
|
2017-06-07 10:45:22 +00:00
|
|
|
iep_protection = ste.fc1.iep;
|
2014-01-01 15:26:52 +00:00
|
|
|
raddr.sfaa = ste.fc1.sfaa;
|
|
|
|
|
goto absolute_address;
|
|
|
|
|
}
|
|
|
|
|
dat_protection |= ste.fc0.p;
|
2017-07-05 05:37:14 +00:00
|
|
|
ptr = ste.fc0.pto * (PAGE_SIZE / 2) + vaddr.px * 8;
|
2014-01-01 15:26:52 +00:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
if (kvm_is_error_gpa(vcpu->kvm, ptr))
|
|
|
|
|
return PGM_ADDRESSING;
|
|
|
|
|
if (deref_table(vcpu->kvm, ptr, &pte.val))
|
|
|
|
|
return -EFAULT;
|
|
|
|
|
if (pte.i)
|
|
|
|
|
return PGM_PAGE_TRANSLATION;
|
|
|
|
|
if (pte.z)
|
|
|
|
|
return PGM_TRANSLATION_SPEC;
|
|
|
|
|
dat_protection |= pte.p;
|
2017-06-07 10:45:22 +00:00
|
|
|
iep_protection = pte.iep;
|
2014-01-01 15:26:52 +00:00
|
|
|
raddr.pfra = pte.pfra;
|
|
|
|
|
real_address:
|
|
|
|
|
raddr.addr = kvm_s390_real_to_abs(vcpu, raddr.addr);
|
|
|
|
|
absolute_address:
|
2017-06-07 10:45:22 +00:00
|
|
|
if (mode == GACC_STORE && dat_protection) {
|
|
|
|
|
*prot = PROT_TYPE_DAT;
|
2014-01-01 15:26:52 +00:00
|
|
|
return PGM_PROTECTION;
|
2017-06-07 10:45:22 +00:00
|
|
|
}
|
|
|
|
|
if (mode == GACC_IFETCH && iep_protection && iep) {
|
|
|
|
|
*prot = PROT_TYPE_IEP;
|
|
|
|
|
return PGM_PROTECTION;
|
|
|
|
|
}
|
2014-01-01 15:26:52 +00:00
|
|
|
if (kvm_is_error_gpa(vcpu->kvm, raddr.addr))
|
|
|
|
|
return PGM_ADDRESSING;
|
|
|
|
|
*gpa = raddr.addr;
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline int is_low_address(unsigned long ga)
|
|
|
|
|
{
|
|
|
|
|
/* Check for address ranges 0..511 and 4096..4607 */
|
|
|
|
|
return (ga & ~0x11fful) == 0;
|
|
|
|
|
}
|
|
|
|
|
|
2015-01-22 09:44:11 +00:00
|
|
|
static int low_address_protection_enabled(struct kvm_vcpu *vcpu,
|
|
|
|
|
const union asce asce)
|
2014-01-01 15:26:52 +00:00
|
|
|
{
|
|
|
|
|
union ctlreg0 ctlreg0 = {.val = vcpu->arch.sie_block->gcr[0]};
|
|
|
|
|
psw_t *psw = &vcpu->arch.sie_block->gpsw;
|
|
|
|
|
|
|
|
|
|
if (!ctlreg0.lap)
|
|
|
|
|
return 0;
|
2017-06-03 08:56:07 +00:00
|
|
|
if (psw_bits(*psw).dat && asce.p)
|
2014-01-01 15:26:52 +00:00
|
|
|
return 0;
|
|
|
|
|
return 1;
|
|
|
|
|
}
|
|
|
|
|
|
2016-12-09 11:44:40 +00:00
|
|
|
static int guest_page_range(struct kvm_vcpu *vcpu, unsigned long ga, u8 ar,
|
2014-01-01 15:26:52 +00:00
|
|
|
unsigned long *pages, unsigned long nr_pages,
|
2015-11-16 14:42:11 +00:00
|
|
|
const union asce asce, enum gacc_mode mode)
|
2014-01-01 15:26:52 +00:00
|
|
|
{
|
|
|
|
|
psw_t *psw = &vcpu->arch.sie_block->gpsw;
|
2016-05-31 18:13:35 +00:00
|
|
|
int lap_enabled, rc = 0;
|
2017-06-07 10:45:22 +00:00
|
|
|
enum prot_type prot;
|
2014-01-01 15:26:52 +00:00
|
|
|
|
2015-01-22 09:44:11 +00:00
|
|
|
lap_enabled = low_address_protection_enabled(vcpu, asce);
|
2014-01-01 15:26:52 +00:00
|
|
|
while (nr_pages) {
|
|
|
|
|
ga = kvm_s390_logical_to_effective(vcpu, ga);
|
2016-05-31 18:13:35 +00:00
|
|
|
if (mode == GACC_STORE && lap_enabled && is_low_address(ga))
|
|
|
|
|
return trans_exc(vcpu, PGM_PROTECTION, ga, ar, mode,
|
|
|
|
|
PROT_TYPE_LA);
|
2014-01-01 15:26:52 +00:00
|
|
|
ga &= PAGE_MASK;
|
2017-06-03 08:56:07 +00:00
|
|
|
if (psw_bits(*psw).dat) {
|
2017-06-07 10:45:22 +00:00
|
|
|
rc = guest_translate(vcpu, ga, pages, asce, mode, &prot);
|
2014-01-01 15:26:52 +00:00
|
|
|
if (rc < 0)
|
|
|
|
|
return rc;
|
|
|
|
|
} else {
|
|
|
|
|
*pages = kvm_s390_real_to_abs(vcpu, ga);
|
|
|
|
|
if (kvm_is_error_gpa(vcpu->kvm, *pages))
|
2016-05-31 18:13:35 +00:00
|
|
|
rc = PGM_ADDRESSING;
|
2014-01-01 15:26:52 +00:00
|
|
|
}
|
2016-05-31 18:13:35 +00:00
|
|
|
if (rc)
|
2017-06-07 10:45:22 +00:00
|
|
|
return trans_exc(vcpu, rc, ga, ar, mode, prot);
|
2014-01-01 15:26:52 +00:00
|
|
|
ga += PAGE_SIZE;
|
|
|
|
|
pages++;
|
|
|
|
|
nr_pages--;
|
|
|
|
|
}
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
2016-12-09 11:44:40 +00:00
|
|
|
int access_guest(struct kvm_vcpu *vcpu, unsigned long ga, u8 ar, void *data,
|
2015-11-16 14:42:11 +00:00
|
|
|
unsigned long len, enum gacc_mode mode)
|
2014-01-01 15:26:52 +00:00
|
|
|
{
|
|
|
|
|
psw_t *psw = &vcpu->arch.sie_block->gpsw;
|
|
|
|
|
unsigned long _len, nr_pages, gpa, idx;
|
|
|
|
|
unsigned long pages_array[2];
|
|
|
|
|
unsigned long *pages;
|
2014-01-10 13:33:28 +00:00
|
|
|
int need_ipte_lock;
|
|
|
|
|
union asce asce;
|
2014-01-01 15:26:52 +00:00
|
|
|
int rc;
|
|
|
|
|
|
|
|
|
|
if (!len)
|
|
|
|
|
return 0;
|
2016-05-31 17:44:10 +00:00
|
|
|
ga = kvm_s390_logical_to_effective(vcpu, ga);
|
|
|
|
|
rc = get_vcpu_asce(vcpu, &asce, ga, ar, mode);
|
2015-03-09 11:17:25 +00:00
|
|
|
if (rc)
|
|
|
|
|
return rc;
|
2014-01-01 15:26:52 +00:00
|
|
|
nr_pages = (((ga & ~PAGE_MASK) + len - 1) >> PAGE_SHIFT) + 1;
|
|
|
|
|
pages = pages_array;
|
|
|
|
|
if (nr_pages > ARRAY_SIZE(pages_array))
|
treewide: Use array_size() in vmalloc()
The vmalloc() function has no 2-factor argument form, so multiplication
factors need to be wrapped in array_size(). This patch replaces cases of:
vmalloc(a * b)
with:
vmalloc(array_size(a, b))
as well as handling cases of:
vmalloc(a * b * c)
with:
vmalloc(array3_size(a, b, c))
This does, however, attempt to ignore constant size factors like:
vmalloc(4 * 1024)
though any constants defined via macros get caught up in the conversion.
Any factors with a sizeof() of "unsigned char", "char", and "u8" were
dropped, since they're redundant.
The Coccinelle script used for this was:
// Fix redundant parens around sizeof().
@@
type TYPE;
expression THING, E;
@@
(
vmalloc(
- (sizeof(TYPE)) * E
+ sizeof(TYPE) * E
, ...)
|
vmalloc(
- (sizeof(THING)) * E
+ sizeof(THING) * E
, ...)
)
// Drop single-byte sizes and redundant parens.
@@
expression COUNT;
typedef u8;
typedef __u8;
@@
(
vmalloc(
- sizeof(u8) * (COUNT)
+ COUNT
, ...)
|
vmalloc(
- sizeof(__u8) * (COUNT)
+ COUNT
, ...)
|
vmalloc(
- sizeof(char) * (COUNT)
+ COUNT
, ...)
|
vmalloc(
- sizeof(unsigned char) * (COUNT)
+ COUNT
, ...)
|
vmalloc(
- sizeof(u8) * COUNT
+ COUNT
, ...)
|
vmalloc(
- sizeof(__u8) * COUNT
+ COUNT
, ...)
|
vmalloc(
- sizeof(char) * COUNT
+ COUNT
, ...)
|
vmalloc(
- sizeof(unsigned char) * COUNT
+ COUNT
, ...)
)
// 2-factor product with sizeof(type/expression) and identifier or constant.
@@
type TYPE;
expression THING;
identifier COUNT_ID;
constant COUNT_CONST;
@@
(
vmalloc(
- sizeof(TYPE) * (COUNT_ID)
+ array_size(COUNT_ID, sizeof(TYPE))
, ...)
|
vmalloc(
- sizeof(TYPE) * COUNT_ID
+ array_size(COUNT_ID, sizeof(TYPE))
, ...)
|
vmalloc(
- sizeof(TYPE) * (COUNT_CONST)
+ array_size(COUNT_CONST, sizeof(TYPE))
, ...)
|
vmalloc(
- sizeof(TYPE) * COUNT_CONST
+ array_size(COUNT_CONST, sizeof(TYPE))
, ...)
|
vmalloc(
- sizeof(THING) * (COUNT_ID)
+ array_size(COUNT_ID, sizeof(THING))
, ...)
|
vmalloc(
- sizeof(THING) * COUNT_ID
+ array_size(COUNT_ID, sizeof(THING))
, ...)
|
vmalloc(
- sizeof(THING) * (COUNT_CONST)
+ array_size(COUNT_CONST, sizeof(THING))
, ...)
|
vmalloc(
- sizeof(THING) * COUNT_CONST
+ array_size(COUNT_CONST, sizeof(THING))
, ...)
)
// 2-factor product, only identifiers.
@@
identifier SIZE, COUNT;
@@
vmalloc(
- SIZE * COUNT
+ array_size(COUNT, SIZE)
, ...)
// 3-factor product with 1 sizeof(type) or sizeof(expression), with
// redundant parens removed.
@@
expression THING;
identifier STRIDE, COUNT;
type TYPE;
@@
(
vmalloc(
- sizeof(TYPE) * (COUNT) * (STRIDE)
+ array3_size(COUNT, STRIDE, sizeof(TYPE))
, ...)
|
vmalloc(
- sizeof(TYPE) * (COUNT) * STRIDE
+ array3_size(COUNT, STRIDE, sizeof(TYPE))
, ...)
|
vmalloc(
- sizeof(TYPE) * COUNT * (STRIDE)
+ array3_size(COUNT, STRIDE, sizeof(TYPE))
, ...)
|
vmalloc(
- sizeof(TYPE) * COUNT * STRIDE
+ array3_size(COUNT, STRIDE, sizeof(TYPE))
, ...)
|
vmalloc(
- sizeof(THING) * (COUNT) * (STRIDE)
+ array3_size(COUNT, STRIDE, sizeof(THING))
, ...)
|
vmalloc(
- sizeof(THING) * (COUNT) * STRIDE
+ array3_size(COUNT, STRIDE, sizeof(THING))
, ...)
|
vmalloc(
- sizeof(THING) * COUNT * (STRIDE)
+ array3_size(COUNT, STRIDE, sizeof(THING))
, ...)
|
vmalloc(
- sizeof(THING) * COUNT * STRIDE
+ array3_size(COUNT, STRIDE, sizeof(THING))
, ...)
)
// 3-factor product with 2 sizeof(variable), with redundant parens removed.
@@
expression THING1, THING2;
identifier COUNT;
type TYPE1, TYPE2;
@@
(
vmalloc(
- sizeof(TYPE1) * sizeof(TYPE2) * COUNT
+ array3_size(COUNT, sizeof(TYPE1), sizeof(TYPE2))
, ...)
|
vmalloc(
- sizeof(TYPE1) * sizeof(THING2) * (COUNT)
+ array3_size(COUNT, sizeof(TYPE1), sizeof(TYPE2))
, ...)
|
vmalloc(
- sizeof(THING1) * sizeof(THING2) * COUNT
+ array3_size(COUNT, sizeof(THING1), sizeof(THING2))
, ...)
|
vmalloc(
- sizeof(THING1) * sizeof(THING2) * (COUNT)
+ array3_size(COUNT, sizeof(THING1), sizeof(THING2))
, ...)
|
vmalloc(
- sizeof(TYPE1) * sizeof(THING2) * COUNT
+ array3_size(COUNT, sizeof(TYPE1), sizeof(THING2))
, ...)
|
vmalloc(
- sizeof(TYPE1) * sizeof(THING2) * (COUNT)
+ array3_size(COUNT, sizeof(TYPE1), sizeof(THING2))
, ...)
)
// 3-factor product, only identifiers, with redundant parens removed.
@@
identifier STRIDE, SIZE, COUNT;
@@
(
vmalloc(
- (COUNT) * STRIDE * SIZE
+ array3_size(COUNT, STRIDE, SIZE)
, ...)
|
vmalloc(
- COUNT * (STRIDE) * SIZE
+ array3_size(COUNT, STRIDE, SIZE)
, ...)
|
vmalloc(
- COUNT * STRIDE * (SIZE)
+ array3_size(COUNT, STRIDE, SIZE)
, ...)
|
vmalloc(
- (COUNT) * (STRIDE) * SIZE
+ array3_size(COUNT, STRIDE, SIZE)
, ...)
|
vmalloc(
- COUNT * (STRIDE) * (SIZE)
+ array3_size(COUNT, STRIDE, SIZE)
, ...)
|
vmalloc(
- (COUNT) * STRIDE * (SIZE)
+ array3_size(COUNT, STRIDE, SIZE)
, ...)
|
vmalloc(
- (COUNT) * (STRIDE) * (SIZE)
+ array3_size(COUNT, STRIDE, SIZE)
, ...)
|
vmalloc(
- COUNT * STRIDE * SIZE
+ array3_size(COUNT, STRIDE, SIZE)
, ...)
)
// Any remaining multi-factor products, first at least 3-factor products
// when they're not all constants...
@@
expression E1, E2, E3;
constant C1, C2, C3;
@@
(
vmalloc(C1 * C2 * C3, ...)
|
vmalloc(
- E1 * E2 * E3
+ array3_size(E1, E2, E3)
, ...)
)
// And then all remaining 2 factors products when they're not all constants.
@@
expression E1, E2;
constant C1, C2;
@@
(
vmalloc(C1 * C2, ...)
|
vmalloc(
- E1 * E2
+ array_size(E1, E2)
, ...)
)
Signed-off-by: Kees Cook <keescook@chromium.org>
2018-06-12 21:27:11 +00:00
|
|
|
pages = vmalloc(array_size(nr_pages, sizeof(unsigned long)));
|
2014-01-01 15:26:52 +00:00
|
|
|
if (!pages)
|
|
|
|
|
return -ENOMEM;
|
2017-06-03 08:56:07 +00:00
|
|
|
need_ipte_lock = psw_bits(*psw).dat && !asce.r;
|
2014-01-10 13:33:28 +00:00
|
|
|
if (need_ipte_lock)
|
|
|
|
|
ipte_lock(vcpu);
|
2016-05-31 18:13:35 +00:00
|
|
|
rc = guest_page_range(vcpu, ga, ar, pages, nr_pages, asce, mode);
|
2014-01-01 15:26:52 +00:00
|
|
|
for (idx = 0; idx < nr_pages && !rc; idx++) {
|
|
|
|
|
gpa = *(pages + idx) + (ga & ~PAGE_MASK);
|
|
|
|
|
_len = min(PAGE_SIZE - (gpa & ~PAGE_MASK), len);
|
2015-11-16 14:42:11 +00:00
|
|
|
if (mode == GACC_STORE)
|
2014-01-01 15:26:52 +00:00
|
|
|
rc = kvm_write_guest(vcpu->kvm, gpa, data, _len);
|
|
|
|
|
else
|
|
|
|
|
rc = kvm_read_guest(vcpu->kvm, gpa, data, _len);
|
|
|
|
|
len -= _len;
|
|
|
|
|
ga += _len;
|
|
|
|
|
data += _len;
|
|
|
|
|
}
|
2014-01-10 13:33:28 +00:00
|
|
|
if (need_ipte_lock)
|
|
|
|
|
ipte_unlock(vcpu);
|
2014-01-01 15:26:52 +00:00
|
|
|
if (nr_pages > ARRAY_SIZE(pages_array))
|
|
|
|
|
vfree(pages);
|
|
|
|
|
return rc;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
int access_guest_real(struct kvm_vcpu *vcpu, unsigned long gra,
|
2015-11-16 14:42:11 +00:00
|
|
|
void *data, unsigned long len, enum gacc_mode mode)
|
2014-01-01 15:26:52 +00:00
|
|
|
{
|
|
|
|
|
unsigned long _len, gpa;
|
|
|
|
|
int rc = 0;
|
|
|
|
|
|
|
|
|
|
while (len && !rc) {
|
|
|
|
|
gpa = kvm_s390_real_to_abs(vcpu, gra);
|
|
|
|
|
_len = min(PAGE_SIZE - (gpa & ~PAGE_MASK), len);
|
2015-11-16 14:42:11 +00:00
|
|
|
if (mode)
|
2014-01-01 15:26:52 +00:00
|
|
|
rc = write_guest_abs(vcpu, gpa, data, _len);
|
|
|
|
|
else
|
|
|
|
|
rc = read_guest_abs(vcpu, gpa, data, _len);
|
|
|
|
|
len -= _len;
|
|
|
|
|
gra += _len;
|
|
|
|
|
data += _len;
|
|
|
|
|
}
|
|
|
|
|
return rc;
|
|
|
|
|
}
|
2014-03-03 22:34:42 +00:00
|
|
|
|
2014-02-04 13:43:25 +00:00
|
|
|
/**
|
|
|
|
|
* guest_translate_address - translate guest logical into guest absolute address
|
2021-09-10 08:04:20 +00:00
|
|
|
* @vcpu: virtual cpu
|
|
|
|
|
* @gva: Guest virtual address
|
|
|
|
|
* @ar: Access register
|
|
|
|
|
* @gpa: Guest physical address
|
|
|
|
|
* @mode: Translation access mode
|
2014-02-04 13:43:25 +00:00
|
|
|
*
|
|
|
|
|
* Parameter semantics are the same as the ones from guest_translate.
|
|
|
|
|
* The memory contents at the guest address are not changed.
|
|
|
|
|
*
|
|
|
|
|
* Note: The IPTE lock is not taken during this function, so the caller
|
|
|
|
|
* has to take care of this.
|
|
|
|
|
*/
|
2016-12-09 11:44:40 +00:00
|
|
|
int guest_translate_address(struct kvm_vcpu *vcpu, unsigned long gva, u8 ar,
|
2015-11-16 14:42:11 +00:00
|
|
|
unsigned long *gpa, enum gacc_mode mode)
|
2014-02-04 13:43:25 +00:00
|
|
|
{
|
|
|
|
|
psw_t *psw = &vcpu->arch.sie_block->gpsw;
|
2017-06-07 10:45:22 +00:00
|
|
|
enum prot_type prot;
|
2014-02-04 13:43:25 +00:00
|
|
|
union asce asce;
|
|
|
|
|
int rc;
|
|
|
|
|
|
|
|
|
|
gva = kvm_s390_logical_to_effective(vcpu, gva);
|
2016-05-31 17:44:10 +00:00
|
|
|
rc = get_vcpu_asce(vcpu, &asce, gva, ar, mode);
|
2015-03-09 11:17:25 +00:00
|
|
|
if (rc)
|
|
|
|
|
return rc;
|
2015-01-22 09:44:11 +00:00
|
|
|
if (is_low_address(gva) && low_address_protection_enabled(vcpu, asce)) {
|
2016-05-31 18:06:55 +00:00
|
|
|
if (mode == GACC_STORE)
|
|
|
|
|
return trans_exc(vcpu, PGM_PROTECTION, gva, 0,
|
|
|
|
|
mode, PROT_TYPE_LA);
|
2014-02-04 13:43:25 +00:00
|
|
|
}
|
|
|
|
|
|
2017-06-03 08:56:07 +00:00
|
|
|
if (psw_bits(*psw).dat && !asce.r) { /* Use DAT? */
|
2017-06-07 10:45:22 +00:00
|
|
|
rc = guest_translate(vcpu, gva, gpa, asce, mode, &prot);
|
2016-05-31 18:06:55 +00:00
|
|
|
if (rc > 0)
|
2017-06-07 10:45:22 +00:00
|
|
|
return trans_exc(vcpu, rc, gva, 0, mode, prot);
|
2014-02-04 13:43:25 +00:00
|
|
|
} else {
|
|
|
|
|
*gpa = kvm_s390_real_to_abs(vcpu, gva);
|
|
|
|
|
if (kvm_is_error_gpa(vcpu->kvm, *gpa))
|
2016-05-31 18:06:55 +00:00
|
|
|
return trans_exc(vcpu, rc, gva, PGM_ADDRESSING, mode, 0);
|
2014-02-04 13:43:25 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return rc;
|
|
|
|
|
}
|
|
|
|
|
|
2015-02-06 14:01:21 +00:00
|
|
|
/**
|
|
|
|
|
* check_gva_range - test a range of guest virtual addresses for accessibility
|
2021-09-10 08:04:20 +00:00
|
|
|
* @vcpu: virtual cpu
|
|
|
|
|
* @gva: Guest virtual address
|
|
|
|
|
* @ar: Access register
|
|
|
|
|
* @length: Length of test range
|
|
|
|
|
* @mode: Translation access mode
|
2015-02-06 14:01:21 +00:00
|
|
|
*/
|
2016-12-09 11:44:40 +00:00
|
|
|
int check_gva_range(struct kvm_vcpu *vcpu, unsigned long gva, u8 ar,
|
2015-11-16 14:42:11 +00:00
|
|
|
unsigned long length, enum gacc_mode mode)
|
2015-02-06 14:01:21 +00:00
|
|
|
{
|
|
|
|
|
unsigned long gpa;
|
|
|
|
|
unsigned long currlen;
|
|
|
|
|
int rc = 0;
|
|
|
|
|
|
|
|
|
|
ipte_lock(vcpu);
|
|
|
|
|
while (length > 0 && !rc) {
|
|
|
|
|
currlen = min(length, PAGE_SIZE - (gva % PAGE_SIZE));
|
2015-11-16 14:42:11 +00:00
|
|
|
rc = guest_translate_address(vcpu, gva, ar, &gpa, mode);
|
2015-02-06 14:01:21 +00:00
|
|
|
gva += currlen;
|
|
|
|
|
length -= currlen;
|
|
|
|
|
}
|
|
|
|
|
ipte_unlock(vcpu);
|
|
|
|
|
|
|
|
|
|
return rc;
|
|
|
|
|
}
|
|
|
|
|
|
2014-03-03 22:34:42 +00:00
|
|
|
/**
|
2015-03-03 11:26:14 +00:00
|
|
|
* kvm_s390_check_low_addr_prot_real - check for low-address protection
|
2021-09-10 08:04:20 +00:00
|
|
|
* @vcpu: virtual cpu
|
2015-03-03 11:26:14 +00:00
|
|
|
* @gra: Guest real address
|
2014-03-03 22:34:42 +00:00
|
|
|
*
|
|
|
|
|
* Checks whether an address is subject to low-address protection and set
|
|
|
|
|
* up vcpu->arch.pgm accordingly if necessary.
|
|
|
|
|
*
|
|
|
|
|
* Return: 0 if no protection exception, or PGM_PROTECTION if protected.
|
|
|
|
|
*/
|
2015-03-03 11:26:14 +00:00
|
|
|
int kvm_s390_check_low_addr_prot_real(struct kvm_vcpu *vcpu, unsigned long gra)
|
2014-03-03 22:34:42 +00:00
|
|
|
{
|
2015-03-03 11:26:14 +00:00
|
|
|
union ctlreg0 ctlreg0 = {.val = vcpu->arch.sie_block->gcr[0]};
|
2014-03-03 22:34:42 +00:00
|
|
|
|
2015-03-03 11:26:14 +00:00
|
|
|
if (!ctlreg0.lap || !is_low_address(gra))
|
2014-03-03 22:34:42 +00:00
|
|
|
return 0;
|
2016-05-31 18:00:33 +00:00
|
|
|
return trans_exc(vcpu, PGM_PROTECTION, gra, 0, GACC_STORE, PROT_TYPE_LA);
|
2014-03-03 22:34:42 +00:00
|
|
|
}
|
2016-03-08 11:16:35 +00:00
|
|
|
|
|
|
|
|
/**
|
|
|
|
|
* kvm_s390_shadow_tables - walk the guest page table and create shadow tables
|
|
|
|
|
* @sg: pointer to the shadow guest address space structure
|
|
|
|
|
* @saddr: faulting address in the shadow gmap
|
2021-02-01 16:26:54 +00:00
|
|
|
* @pgt: pointer to the beginning of the page table for the given address if
|
|
|
|
|
* successful (return value 0), or to the first invalid DAT entry in
|
|
|
|
|
* case of exceptions (return value > 0)
|
2021-09-10 08:04:20 +00:00
|
|
|
* @dat_protection: referenced memory is write protected
|
2016-04-18 11:24:52 +00:00
|
|
|
* @fake: pgt references contiguous guest memory block, not a pgtable
|
2016-03-08 11:16:35 +00:00
|
|
|
*/
|
|
|
|
|
static int kvm_s390_shadow_tables(struct gmap *sg, unsigned long saddr,
|
2016-04-18 11:24:52 +00:00
|
|
|
unsigned long *pgt, int *dat_protection,
|
|
|
|
|
int *fake)
|
2016-03-08 11:16:35 +00:00
|
|
|
{
|
|
|
|
|
struct gmap *parent;
|
|
|
|
|
union asce asce;
|
|
|
|
|
union vaddress vaddr;
|
|
|
|
|
unsigned long ptr;
|
|
|
|
|
int rc;
|
|
|
|
|
|
2016-04-18 11:24:52 +00:00
|
|
|
*fake = 0;
|
2016-04-18 15:46:21 +00:00
|
|
|
*dat_protection = 0;
|
2016-03-08 11:16:35 +00:00
|
|
|
parent = sg->parent;
|
|
|
|
|
vaddr.addr = saddr;
|
|
|
|
|
asce.val = sg->orig_asce;
|
2017-07-05 05:37:14 +00:00
|
|
|
ptr = asce.origin * PAGE_SIZE;
|
2016-04-18 14:22:24 +00:00
|
|
|
if (asce.r) {
|
|
|
|
|
*fake = 1;
|
2017-06-19 06:02:28 +00:00
|
|
|
ptr = 0;
|
2016-04-18 14:22:24 +00:00
|
|
|
asce.dt = ASCE_TYPE_REGION1;
|
|
|
|
|
}
|
2016-03-08 11:16:35 +00:00
|
|
|
switch (asce.dt) {
|
|
|
|
|
case ASCE_TYPE_REGION1:
|
2017-06-19 06:02:28 +00:00
|
|
|
if (vaddr.rfx01 > asce.tl && !*fake)
|
2016-03-08 11:16:35 +00:00
|
|
|
return PGM_REGION_FIRST_TRANS;
|
|
|
|
|
break;
|
|
|
|
|
case ASCE_TYPE_REGION2:
|
|
|
|
|
if (vaddr.rfx)
|
|
|
|
|
return PGM_ASCE_TYPE;
|
|
|
|
|
if (vaddr.rsx01 > asce.tl)
|
|
|
|
|
return PGM_REGION_SECOND_TRANS;
|
|
|
|
|
break;
|
|
|
|
|
case ASCE_TYPE_REGION3:
|
|
|
|
|
if (vaddr.rfx || vaddr.rsx)
|
|
|
|
|
return PGM_ASCE_TYPE;
|
|
|
|
|
if (vaddr.rtx01 > asce.tl)
|
|
|
|
|
return PGM_REGION_THIRD_TRANS;
|
|
|
|
|
break;
|
|
|
|
|
case ASCE_TYPE_SEGMENT:
|
|
|
|
|
if (vaddr.rfx || vaddr.rsx || vaddr.rtx)
|
|
|
|
|
return PGM_ASCE_TYPE;
|
|
|
|
|
if (vaddr.sx01 > asce.tl)
|
|
|
|
|
return PGM_SEGMENT_TRANSLATION;
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
switch (asce.dt) {
|
|
|
|
|
case ASCE_TYPE_REGION1: {
|
|
|
|
|
union region1_table_entry rfte;
|
|
|
|
|
|
2016-04-18 14:22:24 +00:00
|
|
|
if (*fake) {
|
2017-07-05 05:37:14 +00:00
|
|
|
ptr += vaddr.rfx * _REGION1_SIZE;
|
2016-04-18 14:22:24 +00:00
|
|
|
rfte.val = ptr;
|
|
|
|
|
goto shadow_r2t;
|
|
|
|
|
}
|
2021-02-01 16:26:54 +00:00
|
|
|
*pgt = ptr + vaddr.rfx * 8;
|
2016-03-08 11:16:35 +00:00
|
|
|
rc = gmap_read_table(parent, ptr + vaddr.rfx * 8, &rfte.val);
|
|
|
|
|
if (rc)
|
|
|
|
|
return rc;
|
|
|
|
|
if (rfte.i)
|
|
|
|
|
return PGM_REGION_FIRST_TRANS;
|
|
|
|
|
if (rfte.tt != TABLE_TYPE_REGION1)
|
|
|
|
|
return PGM_TRANSLATION_SPEC;
|
|
|
|
|
if (vaddr.rsx01 < rfte.tf || vaddr.rsx01 > rfte.tl)
|
|
|
|
|
return PGM_REGION_SECOND_TRANS;
|
2016-04-18 15:46:21 +00:00
|
|
|
if (sg->edat_level >= 1)
|
|
|
|
|
*dat_protection |= rfte.p;
|
2017-07-05 05:37:14 +00:00
|
|
|
ptr = rfte.rto * PAGE_SIZE;
|
2016-04-18 14:22:24 +00:00
|
|
|
shadow_r2t:
|
|
|
|
|
rc = gmap_shadow_r2t(sg, saddr, rfte.val, *fake);
|
2016-03-08 11:16:35 +00:00
|
|
|
if (rc)
|
|
|
|
|
return rc;
|
2020-03-11 04:51:32 +00:00
|
|
|
}
|
|
|
|
|
fallthrough;
|
2016-03-08 11:16:35 +00:00
|
|
|
case ASCE_TYPE_REGION2: {
|
|
|
|
|
union region2_table_entry rste;
|
|
|
|
|
|
2016-04-18 14:22:24 +00:00
|
|
|
if (*fake) {
|
2017-07-05 05:37:14 +00:00
|
|
|
ptr += vaddr.rsx * _REGION2_SIZE;
|
2016-04-18 14:22:24 +00:00
|
|
|
rste.val = ptr;
|
|
|
|
|
goto shadow_r3t;
|
|
|
|
|
}
|
2021-02-01 16:26:54 +00:00
|
|
|
*pgt = ptr + vaddr.rsx * 8;
|
2016-03-08 11:16:35 +00:00
|
|
|
rc = gmap_read_table(parent, ptr + vaddr.rsx * 8, &rste.val);
|
|
|
|
|
if (rc)
|
|
|
|
|
return rc;
|
|
|
|
|
if (rste.i)
|
|
|
|
|
return PGM_REGION_SECOND_TRANS;
|
|
|
|
|
if (rste.tt != TABLE_TYPE_REGION2)
|
|
|
|
|
return PGM_TRANSLATION_SPEC;
|
|
|
|
|
if (vaddr.rtx01 < rste.tf || vaddr.rtx01 > rste.tl)
|
|
|
|
|
return PGM_REGION_THIRD_TRANS;
|
2016-04-18 15:46:21 +00:00
|
|
|
if (sg->edat_level >= 1)
|
|
|
|
|
*dat_protection |= rste.p;
|
2017-07-05 05:37:14 +00:00
|
|
|
ptr = rste.rto * PAGE_SIZE;
|
2016-04-18 14:22:24 +00:00
|
|
|
shadow_r3t:
|
2016-04-18 15:46:21 +00:00
|
|
|
rste.p |= *dat_protection;
|
2016-04-18 14:22:24 +00:00
|
|
|
rc = gmap_shadow_r3t(sg, saddr, rste.val, *fake);
|
2016-03-08 11:16:35 +00:00
|
|
|
if (rc)
|
|
|
|
|
return rc;
|
2020-03-11 04:51:32 +00:00
|
|
|
}
|
|
|
|
|
fallthrough;
|
2016-03-08 11:16:35 +00:00
|
|
|
case ASCE_TYPE_REGION3: {
|
|
|
|
|
union region3_table_entry rtte;
|
|
|
|
|
|
2016-04-18 14:22:24 +00:00
|
|
|
if (*fake) {
|
2017-07-05 05:37:14 +00:00
|
|
|
ptr += vaddr.rtx * _REGION3_SIZE;
|
2016-04-18 14:22:24 +00:00
|
|
|
rtte.val = ptr;
|
|
|
|
|
goto shadow_sgt;
|
|
|
|
|
}
|
2021-02-01 16:26:54 +00:00
|
|
|
*pgt = ptr + vaddr.rtx * 8;
|
2016-03-08 11:16:35 +00:00
|
|
|
rc = gmap_read_table(parent, ptr + vaddr.rtx * 8, &rtte.val);
|
|
|
|
|
if (rc)
|
|
|
|
|
return rc;
|
|
|
|
|
if (rtte.i)
|
|
|
|
|
return PGM_REGION_THIRD_TRANS;
|
|
|
|
|
if (rtte.tt != TABLE_TYPE_REGION3)
|
|
|
|
|
return PGM_TRANSLATION_SPEC;
|
2016-04-18 11:42:05 +00:00
|
|
|
if (rtte.cr && asce.p && sg->edat_level >= 2)
|
|
|
|
|
return PGM_TRANSLATION_SPEC;
|
|
|
|
|
if (rtte.fc && sg->edat_level >= 2) {
|
2016-04-18 15:46:21 +00:00
|
|
|
*dat_protection |= rtte.fc0.p;
|
2016-04-18 11:42:05 +00:00
|
|
|
*fake = 1;
|
2017-07-05 05:37:14 +00:00
|
|
|
ptr = rtte.fc1.rfaa * _REGION3_SIZE;
|
2016-04-18 11:42:05 +00:00
|
|
|
rtte.val = ptr;
|
|
|
|
|
goto shadow_sgt;
|
|
|
|
|
}
|
2016-03-08 11:16:35 +00:00
|
|
|
if (vaddr.sx01 < rtte.fc0.tf || vaddr.sx01 > rtte.fc0.tl)
|
|
|
|
|
return PGM_SEGMENT_TRANSLATION;
|
2016-04-18 15:46:21 +00:00
|
|
|
if (sg->edat_level >= 1)
|
|
|
|
|
*dat_protection |= rtte.fc0.p;
|
2017-07-05 05:37:14 +00:00
|
|
|
ptr = rtte.fc0.sto * PAGE_SIZE;
|
2016-04-18 11:42:05 +00:00
|
|
|
shadow_sgt:
|
2016-04-18 15:46:21 +00:00
|
|
|
rtte.fc0.p |= *dat_protection;
|
2016-04-18 11:42:05 +00:00
|
|
|
rc = gmap_shadow_sgt(sg, saddr, rtte.val, *fake);
|
2016-03-08 11:16:35 +00:00
|
|
|
if (rc)
|
|
|
|
|
return rc;
|
2020-03-11 04:51:32 +00:00
|
|
|
}
|
|
|
|
|
fallthrough;
|
2016-03-08 11:16:35 +00:00
|
|
|
case ASCE_TYPE_SEGMENT: {
|
|
|
|
|
union segment_table_entry ste;
|
|
|
|
|
|
2016-04-18 11:42:05 +00:00
|
|
|
if (*fake) {
|
2017-07-05 05:37:14 +00:00
|
|
|
ptr += vaddr.sx * _SEGMENT_SIZE;
|
2016-04-18 11:42:05 +00:00
|
|
|
ste.val = ptr;
|
|
|
|
|
goto shadow_pgt;
|
|
|
|
|
}
|
2021-02-01 16:26:54 +00:00
|
|
|
*pgt = ptr + vaddr.sx * 8;
|
2016-03-08 11:16:35 +00:00
|
|
|
rc = gmap_read_table(parent, ptr + vaddr.sx * 8, &ste.val);
|
|
|
|
|
if (rc)
|
|
|
|
|
return rc;
|
|
|
|
|
if (ste.i)
|
|
|
|
|
return PGM_SEGMENT_TRANSLATION;
|
|
|
|
|
if (ste.tt != TABLE_TYPE_SEGMENT)
|
|
|
|
|
return PGM_TRANSLATION_SPEC;
|
|
|
|
|
if (ste.cs && asce.p)
|
|
|
|
|
return PGM_TRANSLATION_SPEC;
|
2016-04-18 15:46:21 +00:00
|
|
|
*dat_protection |= ste.fc0.p;
|
2016-04-18 11:24:52 +00:00
|
|
|
if (ste.fc && sg->edat_level >= 1) {
|
|
|
|
|
*fake = 1;
|
2017-07-05 05:37:14 +00:00
|
|
|
ptr = ste.fc1.sfaa * _SEGMENT_SIZE;
|
2016-04-18 11:24:52 +00:00
|
|
|
ste.val = ptr;
|
|
|
|
|
goto shadow_pgt;
|
|
|
|
|
}
|
2017-07-05 05:37:14 +00:00
|
|
|
ptr = ste.fc0.pto * (PAGE_SIZE / 2);
|
2016-04-18 11:24:52 +00:00
|
|
|
shadow_pgt:
|
2016-04-18 15:46:21 +00:00
|
|
|
ste.fc0.p |= *dat_protection;
|
2016-04-18 11:24:52 +00:00
|
|
|
rc = gmap_shadow_pgt(sg, saddr, ste.val, *fake);
|
2016-03-08 11:16:35 +00:00
|
|
|
if (rc)
|
|
|
|
|
return rc;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
/* Return the parent address of the page table */
|
|
|
|
|
*pgt = ptr;
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/**
|
|
|
|
|
* kvm_s390_shadow_fault - handle fault on a shadow page table
|
2016-01-27 16:24:03 +00:00
|
|
|
* @vcpu: virtual cpu
|
2016-03-08 11:16:35 +00:00
|
|
|
* @sg: pointer to the shadow guest address space structure
|
|
|
|
|
* @saddr: faulting address in the shadow gmap
|
2021-02-01 16:26:54 +00:00
|
|
|
* @datptr: will contain the address of the faulting DAT table entry, or of
|
|
|
|
|
* the valid leaf, plus some flags
|
2016-03-08 11:16:35 +00:00
|
|
|
*
|
|
|
|
|
* Returns: - 0 if the shadow fault was successfully resolved
|
|
|
|
|
* - > 0 (pgm exception code) on exceptions while faulting
|
|
|
|
|
* - -EAGAIN if the caller can retry immediately
|
|
|
|
|
* - -EFAULT when accessing invalid guest addresses
|
|
|
|
|
* - -ENOMEM if out of memory
|
|
|
|
|
*/
|
2016-01-27 16:24:03 +00:00
|
|
|
int kvm_s390_shadow_fault(struct kvm_vcpu *vcpu, struct gmap *sg,
|
2021-02-01 16:26:54 +00:00
|
|
|
unsigned long saddr, unsigned long *datptr)
|
2016-03-08 11:16:35 +00:00
|
|
|
{
|
|
|
|
|
union vaddress vaddr;
|
|
|
|
|
union page_table_entry pte;
|
2021-02-01 16:26:54 +00:00
|
|
|
unsigned long pgt = 0;
|
2016-04-18 11:24:52 +00:00
|
|
|
int dat_protection, fake;
|
2016-03-08 11:16:35 +00:00
|
|
|
int rc;
|
|
|
|
|
|
2020-06-09 04:33:25 +00:00
|
|
|
mmap_read_lock(sg->mm);
|
2016-01-27 16:24:03 +00:00
|
|
|
/*
|
|
|
|
|
* We don't want any guest-2 tables to change - so the parent
|
|
|
|
|
* tables/pointers we read stay valid - unshadowing is however
|
|
|
|
|
* always possible - only guest_table_lock protects us.
|
|
|
|
|
*/
|
|
|
|
|
ipte_lock(vcpu);
|
2016-02-02 11:26:00 +00:00
|
|
|
|
2016-04-18 11:24:52 +00:00
|
|
|
rc = gmap_shadow_pgt_lookup(sg, saddr, &pgt, &dat_protection, &fake);
|
2016-02-02 11:26:00 +00:00
|
|
|
if (rc)
|
2016-04-18 11:24:52 +00:00
|
|
|
rc = kvm_s390_shadow_tables(sg, saddr, &pgt, &dat_protection,
|
|
|
|
|
&fake);
|
2016-03-08 11:16:35 +00:00
|
|
|
|
|
|
|
|
vaddr.addr = saddr;
|
2016-04-18 11:24:52 +00:00
|
|
|
if (fake) {
|
2017-07-05 05:37:14 +00:00
|
|
|
pte.val = pgt + vaddr.px * PAGE_SIZE;
|
2016-04-18 11:24:52 +00:00
|
|
|
goto shadow_page;
|
|
|
|
|
}
|
2021-02-01 16:26:54 +00:00
|
|
|
|
|
|
|
|
switch (rc) {
|
|
|
|
|
case PGM_SEGMENT_TRANSLATION:
|
|
|
|
|
case PGM_REGION_THIRD_TRANS:
|
|
|
|
|
case PGM_REGION_SECOND_TRANS:
|
|
|
|
|
case PGM_REGION_FIRST_TRANS:
|
|
|
|
|
pgt |= PEI_NOT_PTE;
|
|
|
|
|
break;
|
|
|
|
|
case 0:
|
|
|
|
|
pgt += vaddr.px * 8;
|
|
|
|
|
rc = gmap_read_table(sg->parent, pgt, &pte.val);
|
|
|
|
|
}
|
|
|
|
|
if (datptr)
|
|
|
|
|
*datptr = pgt | dat_protection * PEI_DAT_PROT;
|
2016-02-02 11:26:00 +00:00
|
|
|
if (!rc && pte.i)
|
|
|
|
|
rc = PGM_PAGE_TRANSLATION;
|
2017-03-31 10:50:48 +00:00
|
|
|
if (!rc && pte.z)
|
2016-02-02 11:26:00 +00:00
|
|
|
rc = PGM_TRANSLATION_SPEC;
|
2016-04-18 11:24:52 +00:00
|
|
|
shadow_page:
|
2016-04-18 15:19:59 +00:00
|
|
|
pte.p |= dat_protection;
|
2016-02-02 11:26:00 +00:00
|
|
|
if (!rc)
|
|
|
|
|
rc = gmap_shadow_page(sg, saddr, __pte(pte.val));
|
2016-01-27 16:24:03 +00:00
|
|
|
ipte_unlock(vcpu);
|
2020-06-09 04:33:25 +00:00
|
|
|
mmap_read_unlock(sg->mm);
|
2016-02-02 11:26:00 +00:00
|
|
|
return rc;
|
2016-03-08 11:16:35 +00:00
|
|
|
}
|
