2012-04-11 02:34:33 +00:00
|
|
|
* Marvell sdhci-pxa v2/v3 controller
|
|
|
|
|
|
|
|
This file documents differences between the core properties in mmc.txt
|
|
|
|
and the properties used by the sdhci-pxav2 and sdhci-pxav3 drivers.
|
|
|
|
|
|
|
|
Required properties:
|
2014-02-18 15:08:29 +00:00
|
|
|
- compatible: Should be "mrvl,pxav2-mmc", "mrvl,pxav3-mmc" or
|
|
|
|
"marvell,armada-380-sdhci".
|
|
|
|
- reg:
|
|
|
|
* for "mrvl,pxav2-mmc" and "mrvl,pxav3-mmc", one register area for
|
|
|
|
the SDHCI registers.
|
2015-01-29 11:36:26 +00:00
|
|
|
|
|
|
|
* for "marvell,armada-380-sdhci", three register areas. The first
|
|
|
|
one for the SDHCI registers themselves, the second one for the
|
|
|
|
AXI/Mbus bridge registers of the SDHCI unit, the third one for the
|
|
|
|
SDIO3 Configuration register
|
|
|
|
- reg names: should be "sdhci", "mbus", "conf-sdio3". only mandatory
|
|
|
|
for "marvell,armada-380-sdhci"
|
2014-10-21 09:22:41 +00:00
|
|
|
- clocks: Array of clocks required for SDHCI; requires at least one for
|
|
|
|
I/O clock.
|
|
|
|
- clock-names: Array of names corresponding to clocks property; shall be
|
|
|
|
"io" for I/O clock and "core" for optional core clock.
|
2012-04-11 02:34:33 +00:00
|
|
|
|
|
|
|
Optional properties:
|
|
|
|
- mrvl,clk-delay-cycles: Specify a number of cycles to delay for tuning.
|
|
|
|
|
|
|
|
Example:
|
|
|
|
|
|
|
|
sdhci@d4280800 {
|
|
|
|
compatible = "mrvl,pxav3-mmc";
|
|
|
|
reg = <0xd4280800 0x800>;
|
|
|
|
bus-width = <8>;
|
|
|
|
interrupts = <27>;
|
2014-10-21 09:22:41 +00:00
|
|
|
clocks = <&chip CLKID_SDIO1XIN>, <&chip CLKID_SDIO1>;
|
|
|
|
clock-names = "io", "core";
|
2012-04-11 02:34:33 +00:00
|
|
|
non-removable;
|
|
|
|
mrvl,clk-delay-cycles = <31>;
|
|
|
|
};
|
2014-02-18 15:08:29 +00:00
|
|
|
|
|
|
|
sdhci@d8000 {
|
|
|
|
compatible = "marvell,armada-380-sdhci";
|
2015-01-29 11:36:26 +00:00
|
|
|
reg-names = "sdhci", "mbus", "conf-sdio3";
|
|
|
|
reg = <0xd8000 0x1000>,
|
|
|
|
<0xdc000 0x100>;
|
|
|
|
<0x18454 0x4>;
|
2014-02-18 15:08:29 +00:00
|
|
|
interrupts = <0 25 0x4>;
|
|
|
|
clocks = <&gateclk 17>;
|
2014-10-21 09:22:41 +00:00
|
|
|
clock-names = "io";
|
2014-02-18 15:08:29 +00:00
|
|
|
mrvl,clk-delay-cycles = <0x1F>;
|
|
|
|
};
|