2013-09-26 20:43:52 +00:00
|
|
|
/*
|
|
|
|
* Copyright 2013 Freescale Semiconductor, Inc.
|
|
|
|
*
|
|
|
|
* Author: Fabio Estevam <fabio.estevam@freescale.com>
|
|
|
|
*
|
|
|
|
* This program is free software; you can redistribute it and/or modify
|
|
|
|
* it under the terms of the GNU General Public License version 2 as
|
|
|
|
* published by the Free Software Foundation.
|
|
|
|
*
|
|
|
|
*/
|
|
|
|
|
|
|
|
/dts-v1/;
|
|
|
|
#include "imx6q.dtsi"
|
|
|
|
|
|
|
|
/ {
|
|
|
|
model = "Udoo i.MX6 Quad Board";
|
|
|
|
compatible = "udoo,imx6q-udoo", "fsl,imx6q";
|
|
|
|
|
2014-05-07 13:19:00 +00:00
|
|
|
chosen {
|
|
|
|
stdout-path = &uart2;
|
|
|
|
};
|
|
|
|
|
2013-09-26 20:43:52 +00:00
|
|
|
memory {
|
|
|
|
reg = <0x10000000 0x40000000>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
2013-11-12 15:40:23 +00:00
|
|
|
&fec {
|
|
|
|
pinctrl-names = "default";
|
|
|
|
pinctrl-0 = <&pinctrl_enet>;
|
|
|
|
phy-mode = "rgmii";
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
2013-10-23 07:36:09 +00:00
|
|
|
&iomuxc {
|
|
|
|
imx6q-udoo {
|
2013-11-12 15:40:23 +00:00
|
|
|
pinctrl_enet: enetgrp {
|
|
|
|
fsl,pins = <
|
|
|
|
MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
|
|
|
|
MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
|
|
|
|
MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
|
|
|
|
MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
|
|
|
|
MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
|
|
|
|
MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
|
|
|
|
MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
|
|
|
|
MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
|
|
|
|
MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
|
|
|
|
MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
|
|
|
|
MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
|
|
|
|
MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
|
|
|
|
MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
|
|
|
|
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
|
|
|
|
MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
|
|
|
|
MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
|
|
|
|
>;
|
|
|
|
};
|
|
|
|
|
2013-10-23 07:36:09 +00:00
|
|
|
pinctrl_uart2: uart2grp {
|
|
|
|
fsl,pins = <
|
|
|
|
MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1
|
|
|
|
MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
|
|
|
|
>;
|
|
|
|
};
|
|
|
|
|
|
|
|
pinctrl_usdhc3: usdhc3grp {
|
|
|
|
fsl,pins = <
|
|
|
|
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
|
|
|
|
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
|
|
|
|
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
|
|
|
|
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
|
|
|
|
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
|
|
|
|
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
|
|
|
|
>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
2013-09-26 20:43:52 +00:00
|
|
|
&sata {
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&uart2 {
|
|
|
|
pinctrl-names = "default";
|
2013-10-23 07:36:09 +00:00
|
|
|
pinctrl-0 = <&pinctrl_uart2>;
|
2013-09-26 20:43:52 +00:00
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&usdhc3 {
|
|
|
|
pinctrl-names = "default";
|
2013-10-23 07:36:09 +00:00
|
|
|
pinctrl-0 = <&pinctrl_usdhc3>;
|
2013-09-26 20:43:52 +00:00
|
|
|
non-removable;
|
|
|
|
status = "okay";
|
|
|
|
};
|