media: dt-bindings: convert CODA VPU bindings to yaml
Convert to YAML and add generic IP core compatibles "cnm,codadx6",
"cnm,codahx4", "cnm,coda7541", and "cnm,coda960" in addition to the SoC
specific compatibles. The new generic compatibles are already used in
the SoC device trees and replace the free form comments. For example:
- compatible : should be "fsl,<chip>-src" for i.MX SoCs:
(a) "fsl,imx27-vpu" for CodaDx6 present in i.MX27
turns into:
properties:
compatible:
oneOf:
- items:
- const: fsl,imx27-vpu
- const: cnm,codadx6
This allows to properly specify the secondary JPEG unit interrupt that
is only present on cnm,coda960.
Also add the missing "fsl,imx6dl-vpu", "cnm,coda960" compatible.
The AXI bus connection to the internal SRAM is different between i.MX6Q
and i.MX6DL, which requires the driver to load a different firmware
depending on the SoC.
Further, specify the power-domain property for i.MX6 and change the
clock order from "ahb", "per" to "per", "ahb". This order is currently
used in all SoC device trees.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
2020-09-23 08:21:12 +00:00
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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/media/coda.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Chips&Media Coda multi-standard codec IP
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maintainers:
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- Philipp Zabel <p.zabel@pengutronix.de>
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description: |-
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Coda codec IPs are present in i.MX SoCs in various versions,
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called VPU (Video Processing Unit).
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properties:
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compatible:
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oneOf:
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- items:
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- const: fsl,imx27-vpu
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- const: cnm,codadx6
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- items:
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- const: fsl,imx51-vpu
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- const: cnm,codahx4
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- items:
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- const: fsl,imx53-vpu
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- const: cnm,coda7541
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- items:
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- enum:
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- fsl,imx6dl-vpu
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- fsl,imx6q-vpu
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- const: cnm,coda960
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reg:
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maxItems: 1
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clocks:
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items:
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- description: PER clock
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- description: AHB interface clock
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clock-names:
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items:
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- const: per
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- const: ahb
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2020-11-17 20:07:52 +00:00
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interrupts:
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minItems: 1
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items:
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- description: BIT processor interrupt
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- description: JPEG unit interrupt
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interrupt-names:
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minItems: 1
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items:
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- const: bit
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- const: jpeg
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power-domains:
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maxItems: 1
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media: dt-bindings: convert CODA VPU bindings to yaml
Convert to YAML and add generic IP core compatibles "cnm,codadx6",
"cnm,codahx4", "cnm,coda7541", and "cnm,coda960" in addition to the SoC
specific compatibles. The new generic compatibles are already used in
the SoC device trees and replace the free form comments. For example:
- compatible : should be "fsl,<chip>-src" for i.MX SoCs:
(a) "fsl,imx27-vpu" for CodaDx6 present in i.MX27
turns into:
properties:
compatible:
oneOf:
- items:
- const: fsl,imx27-vpu
- const: cnm,codadx6
This allows to properly specify the secondary JPEG unit interrupt that
is only present on cnm,coda960.
Also add the missing "fsl,imx6dl-vpu", "cnm,coda960" compatible.
The AXI bus connection to the internal SRAM is different between i.MX6Q
and i.MX6DL, which requires the driver to load a different firmware
depending on the SoC.
Further, specify the power-domain property for i.MX6 and change the
clock order from "ahb", "per" to "per", "ahb". This order is currently
used in all SoC device trees.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
2020-09-23 08:21:12 +00:00
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resets:
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maxItems: 1
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iram:
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$ref: /schemas/types.yaml#/definitions/phandle
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description: phandle pointing to the SRAM device node
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maxItems: 1
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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- clock-names
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2020-11-17 20:07:52 +00:00
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additionalProperties: false
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media: dt-bindings: convert CODA VPU bindings to yaml
Convert to YAML and add generic IP core compatibles "cnm,codadx6",
"cnm,codahx4", "cnm,coda7541", and "cnm,coda960" in addition to the SoC
specific compatibles. The new generic compatibles are already used in
the SoC device trees and replace the free form comments. For example:
- compatible : should be "fsl,<chip>-src" for i.MX SoCs:
(a) "fsl,imx27-vpu" for CodaDx6 present in i.MX27
turns into:
properties:
compatible:
oneOf:
- items:
- const: fsl,imx27-vpu
- const: cnm,codadx6
This allows to properly specify the secondary JPEG unit interrupt that
is only present on cnm,coda960.
Also add the missing "fsl,imx6dl-vpu", "cnm,coda960" compatible.
The AXI bus connection to the internal SRAM is different between i.MX6Q
and i.MX6DL, which requires the driver to load a different firmware
depending on the SoC.
Further, specify the power-domain property for i.MX6 and change the
clock order from "ahb", "per" to "per", "ahb". This order is currently
used in all SoC device trees.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
2020-09-23 08:21:12 +00:00
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allOf:
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- if:
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properties:
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compatible:
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contains:
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const: cnm,coda960
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then:
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properties:
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interrupts:
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2020-11-17 20:07:52 +00:00
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minItems: 2
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media: dt-bindings: convert CODA VPU bindings to yaml
Convert to YAML and add generic IP core compatibles "cnm,codadx6",
"cnm,codahx4", "cnm,coda7541", and "cnm,coda960" in addition to the SoC
specific compatibles. The new generic compatibles are already used in
the SoC device trees and replace the free form comments. For example:
- compatible : should be "fsl,<chip>-src" for i.MX SoCs:
(a) "fsl,imx27-vpu" for CodaDx6 present in i.MX27
turns into:
properties:
compatible:
oneOf:
- items:
- const: fsl,imx27-vpu
- const: cnm,codadx6
This allows to properly specify the secondary JPEG unit interrupt that
is only present on cnm,coda960.
Also add the missing "fsl,imx6dl-vpu", "cnm,coda960" compatible.
The AXI bus connection to the internal SRAM is different between i.MX6Q
and i.MX6DL, which requires the driver to load a different firmware
depending on the SoC.
Further, specify the power-domain property for i.MX6 and change the
clock order from "ahb", "per" to "per", "ahb". This order is currently
used in all SoC device trees.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
2020-09-23 08:21:12 +00:00
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interrupt-names:
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2020-11-17 20:07:52 +00:00
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minItems: 2
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media: dt-bindings: convert CODA VPU bindings to yaml
Convert to YAML and add generic IP core compatibles "cnm,codadx6",
"cnm,codahx4", "cnm,coda7541", and "cnm,coda960" in addition to the SoC
specific compatibles. The new generic compatibles are already used in
the SoC device trees and replace the free form comments. For example:
- compatible : should be "fsl,<chip>-src" for i.MX SoCs:
(a) "fsl,imx27-vpu" for CodaDx6 present in i.MX27
turns into:
properties:
compatible:
oneOf:
- items:
- const: fsl,imx27-vpu
- const: cnm,codadx6
This allows to properly specify the secondary JPEG unit interrupt that
is only present on cnm,coda960.
Also add the missing "fsl,imx6dl-vpu", "cnm,coda960" compatible.
The AXI bus connection to the internal SRAM is different between i.MX6Q
and i.MX6DL, which requires the driver to load a different firmware
depending on the SoC.
Further, specify the power-domain property for i.MX6 and change the
clock order from "ahb", "per" to "per", "ahb". This order is currently
used in all SoC device trees.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
2020-09-23 08:21:12 +00:00
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else:
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properties:
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interrupts:
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maxItems: 1
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2020-11-17 20:07:52 +00:00
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power-domains: false
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media: dt-bindings: convert CODA VPU bindings to yaml
Convert to YAML and add generic IP core compatibles "cnm,codadx6",
"cnm,codahx4", "cnm,coda7541", and "cnm,coda960" in addition to the SoC
specific compatibles. The new generic compatibles are already used in
the SoC device trees and replace the free form comments. For example:
- compatible : should be "fsl,<chip>-src" for i.MX SoCs:
(a) "fsl,imx27-vpu" for CodaDx6 present in i.MX27
turns into:
properties:
compatible:
oneOf:
- items:
- const: fsl,imx27-vpu
- const: cnm,codadx6
This allows to properly specify the secondary JPEG unit interrupt that
is only present on cnm,coda960.
Also add the missing "fsl,imx6dl-vpu", "cnm,coda960" compatible.
The AXI bus connection to the internal SRAM is different between i.MX6Q
and i.MX6DL, which requires the driver to load a different firmware
depending on the SoC.
Further, specify the power-domain property for i.MX6 and change the
clock order from "ahb", "per" to "per", "ahb". This order is currently
used in all SoC device trees.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
2020-09-23 08:21:12 +00:00
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examples:
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- |
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vpu: video-codec@63ff4000 {
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compatible = "fsl,imx53-vpu", "cnm,coda7541";
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reg = <0x63ff4000 0x1000>;
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interrupts = <9>;
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clocks = <&clks 63>, <&clks 63>;
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clock-names = "per", "ahb";
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iram = <&ocram>;
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};
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