2009-02-05 19:04:47 +00:00
|
|
|
* Freescale Enhanced Secure Digital Host Controller (eSDHC)
|
|
|
|
|
|
|
|
The Enhanced Secure Digital Host Controller provides an interface
|
|
|
|
for MMC, SD, and SDIO types of memory cards.
|
|
|
|
|
|
|
|
Required properties:
|
|
|
|
- compatible : should be
|
2009-05-08 13:47:45 +00:00
|
|
|
"fsl,<chip>-esdhc", "fsl,esdhc"
|
2009-02-05 19:04:47 +00:00
|
|
|
- reg : should contain eSDHC registers location and length.
|
|
|
|
- interrupts : should contain eSDHC interrupt.
|
|
|
|
- interrupt-parent : interrupt source phandle.
|
|
|
|
- clock-frequency : specifies eSDHC base clock frequency.
|
2009-09-22 23:45:14 +00:00
|
|
|
- sdhci,wp-inverted : (optional) specifies that eSDHC controller
|
2012-05-13 04:14:24 +00:00
|
|
|
reports inverted write-protect state; New devices should use
|
|
|
|
the generic "wp-inverted" property.
|
2009-06-17 20:14:08 +00:00
|
|
|
- sdhci,1-bit-only : (optional) specifies that a controller can
|
2012-05-13 04:14:24 +00:00
|
|
|
only handle 1-bit data transfers. New devices should use the
|
|
|
|
generic "bus-width = <1>" property.
|
2010-08-11 01:02:00 +00:00
|
|
|
- sdhci,auto-cmd12: (optional) specifies that a controller can
|
|
|
|
only handle auto CMD12.
|
2009-02-05 19:04:47 +00:00
|
|
|
|
|
|
|
Example:
|
|
|
|
|
|
|
|
sdhci@2e000 {
|
2009-05-08 13:47:45 +00:00
|
|
|
compatible = "fsl,mpc8378-esdhc", "fsl,esdhc";
|
2009-02-05 19:04:47 +00:00
|
|
|
reg = <0x2e000 0x1000>;
|
|
|
|
interrupts = <42 0x8>;
|
|
|
|
interrupt-parent = <&ipic>;
|
|
|
|
/* Filled in by U-Boot */
|
|
|
|
clock-frequency = <0>;
|
|
|
|
};
|