2005-09-07 16:20:27 +00:00
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/*
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2009-05-28 21:16:04 +00:00
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* arch/arm/plat-omap/include/mach/serial.h
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*
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* Copyright (C) 2009 Texas Instruments
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2011-11-29 04:31:00 +00:00
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* Added OMAP4 support- Santosh Shilimkar <santosh.shilimkar@ti.com>
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2005-09-07 16:20:27 +00:00
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef __ASM_ARCH_SERIAL_H
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#define __ASM_ARCH_SERIAL_H
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2009-09-03 17:14:02 +00:00
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#include <linux/init.h>
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2010-05-01 00:39:19 +00:00
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/*
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2011-08-31 17:57:37 +00:00
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* Memory entry used for the DEBUG_LL UART configuration, relative to
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* start of RAM. See also uncompress.h and debug-macro.S.
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2010-05-01 00:39:19 +00:00
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*
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* Note that using a memory location for storing the UART configuration
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* has at least two limitations:
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*
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* 1. Kernel uncompress code cannot overlap OMAP_UART_INFO as the
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* uncompress code could then partially overwrite itself
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* 2. We assume printascii is called at least once before paging_init,
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* and addruart has a chance to read OMAP_UART_INFO
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*/
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2011-08-31 17:57:37 +00:00
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#define OMAP_UART_INFO_OFS 0x3ffc
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2010-05-01 00:39:19 +00:00
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2005-09-07 16:20:27 +00:00
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/* OMAP2 serial ports */
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2010-02-15 16:48:53 +00:00
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#define OMAP2_UART1_BASE 0x4806a000
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#define OMAP2_UART2_BASE 0x4806c000
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#define OMAP2_UART3_BASE 0x4806e000
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2008-10-06 12:49:15 +00:00
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/* OMAP3 serial ports */
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2010-02-15 16:49:01 +00:00
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#define OMAP3_UART1_BASE OMAP2_UART1_BASE
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#define OMAP3_UART2_BASE OMAP2_UART2_BASE
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2010-02-15 16:48:53 +00:00
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#define OMAP3_UART3_BASE 0x49020000
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#define OMAP3_UART4_BASE 0x49042000 /* Only on 36xx */
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2011-10-18 18:47:41 +00:00
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#define OMAP3_UART4_AM35XX_BASE 0x4809E000 /* Only on AM35xx */
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2010-02-15 16:48:53 +00:00
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2009-05-28 21:16:04 +00:00
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/* OMAP4 serial ports */
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2010-02-15 16:49:01 +00:00
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#define OMAP4_UART1_BASE OMAP2_UART1_BASE
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#define OMAP4_UART2_BASE OMAP2_UART2_BASE
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2010-02-15 16:48:53 +00:00
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#define OMAP4_UART3_BASE 0x48020000
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#define OMAP4_UART4_BASE 0x4806e000
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2011-12-13 18:46:44 +00:00
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/* TI81XX serial ports */
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#define TI81XX_UART1_BASE 0x48020000
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#define TI81XX_UART2_BASE 0x48022000
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#define TI81XX_UART3_BASE 0x48024000
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2011-02-15 17:36:17 +00:00
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2011-08-09 10:10:12 +00:00
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/* AM3505/3517 UART4 */
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#define AM35XX_UART4_BASE 0x4809E000 /* Only on AM3505/3517 */
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2012-05-10 08:53:01 +00:00
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/* AM33XX serial port */
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#define AM33XX_UART1_BASE 0x44E09000
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2012-06-05 10:51:32 +00:00
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/* OMAP5 serial ports */
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#define OMAP5_UART1_BASE OMAP2_UART1_BASE
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#define OMAP5_UART2_BASE OMAP2_UART2_BASE
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#define OMAP5_UART3_BASE OMAP4_UART3_BASE
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#define OMAP5_UART4_BASE OMAP4_UART4_BASE
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#define OMAP5_UART5_BASE 0x48066000
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#define OMAP5_UART6_BASE 0x48068000
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2010-02-15 16:49:01 +00:00
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/* External port on Zoom2/3 */
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#define ZOOM_UART_BASE 0x10000000
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2010-04-30 19:57:14 +00:00
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#define ZOOM_UART_VIRT 0xfa400000
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2010-02-15 16:49:01 +00:00
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2010-02-15 16:48:53 +00:00
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#define OMAP_PORT_SHIFT 2
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2010-02-15 16:49:01 +00:00
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#define ZOOM_PORT_SHIFT 1
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2005-09-07 16:20:27 +00:00
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2008-10-06 12:49:15 +00:00
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#define OMAP24XX_BASE_BAUD (48000000/16)
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2005-09-07 16:20:27 +00:00
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2010-02-15 16:49:01 +00:00
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/*
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* DEBUG_LL port encoding stored into the UART1 scratchpad register by
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* decomp_setup in uncompress.h
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*/
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#define OMAP2UART1 21
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#define OMAP2UART2 22
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#define OMAP2UART3 23
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#define OMAP3UART1 OMAP2UART1
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#define OMAP3UART2 OMAP2UART2
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#define OMAP3UART3 33
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#define OMAP3UART4 34 /* Only on 36xx */
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#define OMAP4UART1 OMAP2UART1
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#define OMAP4UART2 OMAP2UART2
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#define OMAP4UART3 43
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#define OMAP4UART4 44
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2011-12-13 18:46:44 +00:00
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#define TI81XXUART1 81
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#define TI81XXUART2 82
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#define TI81XXUART3 83
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2012-05-10 08:53:01 +00:00
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#define AM33XXUART1 84
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2012-06-05 10:51:32 +00:00
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#define OMAP5UART3 OMAP4UART3
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#define OMAP5UART4 OMAP4UART4
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2010-02-15 16:49:01 +00:00
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#define ZOOM_UART 95 /* Only on zoom2/3 */
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OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-04 18:51:40 +00:00
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#ifndef __ASSEMBLER__
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2010-12-23 02:42:35 +00:00
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struct omap_board_data;
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2011-11-09 12:03:38 +00:00
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struct omap_uart_port_info;
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2010-12-23 02:42:35 +00:00
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OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-04 18:51:40 +00:00
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extern void omap_serial_init(void);
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2011-11-09 12:03:38 +00:00
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extern void omap_serial_board_init(struct omap_uart_port_info *platform_data);
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extern void omap_serial_init_port(struct omap_board_data *bdata,
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struct omap_uart_port_info *platform_data);
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OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-04 18:51:40 +00:00
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#endif
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2005-09-07 16:20:27 +00:00
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#endif
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