2005-04-16 22:20:36 +00:00
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/*
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* Divide a 64-bit unsigned number by a 32-bit unsigned number.
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* This routine assumes that the top 32 bits of the dividend are
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* non-zero to start with.
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* On entry, r3 points to the dividend, which get overwritten with
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* the 64-bit quotient, and r4 contains the divisor.
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* On exit, r3 contains the remainder.
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*
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* Copyright (C) 2002 Paul Mackerras, IBM Corp.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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2005-08-08 03:24:38 +00:00
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#include "ppc_asm.h"
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2005-04-16 22:20:36 +00:00
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.globl __div64_32
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__div64_32:
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lwz r5,0(r3) # get the dividend into r5/r6
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lwz r6,4(r3)
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cmplw r5,r4
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li r7,0
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li r8,0
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blt 1f
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divwu r7,r5,r4 # if dividend.hi >= divisor,
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mullw r0,r7,r4 # quotient.hi = dividend.hi / divisor
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subf. r5,r0,r5 # dividend.hi %= divisor
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beq 3f
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1: mr r11,r5 # here dividend.hi != 0
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andis. r0,r5,0xc000
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bne 2f
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cntlzw r0,r5 # we are shifting the dividend right
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li r10,-1 # to make it < 2^32, and shifting
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srw r10,r10,r0 # the divisor right the same amount,
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2010-11-18 03:39:24 +00:00
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addc r9,r4,r10 # rounding up (so the estimate cannot
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2005-04-16 22:20:36 +00:00
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andc r11,r6,r10 # ever be too large, only too small)
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andc r9,r9,r10
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2010-11-18 03:39:24 +00:00
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addze r9,r9
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2005-04-16 22:20:36 +00:00
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or r11,r5,r11
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rotlw r9,r9,r0
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rotlw r11,r11,r0
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divwu r11,r11,r9 # then we divide the shifted quantities
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2: mullw r10,r11,r4 # to get an estimate of the quotient,
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mulhwu r9,r11,r4 # multiply the estimate by the divisor,
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subfc r6,r10,r6 # take the product from the divisor,
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add r8,r8,r11 # and add the estimate to the accumulated
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subfe. r5,r9,r5 # quotient
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bne 1b
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3: cmplw r6,r4
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blt 4f
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divwu r0,r6,r4 # perform the remaining 32-bit division
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mullw r10,r0,r4 # and get the remainder
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add r8,r8,r0
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subf r6,r10,r6
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4: stw r7,0(r3) # return the quotient in *r3
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stw r8,4(r3)
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mr r3,r6 # return the remainder in r3
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blr
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2011-11-30 21:39:21 +00:00
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/*
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* Extended precision shifts.
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*
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* Updated to be valid for shift counts from 0 to 63 inclusive.
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* -- Gabriel
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*
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* R3/R4 has 64 bit value
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* R5 has shift count
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* result in R3/R4
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*
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* ashrdi3: arithmetic right shift (sign propagation)
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* lshrdi3: logical right shift
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* ashldi3: left shift
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*/
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.globl __ashrdi3
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__ashrdi3:
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subfic r6,r5,32
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srw r4,r4,r5 # LSW = count > 31 ? 0 : LSW >> count
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addi r7,r5,32 # could be xori, or addi with -32
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slw r6,r3,r6 # t1 = count > 31 ? 0 : MSW << (32-count)
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rlwinm r8,r7,0,32 # t3 = (count < 32) ? 32 : 0
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sraw r7,r3,r7 # t2 = MSW >> (count-32)
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or r4,r4,r6 # LSW |= t1
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slw r7,r7,r8 # t2 = (count < 32) ? 0 : t2
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sraw r3,r3,r5 # MSW = MSW >> count
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or r4,r4,r7 # LSW |= t2
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blr
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.globl __ashldi3
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__ashldi3:
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subfic r6,r5,32
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slw r3,r3,r5 # MSW = count > 31 ? 0 : MSW << count
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addi r7,r5,32 # could be xori, or addi with -32
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srw r6,r4,r6 # t1 = count > 31 ? 0 : LSW >> (32-count)
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slw r7,r4,r7 # t2 = count < 32 ? 0 : LSW << (count-32)
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or r3,r3,r6 # MSW |= t1
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slw r4,r4,r5 # LSW = LSW << count
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or r3,r3,r7 # MSW |= t2
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blr
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.globl __lshrdi3
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__lshrdi3:
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subfic r6,r5,32
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srw r4,r4,r5 # LSW = count > 31 ? 0 : LSW >> count
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addi r7,r5,32 # could be xori, or addi with -32
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slw r6,r3,r6 # t1 = count > 31 ? 0 : MSW << (32-count)
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srw r7,r3,r7 # t2 = count < 32 ? 0 : MSW >> (count-32)
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or r4,r4,r6 # LSW |= t1
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srw r3,r3,r5 # MSW = MSW >> count
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or r4,r4,r7 # LSW |= t2
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blr
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