2005-04-16 22:20:36 +00:00
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/*
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2005-11-04 23:33:55 +00:00
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* smp.h: PowerPC-specific SMP code.
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2005-04-16 22:20:36 +00:00
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*
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* Original was a copy of sparc smp.h. Now heavily modified
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* for PPC.
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*
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* Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
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* Copyright (C) 1996-2001 Cort Dougan <cort@fsmlabs.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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2005-11-04 23:33:55 +00:00
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#ifndef _ASM_POWERPC_SMP_H
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#define _ASM_POWERPC_SMP_H
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2005-04-16 22:20:36 +00:00
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#ifdef __KERNEL__
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#include <linux/threads.h>
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#include <linux/cpumask.h>
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#include <linux/kernel.h>
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powerpc: Consolidate ipi message mux and demux
Consolidate the mux and demux of ipi messages into smp.c and call
a new smp_ops callback to actually trigger the ipi.
The powerpc architecture code is optimised for having 4 distinct
ipi triggers, which are mapped to 4 distinct messages (ipi many, ipi
single, scheduler ipi, and enter debugger). However, several interrupt
controllers only provide a single software triggered interrupt that
can be delivered to each cpu. To resolve this limitation, each smp_ops
implementation created a per-cpu variable that is manipulated with atomic
bitops. Since these lines will be contended they are optimialy marked as
shared_aligned and take a full cache line for each cpu. Distro kernels
may have 2 or 3 of these in their config, each taking per-cpu space
even though at most one will be in use.
This consolidation removes smp_message_recv and replaces the single call
actions cases with direct calls from the common message recognition loop.
The complicated debugger ipi case with its muxed crash handling code is
moved to debug_ipi_action which is now called from the demux code (instead
of the multi-message action calling smp_message_recv).
I put a call to reschedule_action to increase the likelyhood of correctly
merging the anticipated scheduler_ipi() hook coming from the scheduler
tree; that single required call can be inlined later.
The actual message decode is a copy of the old pseries xics code with its
memory barriers and cache line spacing, augmented with a per-cpu unsigned
long based on the book-e doorbell code. The optional data is set via a
callback from the implementation and is passed to the new cause-ipi hook
along with the logical cpu number. While currently only the doorbell
implemntation uses this data it should be almost zero cost to retrieve and
pass it -- it adds a single register load for the argument from the same
cache line to which we just completed a store and the register is dead
on return from the call. I extended the data element from unsigned int
to unsigned long in case some other code wanted to associate a pointer.
The doorbell check_self is replaced by a call to smp_muxed_ipi_resend,
conditioned on the CPU_DBELL feature. The ifdef guard could be relaxed
to CONFIG_SMP but I left it with BOOKE for now.
Also, the doorbell interrupt vector for book-e was not calling irq_enter
and irq_exit, which throws off cpu accounting and causes code to not
realize it is running in interrupt context. Add the missing calls.
Signed-off-by: Milton Miller <miltonm@bga.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2011-05-10 19:29:39 +00:00
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#include <linux/irqreturn.h>
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2005-04-16 22:20:36 +00:00
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#ifndef __ASSEMBLY__
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2005-11-04 23:33:55 +00:00
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#ifdef CONFIG_PPC64
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2005-04-16 22:20:36 +00:00
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#include <asm/paca.h>
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2005-11-04 23:33:55 +00:00
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#endif
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2007-10-16 08:24:05 +00:00
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#include <asm/percpu.h>
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2005-04-16 22:20:36 +00:00
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extern int boot_cpuid;
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2011-05-25 18:09:12 +00:00
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extern int spinning_secondaries;
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2005-04-16 22:20:36 +00:00
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extern void cpu_die(void);
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#ifdef CONFIG_SMP
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2011-05-10 19:29:35 +00:00
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struct smp_ops_t {
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void (*message_pass)(int cpu, int msg);
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2011-05-10 19:29:42 +00:00
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#ifdef CONFIG_PPC_SMP_MUXED_IPI
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powerpc: Consolidate ipi message mux and demux
Consolidate the mux and demux of ipi messages into smp.c and call
a new smp_ops callback to actually trigger the ipi.
The powerpc architecture code is optimised for having 4 distinct
ipi triggers, which are mapped to 4 distinct messages (ipi many, ipi
single, scheduler ipi, and enter debugger). However, several interrupt
controllers only provide a single software triggered interrupt that
can be delivered to each cpu. To resolve this limitation, each smp_ops
implementation created a per-cpu variable that is manipulated with atomic
bitops. Since these lines will be contended they are optimialy marked as
shared_aligned and take a full cache line for each cpu. Distro kernels
may have 2 or 3 of these in their config, each taking per-cpu space
even though at most one will be in use.
This consolidation removes smp_message_recv and replaces the single call
actions cases with direct calls from the common message recognition loop.
The complicated debugger ipi case with its muxed crash handling code is
moved to debug_ipi_action which is now called from the demux code (instead
of the multi-message action calling smp_message_recv).
I put a call to reschedule_action to increase the likelyhood of correctly
merging the anticipated scheduler_ipi() hook coming from the scheduler
tree; that single required call can be inlined later.
The actual message decode is a copy of the old pseries xics code with its
memory barriers and cache line spacing, augmented with a per-cpu unsigned
long based on the book-e doorbell code. The optional data is set via a
callback from the implementation and is passed to the new cause-ipi hook
along with the logical cpu number. While currently only the doorbell
implemntation uses this data it should be almost zero cost to retrieve and
pass it -- it adds a single register load for the argument from the same
cache line to which we just completed a store and the register is dead
on return from the call. I extended the data element from unsigned int
to unsigned long in case some other code wanted to associate a pointer.
The doorbell check_self is replaced by a call to smp_muxed_ipi_resend,
conditioned on the CPU_DBELL feature. The ifdef guard could be relaxed
to CONFIG_SMP but I left it with BOOKE for now.
Also, the doorbell interrupt vector for book-e was not calling irq_enter
and irq_exit, which throws off cpu accounting and causes code to not
realize it is running in interrupt context. Add the missing calls.
Signed-off-by: Milton Miller <miltonm@bga.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2011-05-10 19:29:39 +00:00
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void (*cause_ipi)(int cpu, unsigned long data);
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2011-05-10 19:29:42 +00:00
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#endif
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2011-05-10 19:29:35 +00:00
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int (*probe)(void);
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int (*kick_cpu)(int nr);
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void (*setup_cpu)(int nr);
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void (*bringup_done)(void);
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void (*take_timebase)(void);
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void (*give_timebase)(void);
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int (*cpu_disable)(void);
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void (*cpu_die)(unsigned int nr);
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int (*cpu_bootable)(unsigned int nr);
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};
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2011-05-10 19:29:06 +00:00
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extern void smp_send_debugger_break(void);
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2011-02-10 07:45:24 +00:00
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extern void start_secondary_resume(void);
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2012-12-21 22:04:10 +00:00
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extern void smp_generic_give_timebase(void);
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extern void smp_generic_take_timebase(void);
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2005-04-16 22:20:36 +00:00
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2009-10-29 13:34:14 +00:00
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DECLARE_PER_CPU(unsigned int, cpu_pvr);
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2008-05-08 04:27:19 +00:00
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2005-04-16 22:20:36 +00:00
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#ifdef CONFIG_HOTPLUG_CPU
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2011-02-11 02:05:17 +00:00
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extern void migrate_irqs(void);
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2005-04-16 22:20:36 +00:00
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int generic_cpu_disable(void);
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void generic_cpu_die(unsigned int cpu);
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void generic_mach_cpu_die(void);
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2011-03-31 22:23:37 +00:00
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void generic_set_cpu_dead(unsigned int cpu);
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2012-07-20 12:42:34 +00:00
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void generic_set_cpu_up(unsigned int cpu);
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2011-09-19 17:44:49 +00:00
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int generic_check_cpu_restart(unsigned int cpu);
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2012-10-15 01:15:41 +00:00
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extern void inhibit_secondary_onlining(void);
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extern void uninhibit_secondary_onlining(void);
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#else /* HOTPLUG_CPU */
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static inline void inhibit_secondary_onlining(void) {}
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static inline void uninhibit_secondary_onlining(void) {}
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2005-04-16 22:20:36 +00:00
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#endif
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2005-11-04 23:33:55 +00:00
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#ifdef CONFIG_PPC64
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2006-10-31 18:44:54 +00:00
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#define raw_smp_processor_id() (local_paca->paca_index)
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2005-04-16 22:20:36 +00:00
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#define hard_smp_processor_id() (get_paca()->hw_cpu_id)
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2005-11-04 23:33:55 +00:00
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#else
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/* 32-bit */
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extern int smp_hw_index[];
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#define raw_smp_processor_id() (current_thread_info()->cpu)
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#define hard_smp_processor_id() (smp_hw_index[smp_processor_id()])
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2008-08-18 04:23:48 +00:00
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static inline int get_hard_smp_processor_id(int cpu)
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{
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return smp_hw_index[cpu];
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}
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static inline void set_hard_smp_processor_id(int cpu, int phys)
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{
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smp_hw_index[cpu] = phys;
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}
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2005-11-04 23:33:55 +00:00
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#endif
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2005-04-16 22:20:36 +00:00
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2010-04-26 15:32:41 +00:00
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DECLARE_PER_CPU(cpumask_var_t, cpu_sibling_map);
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DECLARE_PER_CPU(cpumask_var_t, cpu_core_map);
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static inline struct cpumask *cpu_sibling_mask(int cpu)
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{
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return per_cpu(cpu_sibling_map, cpu);
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}
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static inline struct cpumask *cpu_core_mask(int cpu)
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{
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return per_cpu(cpu_core_map, cpu);
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}
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2008-07-27 05:24:54 +00:00
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extern int cpu_to_core_id(int cpu);
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2005-04-16 22:20:36 +00:00
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/* Since OpenPIC has only 4 IPIs, we use slightly different message numbers.
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*
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* Make sure this matches openpic_request_IPIs in open_pic.c, or what shows up
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* in /proc/interrupts will be wrong!!! --Troy */
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#define PPC_MSG_CALL_FUNCTION 0
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#define PPC_MSG_RESCHEDULE 1
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2008-06-26 09:22:13 +00:00
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#define PPC_MSG_CALL_FUNC_SINGLE 2
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2005-04-16 22:20:36 +00:00
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#define PPC_MSG_DEBUGGER_BREAK 3
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|
powerpc: Consolidate ipi message mux and demux
Consolidate the mux and demux of ipi messages into smp.c and call
a new smp_ops callback to actually trigger the ipi.
The powerpc architecture code is optimised for having 4 distinct
ipi triggers, which are mapped to 4 distinct messages (ipi many, ipi
single, scheduler ipi, and enter debugger). However, several interrupt
controllers only provide a single software triggered interrupt that
can be delivered to each cpu. To resolve this limitation, each smp_ops
implementation created a per-cpu variable that is manipulated with atomic
bitops. Since these lines will be contended they are optimialy marked as
shared_aligned and take a full cache line for each cpu. Distro kernels
may have 2 or 3 of these in their config, each taking per-cpu space
even though at most one will be in use.
This consolidation removes smp_message_recv and replaces the single call
actions cases with direct calls from the common message recognition loop.
The complicated debugger ipi case with its muxed crash handling code is
moved to debug_ipi_action which is now called from the demux code (instead
of the multi-message action calling smp_message_recv).
I put a call to reschedule_action to increase the likelyhood of correctly
merging the anticipated scheduler_ipi() hook coming from the scheduler
tree; that single required call can be inlined later.
The actual message decode is a copy of the old pseries xics code with its
memory barriers and cache line spacing, augmented with a per-cpu unsigned
long based on the book-e doorbell code. The optional data is set via a
callback from the implementation and is passed to the new cause-ipi hook
along with the logical cpu number. While currently only the doorbell
implemntation uses this data it should be almost zero cost to retrieve and
pass it -- it adds a single register load for the argument from the same
cache line to which we just completed a store and the register is dead
on return from the call. I extended the data element from unsigned int
to unsigned long in case some other code wanted to associate a pointer.
The doorbell check_self is replaced by a call to smp_muxed_ipi_resend,
conditioned on the CPU_DBELL feature. The ifdef guard could be relaxed
to CONFIG_SMP but I left it with BOOKE for now.
Also, the doorbell interrupt vector for book-e was not calling irq_enter
and irq_exit, which throws off cpu accounting and causes code to not
realize it is running in interrupt context. Add the missing calls.
Signed-off-by: Milton Miller <miltonm@bga.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2011-05-10 19:29:39 +00:00
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/* for irq controllers that have dedicated ipis per message (4) */
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2008-11-14 20:11:49 +00:00
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extern int smp_request_message_ipi(int virq, int message);
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extern const char *smp_ipi_name[];
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|
powerpc: Consolidate ipi message mux and demux
Consolidate the mux and demux of ipi messages into smp.c and call
a new smp_ops callback to actually trigger the ipi.
The powerpc architecture code is optimised for having 4 distinct
ipi triggers, which are mapped to 4 distinct messages (ipi many, ipi
single, scheduler ipi, and enter debugger). However, several interrupt
controllers only provide a single software triggered interrupt that
can be delivered to each cpu. To resolve this limitation, each smp_ops
implementation created a per-cpu variable that is manipulated with atomic
bitops. Since these lines will be contended they are optimialy marked as
shared_aligned and take a full cache line for each cpu. Distro kernels
may have 2 or 3 of these in their config, each taking per-cpu space
even though at most one will be in use.
This consolidation removes smp_message_recv and replaces the single call
actions cases with direct calls from the common message recognition loop.
The complicated debugger ipi case with its muxed crash handling code is
moved to debug_ipi_action which is now called from the demux code (instead
of the multi-message action calling smp_message_recv).
I put a call to reschedule_action to increase the likelyhood of correctly
merging the anticipated scheduler_ipi() hook coming from the scheduler
tree; that single required call can be inlined later.
The actual message decode is a copy of the old pseries xics code with its
memory barriers and cache line spacing, augmented with a per-cpu unsigned
long based on the book-e doorbell code. The optional data is set via a
callback from the implementation and is passed to the new cause-ipi hook
along with the logical cpu number. While currently only the doorbell
implemntation uses this data it should be almost zero cost to retrieve and
pass it -- it adds a single register load for the argument from the same
cache line to which we just completed a store and the register is dead
on return from the call. I extended the data element from unsigned int
to unsigned long in case some other code wanted to associate a pointer.
The doorbell check_self is replaced by a call to smp_muxed_ipi_resend,
conditioned on the CPU_DBELL feature. The ifdef guard could be relaxed
to CONFIG_SMP but I left it with BOOKE for now.
Also, the doorbell interrupt vector for book-e was not calling irq_enter
and irq_exit, which throws off cpu accounting and causes code to not
realize it is running in interrupt context. Add the missing calls.
Signed-off-by: Milton Miller <miltonm@bga.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2011-05-10 19:29:39 +00:00
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/* for irq controllers with only a single ipi */
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extern void smp_muxed_ipi_set_data(int cpu, unsigned long data);
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extern void smp_muxed_ipi_message_pass(int cpu, int msg);
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extern irqreturn_t smp_ipi_demux(void);
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2005-04-16 22:20:36 +00:00
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void smp_init_pSeries(void);
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2005-11-01 01:08:38 +00:00
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void smp_init_cell(void);
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2007-02-02 07:47:17 +00:00
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void smp_init_celleb(void);
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2005-11-04 23:33:55 +00:00
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void smp_setup_cpu_maps(void);
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2005-04-16 22:20:36 +00:00
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extern int __cpu_disable(void);
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extern void __cpu_die(unsigned int cpu);
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2005-11-04 23:33:55 +00:00
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#else
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/* for UP */
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2008-10-10 09:44:33 +00:00
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#define hard_smp_processor_id() get_hard_smp_processor_id(0)
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2005-11-04 23:33:55 +00:00
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#define smp_setup_cpu_maps()
|
2013-04-15 20:28:01 +00:00
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|
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static inline void inhibit_secondary_onlining(void) {}
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static inline void uninhibit_secondary_onlining(void) {}
|
2013-07-25 01:13:21 +00:00
|
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|
static inline const struct cpumask *cpu_sibling_mask(int cpu)
|
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{
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return cpumask_of(cpu);
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}
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2005-11-04 23:33:55 +00:00
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2005-04-16 22:20:36 +00:00
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#endif /* CONFIG_SMP */
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2005-11-04 23:33:55 +00:00
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#ifdef CONFIG_PPC64
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2008-08-18 04:23:48 +00:00
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static inline int get_hard_smp_processor_id(int cpu)
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{
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return paca[cpu].hw_cpu_id;
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}
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static inline void set_hard_smp_processor_id(int cpu, int phys)
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{
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paca[cpu].hw_cpu_id = phys;
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}
|
2005-11-07 02:18:13 +00:00
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extern void smp_release_cpus(void);
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2005-11-04 23:33:55 +00:00
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#else
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/* 32-bit */
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#ifndef CONFIG_SMP
|
2006-03-25 06:25:17 +00:00
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|
|
extern int boot_cpuid_phys;
|
2008-08-18 04:23:48 +00:00
|
|
|
static inline int get_hard_smp_processor_id(int cpu)
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{
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return boot_cpuid_phys;
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}
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static inline void set_hard_smp_processor_id(int cpu, int phys)
|
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{
|
2008-10-10 09:44:33 +00:00
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boot_cpuid_phys = phys;
|
2008-08-18 04:23:48 +00:00
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}
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#endif /* !CONFIG_SMP */
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#endif /* !CONFIG_PPC64 */
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2005-04-16 22:20:36 +00:00
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extern int smt_enabled_at_boot;
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extern int smp_mpic_probe(void);
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extern void smp_mpic_setup_cpu(int cpu);
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2011-04-11 21:46:19 +00:00
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extern int smp_generic_kick_cpu(int nr);
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2005-04-16 22:20:36 +00:00
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extern void smp_generic_give_timebase(void);
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extern void smp_generic_take_timebase(void);
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extern struct smp_ops_t *smp_ops;
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2008-06-26 09:22:13 +00:00
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extern void arch_send_call_function_single_ipi(int cpu);
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2009-09-24 15:34:45 +00:00
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extern void arch_send_call_function_ipi_mask(const struct cpumask *mask);
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2008-06-26 09:22:13 +00:00
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2009-07-23 23:15:28 +00:00
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/* Definitions relative to the secondary CPU spin loop
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* and entry point. Not all of them exist on both 32 and
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* 64-bit but defining them all here doesn't harm
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*/
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extern void generic_secondary_smp_init(void);
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2009-07-23 23:15:59 +00:00
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extern void generic_secondary_thread_init(void);
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2009-07-23 23:15:28 +00:00
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extern unsigned long __secondary_hold_spinloop;
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extern unsigned long __secondary_hold_acknowledge;
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extern char __secondary_hold;
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2012-07-20 12:42:36 +00:00
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extern void __early_start(void);
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2005-04-16 22:20:36 +00:00
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#endif /* __ASSEMBLY__ */
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#endif /* __KERNEL__ */
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2005-11-04 23:33:55 +00:00
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#endif /* _ASM_POWERPC_SMP_H) */
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