2019-05-27 06:55:01 +00:00
|
|
|
// SPDX-License-Identifier: GPL-2.0-or-later
|
2011-01-24 12:19:12 +00:00
|
|
|
/*
|
|
|
|
* Copyright 2010-2011 Picochip Ltd., Jamie Iles
|
|
|
|
* http://www.picochip.com
|
|
|
|
*
|
|
|
|
* This file implements a driver for the Synopsys DesignWare watchdog device
|
2013-12-30 12:25:54 +00:00
|
|
|
* in the many subsystems. The watchdog has 16 different timeout periods
|
2011-01-24 12:19:12 +00:00
|
|
|
* and these are a function of the input clock frequency.
|
|
|
|
*
|
|
|
|
* The DesignWare watchdog cannot be stopped once it has been started so we
|
2016-02-28 21:12:19 +00:00
|
|
|
* do not implement a stop function. The watchdog core will continue to send
|
|
|
|
* heartbeat requests after the watchdog device has been closed.
|
2011-01-24 12:19:12 +00:00
|
|
|
*/
|
2012-02-15 23:06:19 +00:00
|
|
|
|
2011-01-24 12:19:12 +00:00
|
|
|
#include <linux/bitops.h>
|
|
|
|
#include <linux/clk.h>
|
2014-09-23 07:42:12 +00:00
|
|
|
#include <linux/delay.h>
|
2011-01-24 12:19:12 +00:00
|
|
|
#include <linux/err.h>
|
|
|
|
#include <linux/io.h>
|
|
|
|
#include <linux/kernel.h>
|
|
|
|
#include <linux/module.h>
|
|
|
|
#include <linux/moduleparam.h>
|
2013-10-22 16:59:12 +00:00
|
|
|
#include <linux/of.h>
|
2011-01-24 12:19:12 +00:00
|
|
|
#include <linux/pm.h>
|
|
|
|
#include <linux/platform_device.h>
|
2017-05-22 08:51:39 +00:00
|
|
|
#include <linux/reset.h>
|
2011-01-24 12:19:12 +00:00
|
|
|
#include <linux/watchdog.h>
|
|
|
|
|
|
|
|
#define WDOG_CONTROL_REG_OFFSET 0x00
|
|
|
|
#define WDOG_CONTROL_REG_WDT_EN_MASK 0x01
|
2018-03-10 03:46:06 +00:00
|
|
|
#define WDOG_CONTROL_REG_RESP_MODE_MASK 0x02
|
2011-01-24 12:19:12 +00:00
|
|
|
#define WDOG_TIMEOUT_RANGE_REG_OFFSET 0x04
|
2014-09-23 07:42:11 +00:00
|
|
|
#define WDOG_TIMEOUT_RANGE_TOPINIT_SHIFT 4
|
2011-01-24 12:19:12 +00:00
|
|
|
#define WDOG_CURRENT_COUNT_REG_OFFSET 0x08
|
|
|
|
#define WDOG_COUNTER_RESTART_REG_OFFSET 0x0c
|
|
|
|
#define WDOG_COUNTER_RESTART_KICK_VALUE 0x76
|
|
|
|
|
|
|
|
/* The maximum TOP (timeout period) value that can be set in the watchdog. */
|
|
|
|
#define DW_WDT_MAX_TOP 15
|
|
|
|
|
2015-01-27 22:25:17 +00:00
|
|
|
#define DW_WDT_DEFAULT_SECONDS 30
|
|
|
|
|
2012-03-05 15:51:11 +00:00
|
|
|
static bool nowayout = WATCHDOG_NOWAYOUT;
|
|
|
|
module_param(nowayout, bool, 0);
|
2011-01-24 12:19:12 +00:00
|
|
|
MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
|
|
|
|
"(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
|
|
|
|
|
2016-02-28 21:12:19 +00:00
|
|
|
struct dw_wdt {
|
2011-01-24 12:19:12 +00:00
|
|
|
void __iomem *regs;
|
|
|
|
struct clk *clk;
|
2016-08-10 05:35:58 +00:00
|
|
|
unsigned long rate;
|
2016-02-28 21:12:19 +00:00
|
|
|
struct watchdog_device wdd;
|
2017-05-22 08:51:39 +00:00
|
|
|
struct reset_control *rst;
|
2018-03-10 03:46:07 +00:00
|
|
|
/* Save/restore */
|
|
|
|
u32 control;
|
|
|
|
u32 timeout;
|
2016-02-28 21:12:19 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
#define to_dw_wdt(wdd) container_of(wdd, struct dw_wdt, wdd)
|
2011-01-24 12:19:12 +00:00
|
|
|
|
2016-02-28 21:12:19 +00:00
|
|
|
static inline int dw_wdt_is_enabled(struct dw_wdt *dw_wdt)
|
2011-01-24 12:19:12 +00:00
|
|
|
{
|
2016-02-28 21:12:19 +00:00
|
|
|
return readl(dw_wdt->regs + WDOG_CONTROL_REG_OFFSET) &
|
2011-01-24 12:19:12 +00:00
|
|
|
WDOG_CONTROL_REG_WDT_EN_MASK;
|
|
|
|
}
|
|
|
|
|
2016-02-28 21:12:19 +00:00
|
|
|
static inline int dw_wdt_top_in_seconds(struct dw_wdt *dw_wdt, unsigned top)
|
2011-01-24 12:19:12 +00:00
|
|
|
{
|
|
|
|
/*
|
|
|
|
* There are 16 possible timeout values in 0..15 where the number of
|
|
|
|
* cycles is 2 ^ (16 + i) and the watchdog counts down.
|
|
|
|
*/
|
2016-08-10 05:35:58 +00:00
|
|
|
return (1U << (16 + top)) / dw_wdt->rate;
|
2011-01-24 12:19:12 +00:00
|
|
|
}
|
|
|
|
|
2016-02-28 21:12:19 +00:00
|
|
|
static int dw_wdt_get_top(struct dw_wdt *dw_wdt)
|
2011-01-24 12:19:12 +00:00
|
|
|
{
|
2016-02-28 21:12:19 +00:00
|
|
|
int top = readl(dw_wdt->regs + WDOG_TIMEOUT_RANGE_REG_OFFSET) & 0xF;
|
2011-01-24 12:19:12 +00:00
|
|
|
|
2016-02-28 21:12:19 +00:00
|
|
|
return dw_wdt_top_in_seconds(dw_wdt, top);
|
2011-01-24 12:19:12 +00:00
|
|
|
}
|
|
|
|
|
2016-02-28 21:12:19 +00:00
|
|
|
static int dw_wdt_ping(struct watchdog_device *wdd)
|
2011-01-24 12:19:12 +00:00
|
|
|
{
|
2016-02-28 21:12:19 +00:00
|
|
|
struct dw_wdt *dw_wdt = to_dw_wdt(wdd);
|
2011-01-24 12:19:12 +00:00
|
|
|
|
2016-02-28 21:12:19 +00:00
|
|
|
writel(WDOG_COUNTER_RESTART_KICK_VALUE, dw_wdt->regs +
|
2015-01-27 22:25:16 +00:00
|
|
|
WDOG_COUNTER_RESTART_REG_OFFSET);
|
2016-02-28 21:12:19 +00:00
|
|
|
|
|
|
|
return 0;
|
2015-01-27 22:25:16 +00:00
|
|
|
}
|
|
|
|
|
2016-02-28 21:12:19 +00:00
|
|
|
static int dw_wdt_set_timeout(struct watchdog_device *wdd, unsigned int top_s)
|
2011-01-24 12:19:12 +00:00
|
|
|
{
|
2016-02-28 21:12:19 +00:00
|
|
|
struct dw_wdt *dw_wdt = to_dw_wdt(wdd);
|
2011-01-24 12:19:12 +00:00
|
|
|
int i, top_val = DW_WDT_MAX_TOP;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Iterate over the timeout values until we find the closest match. We
|
|
|
|
* always look for >=.
|
|
|
|
*/
|
|
|
|
for (i = 0; i <= DW_WDT_MAX_TOP; ++i)
|
2016-02-28 21:12:19 +00:00
|
|
|
if (dw_wdt_top_in_seconds(dw_wdt, i) >= top_s) {
|
2011-01-24 12:19:12 +00:00
|
|
|
top_val = i;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
2015-01-27 22:25:16 +00:00
|
|
|
/*
|
|
|
|
* Set the new value in the watchdog. Some versions of dw_wdt
|
|
|
|
* have have TOPINIT in the TIMEOUT_RANGE register (as per
|
|
|
|
* CP_WDT_DUAL_TOP in WDT_COMP_PARAMS_1). On those we
|
|
|
|
* effectively get a pat of the watchdog right here.
|
|
|
|
*/
|
2014-09-23 07:42:11 +00:00
|
|
|
writel(top_val | top_val << WDOG_TIMEOUT_RANGE_TOPINIT_SHIFT,
|
2016-02-28 21:12:19 +00:00
|
|
|
dw_wdt->regs + WDOG_TIMEOUT_RANGE_REG_OFFSET);
|
2011-01-24 12:19:12 +00:00
|
|
|
|
2016-02-28 21:12:19 +00:00
|
|
|
wdd->timeout = dw_wdt_top_in_seconds(dw_wdt, top_val);
|
2015-01-27 22:25:16 +00:00
|
|
|
|
2016-02-28 21:12:19 +00:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2018-03-10 03:46:06 +00:00
|
|
|
static void dw_wdt_arm_system_reset(struct dw_wdt *dw_wdt)
|
|
|
|
{
|
|
|
|
u32 val = readl(dw_wdt->regs + WDOG_CONTROL_REG_OFFSET);
|
|
|
|
|
|
|
|
/* Disable interrupt mode; always perform system reset. */
|
|
|
|
val &= ~WDOG_CONTROL_REG_RESP_MODE_MASK;
|
|
|
|
/* Enable watchdog. */
|
|
|
|
val |= WDOG_CONTROL_REG_WDT_EN_MASK;
|
|
|
|
writel(val, dw_wdt->regs + WDOG_CONTROL_REG_OFFSET);
|
|
|
|
}
|
|
|
|
|
2016-02-28 21:12:19 +00:00
|
|
|
static int dw_wdt_start(struct watchdog_device *wdd)
|
|
|
|
{
|
|
|
|
struct dw_wdt *dw_wdt = to_dw_wdt(wdd);
|
|
|
|
|
|
|
|
dw_wdt_set_timeout(wdd, wdd->timeout);
|
2018-03-10 03:46:06 +00:00
|
|
|
dw_wdt_arm_system_reset(dw_wdt);
|
2016-02-28 21:12:19 +00:00
|
|
|
|
|
|
|
return 0;
|
2011-01-24 12:19:12 +00:00
|
|
|
}
|
|
|
|
|
2017-09-26 06:11:22 +00:00
|
|
|
static int dw_wdt_stop(struct watchdog_device *wdd)
|
|
|
|
{
|
|
|
|
struct dw_wdt *dw_wdt = to_dw_wdt(wdd);
|
|
|
|
|
|
|
|
if (!dw_wdt->rst) {
|
|
|
|
set_bit(WDOG_HW_RUNNING, &wdd->status);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
reset_control_assert(dw_wdt->rst);
|
|
|
|
reset_control_deassert(dw_wdt->rst);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2017-01-04 20:27:21 +00:00
|
|
|
static int dw_wdt_restart(struct watchdog_device *wdd,
|
|
|
|
unsigned long action, void *data)
|
2014-09-23 07:42:12 +00:00
|
|
|
{
|
2017-01-04 20:27:21 +00:00
|
|
|
struct dw_wdt *dw_wdt = to_dw_wdt(wdd);
|
2014-09-23 07:42:12 +00:00
|
|
|
|
2016-02-28 21:12:19 +00:00
|
|
|
writel(0, dw_wdt->regs + WDOG_TIMEOUT_RANGE_REG_OFFSET);
|
2018-03-10 03:46:06 +00:00
|
|
|
if (dw_wdt_is_enabled(dw_wdt))
|
2016-02-28 21:12:19 +00:00
|
|
|
writel(WDOG_COUNTER_RESTART_KICK_VALUE,
|
|
|
|
dw_wdt->regs + WDOG_COUNTER_RESTART_REG_OFFSET);
|
2014-09-23 07:42:12 +00:00
|
|
|
else
|
2018-03-10 03:46:06 +00:00
|
|
|
dw_wdt_arm_system_reset(dw_wdt);
|
2014-09-23 07:42:12 +00:00
|
|
|
|
|
|
|
/* wait for reset to assert... */
|
|
|
|
mdelay(500);
|
|
|
|
|
2017-01-04 20:27:21 +00:00
|
|
|
return 0;
|
2014-09-23 07:42:12 +00:00
|
|
|
}
|
|
|
|
|
2016-02-28 21:12:19 +00:00
|
|
|
static unsigned int dw_wdt_get_timeleft(struct watchdog_device *wdd)
|
2011-01-24 12:19:12 +00:00
|
|
|
{
|
2016-02-28 21:12:19 +00:00
|
|
|
struct dw_wdt *dw_wdt = to_dw_wdt(wdd);
|
2011-01-24 12:19:12 +00:00
|
|
|
|
2016-02-28 21:12:19 +00:00
|
|
|
return readl(dw_wdt->regs + WDOG_CURRENT_COUNT_REG_OFFSET) /
|
2016-08-10 05:35:58 +00:00
|
|
|
dw_wdt->rate;
|
2011-01-24 12:19:12 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static const struct watchdog_info dw_wdt_ident = {
|
|
|
|
.options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT |
|
|
|
|
WDIOF_MAGICCLOSE,
|
|
|
|
.identity = "Synopsys DesignWare Watchdog",
|
|
|
|
};
|
|
|
|
|
2016-02-28 21:12:19 +00:00
|
|
|
static const struct watchdog_ops dw_wdt_ops = {
|
|
|
|
.owner = THIS_MODULE,
|
|
|
|
.start = dw_wdt_start,
|
2017-09-26 06:11:22 +00:00
|
|
|
.stop = dw_wdt_stop,
|
2016-02-28 21:12:19 +00:00
|
|
|
.ping = dw_wdt_ping,
|
|
|
|
.set_timeout = dw_wdt_set_timeout,
|
|
|
|
.get_timeleft = dw_wdt_get_timeleft,
|
2017-01-04 20:27:21 +00:00
|
|
|
.restart = dw_wdt_restart,
|
2016-02-28 21:12:19 +00:00
|
|
|
};
|
2011-01-24 12:19:12 +00:00
|
|
|
|
2013-06-26 18:03:52 +00:00
|
|
|
#ifdef CONFIG_PM_SLEEP
|
2011-01-24 12:19:12 +00:00
|
|
|
static int dw_wdt_suspend(struct device *dev)
|
|
|
|
{
|
2016-02-28 21:12:19 +00:00
|
|
|
struct dw_wdt *dw_wdt = dev_get_drvdata(dev);
|
|
|
|
|
2018-03-10 03:46:07 +00:00
|
|
|
dw_wdt->control = readl(dw_wdt->regs + WDOG_CONTROL_REG_OFFSET);
|
|
|
|
dw_wdt->timeout = readl(dw_wdt->regs + WDOG_TIMEOUT_RANGE_REG_OFFSET);
|
|
|
|
|
2016-02-28 21:12:19 +00:00
|
|
|
clk_disable_unprepare(dw_wdt->clk);
|
2011-01-24 12:19:12 +00:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int dw_wdt_resume(struct device *dev)
|
|
|
|
{
|
2016-02-28 21:12:19 +00:00
|
|
|
struct dw_wdt *dw_wdt = dev_get_drvdata(dev);
|
|
|
|
int err = clk_prepare_enable(dw_wdt->clk);
|
2011-01-24 12:19:12 +00:00
|
|
|
|
|
|
|
if (err)
|
|
|
|
return err;
|
|
|
|
|
2018-03-10 03:46:07 +00:00
|
|
|
writel(dw_wdt->timeout, dw_wdt->regs + WDOG_TIMEOUT_RANGE_REG_OFFSET);
|
|
|
|
writel(dw_wdt->control, dw_wdt->regs + WDOG_CONTROL_REG_OFFSET);
|
|
|
|
|
2016-02-28 21:12:19 +00:00
|
|
|
dw_wdt_ping(&dw_wdt->wdd);
|
2011-01-24 12:19:12 +00:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
2013-06-26 18:03:52 +00:00
|
|
|
#endif /* CONFIG_PM_SLEEP */
|
2011-01-24 12:19:12 +00:00
|
|
|
|
2013-06-26 18:03:52 +00:00
|
|
|
static SIMPLE_DEV_PM_OPS(dw_wdt_pm_ops, dw_wdt_suspend, dw_wdt_resume);
|
2011-01-24 12:19:12 +00:00
|
|
|
|
2012-11-19 18:21:41 +00:00
|
|
|
static int dw_wdt_drv_probe(struct platform_device *pdev)
|
2011-01-24 12:19:12 +00:00
|
|
|
{
|
2016-02-28 21:12:19 +00:00
|
|
|
struct device *dev = &pdev->dev;
|
|
|
|
struct watchdog_device *wdd;
|
|
|
|
struct dw_wdt *dw_wdt;
|
2011-01-24 12:19:12 +00:00
|
|
|
int ret;
|
|
|
|
|
2016-02-28 21:12:19 +00:00
|
|
|
dw_wdt = devm_kzalloc(dev, sizeof(*dw_wdt), GFP_KERNEL);
|
|
|
|
if (!dw_wdt)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
watchdog: Convert to use devm_platform_ioremap_resource
Use devm_platform_ioremap_resource to reduce source code size,
improve readability, and reduce the likelyhood of bugs.
The conversion was done automatically with coccinelle using the
following semantic patch.
@r@
identifier res, pdev;
expression a;
expression index;
expression e;
@@
<+...
- res = platform_get_resource(pdev, IORESOURCE_MEM, index);
- a = devm_ioremap_resource(e, res);
+ a = devm_platform_ioremap_resource(pdev, index);
...+>
@depends on r@
identifier r.res;
@@
- struct resource *res;
... when != res
@@
identifier res, pdev;
expression index;
expression a;
@@
- struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, index);
- a = devm_ioremap_resource(&pdev->dev, res);
+ a = devm_platform_ioremap_resource(pdev, index);
Cc: Joel Stanley <joel@jms.id.au>
Cc: Nicolas Ferre <nicolas.ferre@microchip.com>
Cc: Alexandre Belloni <alexandre.belloni@bootlin.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Baruch Siach <baruch@tkos.co.il>
Cc: Keguang Zhang <keguang.zhang@gmail.com>
Cc: Vladimir Zapolskiy <vz@mleia.com>
Cc: Kevin Hilman <khilman@baylibre.com>
Cc: Matthias Brugger <matthias.bgg@gmail.com>
Cc: Avi Fishman <avifishman70@gmail.com>
Cc: Nancy Yuen <yuenn@google.com>
Cc: Brendan Higgins <brendanhiggins@google.com>
Cc: Wan ZongShun <mcuos.com@gmail.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Sylvain Lemieux <slemieux.tyco@gmail.com>
Cc: Kukjin Kim <kgene@kernel.org>
Cc: Barry Song <baohua@kernel.org>
Cc: Orson Zhai <orsonzhai@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Maxime Ripard <maxime.ripard@bootlin.com>
Cc: Chen-Yu Tsai <wens@csie.org>
Cc: Marc Gonzalez <marc.w.gonzalez@free.fr>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Tested-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Acked-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Michal Simek <michal.simek@xilinx.com> (cadence/xilinx wdts)
Acked-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Vladimir Zapolskiy <vz@mleia.com>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
2019-04-02 19:01:53 +00:00
|
|
|
dw_wdt->regs = devm_platform_ioremap_resource(pdev, 0);
|
2016-02-28 21:12:19 +00:00
|
|
|
if (IS_ERR(dw_wdt->regs))
|
|
|
|
return PTR_ERR(dw_wdt->regs);
|
2011-01-24 12:19:12 +00:00
|
|
|
|
2016-02-28 21:12:19 +00:00
|
|
|
dw_wdt->clk = devm_clk_get(dev, NULL);
|
|
|
|
if (IS_ERR(dw_wdt->clk))
|
|
|
|
return PTR_ERR(dw_wdt->clk);
|
2011-01-24 12:19:12 +00:00
|
|
|
|
2016-02-28 21:12:19 +00:00
|
|
|
ret = clk_prepare_enable(dw_wdt->clk);
|
2011-01-24 12:19:12 +00:00
|
|
|
if (ret)
|
2013-04-29 09:15:26 +00:00
|
|
|
return ret;
|
2011-01-24 12:19:12 +00:00
|
|
|
|
2016-08-10 05:35:58 +00:00
|
|
|
dw_wdt->rate = clk_get_rate(dw_wdt->clk);
|
|
|
|
if (dw_wdt->rate == 0) {
|
|
|
|
ret = -EINVAL;
|
|
|
|
goto out_disable_clk;
|
|
|
|
}
|
|
|
|
|
2017-05-22 08:51:39 +00:00
|
|
|
dw_wdt->rst = devm_reset_control_get_optional_shared(&pdev->dev, NULL);
|
|
|
|
if (IS_ERR(dw_wdt->rst)) {
|
|
|
|
ret = PTR_ERR(dw_wdt->rst);
|
|
|
|
goto out_disable_clk;
|
|
|
|
}
|
|
|
|
|
|
|
|
reset_control_deassert(dw_wdt->rst);
|
|
|
|
|
2016-02-28 21:12:19 +00:00
|
|
|
wdd = &dw_wdt->wdd;
|
|
|
|
wdd->info = &dw_wdt_ident;
|
|
|
|
wdd->ops = &dw_wdt_ops;
|
|
|
|
wdd->min_timeout = 1;
|
|
|
|
wdd->max_hw_heartbeat_ms =
|
|
|
|
dw_wdt_top_in_seconds(dw_wdt, DW_WDT_MAX_TOP) * 1000;
|
|
|
|
wdd->parent = dev;
|
|
|
|
|
|
|
|
watchdog_set_drvdata(wdd, dw_wdt);
|
|
|
|
watchdog_set_nowayout(wdd, nowayout);
|
|
|
|
watchdog_init_timeout(wdd, 0, dev);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* If the watchdog is already running, use its already configured
|
|
|
|
* timeout. Otherwise use the default or the value provided through
|
|
|
|
* devicetree.
|
|
|
|
*/
|
|
|
|
if (dw_wdt_is_enabled(dw_wdt)) {
|
|
|
|
wdd->timeout = dw_wdt_get_top(dw_wdt);
|
|
|
|
set_bit(WDOG_HW_RUNNING, &wdd->status);
|
|
|
|
} else {
|
|
|
|
wdd->timeout = DW_WDT_DEFAULT_SECONDS;
|
|
|
|
watchdog_init_timeout(wdd, 0, dev);
|
|
|
|
}
|
|
|
|
|
|
|
|
platform_set_drvdata(pdev, dw_wdt);
|
|
|
|
|
2017-01-04 20:27:21 +00:00
|
|
|
watchdog_set_restart_priority(wdd, 128);
|
|
|
|
|
2016-02-28 21:12:19 +00:00
|
|
|
ret = watchdog_register_device(wdd);
|
2011-01-24 12:19:12 +00:00
|
|
|
if (ret)
|
|
|
|
goto out_disable_clk;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
out_disable_clk:
|
2016-02-28 21:12:19 +00:00
|
|
|
clk_disable_unprepare(dw_wdt->clk);
|
2011-01-24 12:19:12 +00:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2012-11-19 18:26:24 +00:00
|
|
|
static int dw_wdt_drv_remove(struct platform_device *pdev)
|
2011-01-24 12:19:12 +00:00
|
|
|
{
|
2016-02-28 21:12:19 +00:00
|
|
|
struct dw_wdt *dw_wdt = platform_get_drvdata(pdev);
|
2011-01-24 12:19:12 +00:00
|
|
|
|
2016-02-28 21:12:19 +00:00
|
|
|
watchdog_unregister_device(&dw_wdt->wdd);
|
2017-05-22 08:51:39 +00:00
|
|
|
reset_control_assert(dw_wdt->rst);
|
2016-02-28 21:12:19 +00:00
|
|
|
clk_disable_unprepare(dw_wdt->clk);
|
2011-01-24 12:19:12 +00:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2013-10-22 16:59:12 +00:00
|
|
|
#ifdef CONFIG_OF
|
|
|
|
static const struct of_device_id dw_wdt_of_match[] = {
|
|
|
|
{ .compatible = "snps,dw-wdt", },
|
|
|
|
{ /* sentinel */ }
|
|
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE(of, dw_wdt_of_match);
|
|
|
|
#endif
|
|
|
|
|
2011-01-24 12:19:12 +00:00
|
|
|
static struct platform_driver dw_wdt_driver = {
|
|
|
|
.probe = dw_wdt_drv_probe,
|
2012-11-19 18:21:12 +00:00
|
|
|
.remove = dw_wdt_drv_remove,
|
2011-01-24 12:19:12 +00:00
|
|
|
.driver = {
|
|
|
|
.name = "dw_wdt",
|
2013-10-22 16:59:12 +00:00
|
|
|
.of_match_table = of_match_ptr(dw_wdt_of_match),
|
2011-01-24 12:19:12 +00:00
|
|
|
.pm = &dw_wdt_pm_ops,
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
2011-11-29 05:56:27 +00:00
|
|
|
module_platform_driver(dw_wdt_driver);
|
2011-01-24 12:19:12 +00:00
|
|
|
|
|
|
|
MODULE_AUTHOR("Jamie Iles");
|
|
|
|
MODULE_DESCRIPTION("Synopsys DesignWare Watchdog Driver");
|
|
|
|
MODULE_LICENSE("GPL");
|