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linux/arch/arm/mach-prima2/common.c

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ARM: CSR: Adding CSR SiRFprimaII board support SiRFprimaII is the latest generation application processor from CSR’s Multifunction SoC product family. Designed around an ARM cortex A9 core, high-speed memory bus, advanced 3D accelerator and full-HD multi-format video decoder, SiRFprimaII is able to meet the needs of complicated applications for modern multifunction devices that require heavy concurrent applications and fluid user experience. Integrated with GPS baseband, analog and PMU, this new platform is designed to provide a cost effective solution for Automotive and Consumer markets. This patch adds the basic support for this SoC and EVB board based on device tree. It is following the ZYNQ of Xilinx in some degree. Signed-off-by: Binghua Duan <Binghua.Duan@csr.com> Signed-off-by: Rongjun Ying <Rongjun.Ying@csr.com> Signed-off-by: Zhiwu Song <Zhiwu.Song@csr.com> Signed-off-by: Yuping Luo <Yuping.Luo@csr.com> Signed-off-by: Bin Shi <Bin.Shi@csr.com> Signed-off-by: Huayi Li <Huayi.Li@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Reviewed-by: Arnd Bergmann <arnd@arndb.de>
2011-07-08 09:40:12 +00:00
/*
ARM: CSR: prima2: fix trailing whitespace Signed-off-by: Barry Song <Baohua.Song@csr.com>
2011-09-23 05:51:30 +00:00
* Defines machines for CSR SiRFprimaII
ARM: CSR: Adding CSR SiRFprimaII board support SiRFprimaII is the latest generation application processor from CSR’s Multifunction SoC product family. Designed around an ARM cortex A9 core, high-speed memory bus, advanced 3D accelerator and full-HD multi-format video decoder, SiRFprimaII is able to meet the needs of complicated applications for modern multifunction devices that require heavy concurrent applications and fluid user experience. Integrated with GPS baseband, analog and PMU, this new platform is designed to provide a cost effective solution for Automotive and Consumer markets. This patch adds the basic support for this SoC and EVB board based on device tree. It is following the ZYNQ of Xilinx in some degree. Signed-off-by: Binghua Duan <Binghua.Duan@csr.com> Signed-off-by: Rongjun Ying <Rongjun.Ying@csr.com> Signed-off-by: Zhiwu Song <Zhiwu.Song@csr.com> Signed-off-by: Yuping Luo <Yuping.Luo@csr.com> Signed-off-by: Bin Shi <Bin.Shi@csr.com> Signed-off-by: Huayi Li <Huayi.Li@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Reviewed-by: Arnd Bergmann <arnd@arndb.de>
2011-07-08 09:40:12 +00:00
*
* Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company.
*
* Licensed under GPLv2 or later.
*/
ARM: sirf: use clocksource_of infrastructure This moves the two sirf clocksource drivers to drivers/clocksource and integrates them into the framework for locating the clock sources automatically. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Tested-by: Barry Song <Baohua.Song@csr.com> Cc: John Stultz <john.stultz@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de>
2013-03-19 14:27:22 +00:00
#include <linux/clocksource.h>
ARM: CSR: Adding CSR SiRFprimaII board support SiRFprimaII is the latest generation application processor from CSR’s Multifunction SoC product family. Designed around an ARM cortex A9 core, high-speed memory bus, advanced 3D accelerator and full-HD multi-format video decoder, SiRFprimaII is able to meet the needs of complicated applications for modern multifunction devices that require heavy concurrent applications and fluid user experience. Integrated with GPS baseband, analog and PMU, this new platform is designed to provide a cost effective solution for Automotive and Consumer markets. This patch adds the basic support for this SoC and EVB board based on device tree. It is following the ZYNQ of Xilinx in some degree. Signed-off-by: Binghua Duan <Binghua.Duan@csr.com> Signed-off-by: Rongjun Ying <Rongjun.Ying@csr.com> Signed-off-by: Zhiwu Song <Zhiwu.Song@csr.com> Signed-off-by: Yuping Luo <Yuping.Luo@csr.com> Signed-off-by: Bin Shi <Bin.Shi@csr.com> Signed-off-by: Huayi Li <Huayi.Li@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Reviewed-by: Arnd Bergmann <arnd@arndb.de>
2011-07-08 09:40:12 +00:00
#include <linux/init.h>
#include <linux/kernel.h>
ARM: CSR: fix build error due to new mdesc->dma_zone_size commit 98b0124f0e2b88 "ARM: mach-prima2: move ARM_DMA_ZONE_SIZE to mdesc->dma_zone_size" causes building error: arch/arm/mach-prima2/prima2.c:39:19: error: 'SZ_256M' undeclared here (not in a function) Signed-off-by: Barry Song <baohua.song@csr.com>
2011-11-17 14:18:14 +00:00
#include <asm/sizes.h>
ARM: CSR: Adding CSR SiRFprimaII board support SiRFprimaII is the latest generation application processor from CSR’s Multifunction SoC product family. Designed around an ARM cortex A9 core, high-speed memory bus, advanced 3D accelerator and full-HD multi-format video decoder, SiRFprimaII is able to meet the needs of complicated applications for modern multifunction devices that require heavy concurrent applications and fluid user experience. Integrated with GPS baseband, analog and PMU, this new platform is designed to provide a cost effective solution for Automotive and Consumer markets. This patch adds the basic support for this SoC and EVB board based on device tree. It is following the ZYNQ of Xilinx in some degree. Signed-off-by: Binghua Duan <Binghua.Duan@csr.com> Signed-off-by: Rongjun Ying <Rongjun.Ying@csr.com> Signed-off-by: Zhiwu Song <Zhiwu.Song@csr.com> Signed-off-by: Yuping Luo <Yuping.Luo@csr.com> Signed-off-by: Bin Shi <Bin.Shi@csr.com> Signed-off-by: Huayi Li <Huayi.Li@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Reviewed-by: Arnd Bergmann <arnd@arndb.de>
2011-07-08 09:40:12 +00:00
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <linux/of.h>
#include <linux/of_platform.h>
#include "common.h"
ARM: prima2: use machine specific hook for late init Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Reviewed-by: Barry Song <baohua.song@csr.com>
2012-04-26 12:51:36 +00:00
void __init sirfsoc_init_late(void)
{
sirfsoc_pm_init();
}
ARM: sirf: use clocksource_of infrastructure This moves the two sirf clocksource drivers to drivers/clocksource and integrates them into the framework for locating the clock sources automatically. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Tested-by: Barry Song <Baohua.Song@csr.com> Cc: John Stultz <john.stultz@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de>
2013-03-19 14:27:22 +00:00
static __init void sirfsoc_init_time(void)
{
/* initialize clocking early, we want to set the OS timer */
sirfsoc_of_clk_init();
clocksource_of_init();
}
ARM: PRIMA2: add new SiRFmarco SMP SoC infrastructures this patch adds tick timer, smp entries and generic DT machine for SiRFmarco dual-core SMP chips. with the added marco, we change the defconfig, using the same defconfig, we get a zImage which can work on both prima2 and marco. Signed-off-by: Barry Song <Baohua.Song@csr.com> Cc: Mark Rutland <mark.rutland@arm.com>
2012-12-20 11:37:32 +00:00
static __init void sirfsoc_map_io(void)
{
sirfsoc_map_lluart();
sirfsoc_map_scu();
}
arm: prima2: add new SiRFatlas6 machine in common board SiRFatlas6's machine definition is almost seem with SiRFprimaII except that prima2 has a 256MB DMA zone. This patch adds SiRFatlas6 machine in common board files, and also adds atlas6 arch node in Kconfig. Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-03-18 07:04:38 +00:00
#ifdef CONFIG_ARCH_ATLAS6
static const char *atlas6_dt_match[] __initdata = {
"sirf,atlas6",
NULL
};
DT_MACHINE_START(ATLAS6_DT, "Generic ATLAS6 (Flattened Device Tree)")
/* Maintainer: Barry Song <baohua.song@csr.com> */
ARM: sirf: enable sparse IRQ Now that both irqchips for sirf are converted to not rely on legacy domains, let's move all of the platform over to sparse IRQ. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-03-19 11:19:01 +00:00
.nr_irqs = 128,
arm: prima2: add new SiRFatlas6 machine in common board SiRFatlas6's machine definition is almost seem with SiRFprimaII except that prima2 has a 256MB DMA zone. This patch adds SiRFatlas6 machine in common board files, and also adds atlas6 arch node in Kconfig. Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-03-18 07:04:38 +00:00
.map_io = sirfsoc_map_io,
ARM: sirf: use clocksource_of infrastructure This moves the two sirf clocksource drivers to drivers/clocksource and integrates them into the framework for locating the clock sources automatically. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Tested-by: Barry Song <Baohua.Song@csr.com> Cc: John Stultz <john.stultz@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de>
2013-03-19 14:27:22 +00:00
.init_time = sirfsoc_init_time,
arm: prima2: add new SiRFatlas6 machine in common board SiRFatlas6's machine definition is almost seem with SiRFprimaII except that prima2 has a 256MB DMA zone. This patch adds SiRFatlas6 machine in common board files, and also adds atlas6 arch node in Kconfig. Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-03-18 07:04:38 +00:00
.init_late = sirfsoc_init_late,
.dt_compat = atlas6_dt_match,
.restart = sirfsoc_restart,
MACHINE_END
#endif
ARM: PRIMA2: use DT_MACHINE_START and convert to generic board we will have SiRFMarco and SiRFPolo, all of them will be in the generic board. Signed-off-by: Barry Song <Baohua.Song@csr.com>
2012-08-23 05:41:57 +00:00
#ifdef CONFIG_ARCH_PRIMA2
static const char *prima2_dt_match[] __initdata = {
ARM: prima2: fix a checkpatch issue WARNING: please, no spaces at the start of a line 42: FILE: common.c:42: + "sirf,prima2",$ WARNING: please, no spaces at the start of a line 43: FILE: common.c:43: + NULL$ Signed-off-by: Barry Song <Baohua.Song@csr.com>
2013-03-05 03:00:43 +00:00
"sirf,prima2",
NULL
ARM: CSR: Adding CSR SiRFprimaII board support SiRFprimaII is the latest generation application processor from CSR’s Multifunction SoC product family. Designed around an ARM cortex A9 core, high-speed memory bus, advanced 3D accelerator and full-HD multi-format video decoder, SiRFprimaII is able to meet the needs of complicated applications for modern multifunction devices that require heavy concurrent applications and fluid user experience. Integrated with GPS baseband, analog and PMU, this new platform is designed to provide a cost effective solution for Automotive and Consumer markets. This patch adds the basic support for this SoC and EVB board based on device tree. It is following the ZYNQ of Xilinx in some degree. Signed-off-by: Binghua Duan <Binghua.Duan@csr.com> Signed-off-by: Rongjun Ying <Rongjun.Ying@csr.com> Signed-off-by: Zhiwu Song <Zhiwu.Song@csr.com> Signed-off-by: Yuping Luo <Yuping.Luo@csr.com> Signed-off-by: Bin Shi <Bin.Shi@csr.com> Signed-off-by: Huayi Li <Huayi.Li@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Reviewed-by: Arnd Bergmann <arnd@arndb.de>
2011-07-08 09:40:12 +00:00
};
ARM: PRIMA2: use DT_MACHINE_START and convert to generic board we will have SiRFMarco and SiRFPolo, all of them will be in the generic board. Signed-off-by: Barry Song <Baohua.Song@csr.com>
2012-08-23 05:41:57 +00:00
DT_MACHINE_START(PRIMA2_DT, "Generic PRIMA2 (Flattened Device Tree)")
ARM: CSR: Adding CSR SiRFprimaII board support SiRFprimaII is the latest generation application processor from CSR’s Multifunction SoC product family. Designed around an ARM cortex A9 core, high-speed memory bus, advanced 3D accelerator and full-HD multi-format video decoder, SiRFprimaII is able to meet the needs of complicated applications for modern multifunction devices that require heavy concurrent applications and fluid user experience. Integrated with GPS baseband, analog and PMU, this new platform is designed to provide a cost effective solution for Automotive and Consumer markets. This patch adds the basic support for this SoC and EVB board based on device tree. It is following the ZYNQ of Xilinx in some degree. Signed-off-by: Binghua Duan <Binghua.Duan@csr.com> Signed-off-by: Rongjun Ying <Rongjun.Ying@csr.com> Signed-off-by: Zhiwu Song <Zhiwu.Song@csr.com> Signed-off-by: Yuping Luo <Yuping.Luo@csr.com> Signed-off-by: Bin Shi <Bin.Shi@csr.com> Signed-off-by: Huayi Li <Huayi.Li@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Reviewed-by: Arnd Bergmann <arnd@arndb.de>
2011-07-08 09:40:12 +00:00
/* Maintainer: Barry Song <baohua.song@csr.com> */
ARM: sirf: enable sparse IRQ Now that both irqchips for sirf are converted to not rely on legacy domains, let's move all of the platform over to sparse IRQ. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-03-19 11:19:01 +00:00
.nr_irqs = 128,
ARM: PRIMA2: add new SiRFmarco SMP SoC infrastructures this patch adds tick timer, smp entries and generic DT machine for SiRFmarco dual-core SMP chips. with the added marco, we change the defconfig, using the same defconfig, we get a zImage which can work on both prima2 and marco. Signed-off-by: Barry Song <Baohua.Song@csr.com> Cc: Mark Rutland <mark.rutland@arm.com>
2012-12-20 11:37:32 +00:00
.map_io = sirfsoc_map_io,
ARM: sirf: use clocksource_of infrastructure This moves the two sirf clocksource drivers to drivers/clocksource and integrates them into the framework for locating the clock sources automatically. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Tested-by: Barry Song <Baohua.Song@csr.com> Cc: John Stultz <john.stultz@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de>
2013-03-19 14:27:22 +00:00
.init_time = sirfsoc_init_time,
ARM: mach-prima2: move ARM_DMA_ZONE_SIZE to mdesc->dma_zone_size Original comment: Restrict DMA-able region to workaround silicon limitation. The limitation restricts buffers available for DMA to SD/MMC hardware to be below 256MB. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2011-09-03 01:05:10 +00:00
.dma_zone_size = SZ_256M,
ARM: prima2: use machine specific hook for late init Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Reviewed-by: Barry Song <baohua.song@csr.com>
2012-04-26 12:51:36 +00:00
.init_late = sirfsoc_init_late,
ARM: PRIMA2: use DT_MACHINE_START and convert to generic board we will have SiRFMarco and SiRFPolo, all of them will be in the generic board. Signed-off-by: Barry Song <Baohua.Song@csr.com>
2012-08-23 05:41:57 +00:00
.dt_compat = prima2_dt_match,
ARM: restart: prima2: use new restart hook Hook these platforms restart code into the new restart hook rather than using arch_reset(). Reviewed-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-11-05 10:23:27 +00:00
.restart = sirfsoc_restart,
ARM: CSR: Adding CSR SiRFprimaII board support SiRFprimaII is the latest generation application processor from CSR’s Multifunction SoC product family. Designed around an ARM cortex A9 core, high-speed memory bus, advanced 3D accelerator and full-HD multi-format video decoder, SiRFprimaII is able to meet the needs of complicated applications for modern multifunction devices that require heavy concurrent applications and fluid user experience. Integrated with GPS baseband, analog and PMU, this new platform is designed to provide a cost effective solution for Automotive and Consumer markets. This patch adds the basic support for this SoC and EVB board based on device tree. It is following the ZYNQ of Xilinx in some degree. Signed-off-by: Binghua Duan <Binghua.Duan@csr.com> Signed-off-by: Rongjun Ying <Rongjun.Ying@csr.com> Signed-off-by: Zhiwu Song <Zhiwu.Song@csr.com> Signed-off-by: Yuping Luo <Yuping.Luo@csr.com> Signed-off-by: Bin Shi <Bin.Shi@csr.com> Signed-off-by: Huayi Li <Huayi.Li@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Reviewed-by: Arnd Bergmann <arnd@arndb.de>
2011-07-08 09:40:12 +00:00
MACHINE_END
ARM: PRIMA2: use DT_MACHINE_START and convert to generic board we will have SiRFMarco and SiRFPolo, all of them will be in the generic board. Signed-off-by: Barry Song <Baohua.Song@csr.com>
2012-08-23 05:41:57 +00:00
#endif
ARM: PRIMA2: add new SiRFmarco SMP SoC infrastructures this patch adds tick timer, smp entries and generic DT machine for SiRFmarco dual-core SMP chips. with the added marco, we change the defconfig, using the same defconfig, we get a zImage which can work on both prima2 and marco. Signed-off-by: Barry Song <Baohua.Song@csr.com> Cc: Mark Rutland <mark.rutland@arm.com>
2012-12-20 11:37:32 +00:00
#ifdef CONFIG_ARCH_MARCO
static const char *marco_dt_match[] __initdata = {
"sirf,marco",
NULL
};
DT_MACHINE_START(MARCO_DT, "Generic MARCO (Flattened Device Tree)")
/* Maintainer: Barry Song <baohua.song@csr.com> */
.smp = smp_ops(sirfsoc_smp_ops),
.map_io = sirfsoc_map_io,
ARM: sirf: use clocksource_of infrastructure This moves the two sirf clocksource drivers to drivers/clocksource and integrates them into the framework for locating the clock sources automatically. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Tested-by: Barry Song <Baohua.Song@csr.com> Cc: John Stultz <john.stultz@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de>
2013-03-19 14:27:22 +00:00
.init_time = sirfsoc_init_time,
ARM: PRIMA2: add new SiRFmarco SMP SoC infrastructures this patch adds tick timer, smp entries and generic DT machine for SiRFmarco dual-core SMP chips. with the added marco, we change the defconfig, using the same defconfig, we get a zImage which can work on both prima2 and marco. Signed-off-by: Barry Song <Baohua.Song@csr.com> Cc: Mark Rutland <mark.rutland@arm.com>
2012-12-20 11:37:32 +00:00
.init_late = sirfsoc_init_late,
.dt_compat = marco_dt_match,
.restart = sirfsoc_restart,
MACHINE_END
#endif
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