2019-05-01 15:57:25 +00:00
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/* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */
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/* Copyright(c) 2015-17 Intel Corporation. */
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2017-12-14 05:49:34 +00:00
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#ifndef __SDW_BUS_H
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#define __SDW_BUS_H
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2018-07-27 09:14:16 +00:00
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#define DEFAULT_BANK_SWITCH_TIMEOUT 3000
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2020-01-15 00:08:35 +00:00
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#define DEFAULT_PROBE_TIMEOUT 2000
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2018-07-27 09:14:16 +00:00
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2021-03-02 07:51:04 +00:00
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u64 sdw_dmi_override_adr(struct sdw_bus *bus, u64 addr);
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2017-12-14 05:49:34 +00:00
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#if IS_ENABLED(CONFIG_ACPI)
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int sdw_acpi_find_slaves(struct sdw_bus *bus);
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#else
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static inline int sdw_acpi_find_slaves(struct sdw_bus *bus)
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{
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return -ENOTSUPP;
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}
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#endif
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2019-08-29 16:35:12 +00:00
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int sdw_of_find_slaves(struct sdw_bus *bus);
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2017-12-14 05:49:34 +00:00
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void sdw_extract_slave_id(struct sdw_bus *bus,
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2019-05-01 15:57:26 +00:00
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u64 addr, struct sdw_slave_id *id);
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2020-09-24 19:44:29 +00:00
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int sdw_slave_add(struct sdw_bus *bus, struct sdw_slave_id *id,
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struct fwnode_handle *fwnode);
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2020-05-18 17:43:21 +00:00
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int sdw_master_device_add(struct sdw_bus *bus, struct device *parent,
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struct fwnode_handle *fwnode);
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int sdw_master_device_del(struct sdw_bus *bus);
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2017-12-14 05:49:34 +00:00
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2019-08-21 18:58:18 +00:00
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#ifdef CONFIG_DEBUG_FS
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void sdw_bus_debugfs_init(struct sdw_bus *bus);
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void sdw_bus_debugfs_exit(struct sdw_bus *bus);
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void sdw_slave_debugfs_init(struct sdw_slave *slave);
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void sdw_slave_debugfs_exit(struct sdw_slave *slave);
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void sdw_debugfs_init(void);
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void sdw_debugfs_exit(void);
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#else
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static inline void sdw_bus_debugfs_init(struct sdw_bus *bus) {}
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static inline void sdw_bus_debugfs_exit(struct sdw_bus *bus) {}
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static inline void sdw_slave_debugfs_init(struct sdw_slave *slave) {}
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static inline void sdw_slave_debugfs_exit(struct sdw_slave *slave) {}
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static inline void sdw_debugfs_init(void) {}
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static inline void sdw_debugfs_exit(void) {}
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#endif
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2017-12-14 05:49:37 +00:00
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enum {
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SDW_MSG_FLAG_READ = 0,
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SDW_MSG_FLAG_WRITE,
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};
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/**
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* struct sdw_msg - Message structure
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* @addr: Register address accessed in the Slave
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* @len: number of messages
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* @dev_num: Slave device number
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* @addr_page1: SCP address page 1 Slave register
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* @addr_page2: SCP address page 2 Slave register
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* @flags: transfer flags, indicate if xfer is read or write
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* @buf: message data buffer
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* @ssp_sync: Send message at SSP (Stream Synchronization Point)
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* @page: address requires paging
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*/
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struct sdw_msg {
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u16 addr;
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u16 len;
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u8 dev_num;
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u8 addr_page1;
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u8 addr_page2;
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u8 flags;
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u8 *buf;
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bool ssp_sync;
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bool page;
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};
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2018-04-26 13:08:28 +00:00
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#define SDW_DOUBLE_RATE_FACTOR 2
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2020-09-08 13:15:20 +00:00
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#define SDW_STRM_RATE_GROUPING 1
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2018-04-26 13:08:28 +00:00
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2019-08-06 00:55:10 +00:00
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extern int sdw_rows[SDW_FRAME_ROWS];
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extern int sdw_cols[SDW_FRAME_COLS];
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int sdw_find_row_index(int row);
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int sdw_find_col_index(int col);
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2018-04-26 13:08:28 +00:00
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2018-04-26 13:08:13 +00:00
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/**
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* sdw_port_runtime: Runtime port parameters for Master or Slave
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*
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* @num: Port number. For audio streams, valid port number ranges from
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* [1,14]
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* @ch_mask: Channel mask
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* @transport_params: Transport parameters
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* @port_params: Port parameters
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* @port_node: List node for Master or Slave port_list
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*
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* SoundWire spec has no mention of ports for Master interface but the
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* concept is logically extended.
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*/
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struct sdw_port_runtime {
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int num;
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int ch_mask;
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struct sdw_transport_params transport_params;
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struct sdw_port_params port_params;
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struct list_head port_node;
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};
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2018-04-26 13:08:08 +00:00
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/**
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* sdw_slave_runtime: Runtime Stream parameters for Slave
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*
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* @slave: Slave handle
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* @direction: Data direction for Slave
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* @ch_count: Number of channels handled by the Slave for
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* this stream
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* @m_rt_node: sdw_master_runtime list node
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2018-04-26 13:08:13 +00:00
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* @port_list: List of Slave Ports configured for this stream
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2018-04-26 13:08:08 +00:00
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*/
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struct sdw_slave_runtime {
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struct sdw_slave *slave;
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enum sdw_data_direction direction;
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unsigned int ch_count;
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struct list_head m_rt_node;
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2018-04-26 13:08:13 +00:00
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struct list_head port_list;
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2018-04-26 13:08:08 +00:00
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};
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/**
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* sdw_master_runtime: Runtime stream parameters for Master
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*
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* @bus: Bus handle
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* @stream: Stream runtime handle
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* @direction: Data direction for Master
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* @ch_count: Number of channels handled by the Master for
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* this stream, can be zero.
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* @slave_rt_list: Slave runtime list
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2018-04-26 13:08:13 +00:00
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* @port_list: List of Master Ports configured for this stream, can be zero.
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2018-07-27 09:14:13 +00:00
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* @stream_node: sdw_stream_runtime master_list node
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2018-04-26 13:08:08 +00:00
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* @bus_node: sdw_bus m_rt_list node
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*/
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struct sdw_master_runtime {
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struct sdw_bus *bus;
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struct sdw_stream_runtime *stream;
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enum sdw_data_direction direction;
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unsigned int ch_count;
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struct list_head slave_rt_list;
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2018-04-26 13:08:13 +00:00
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struct list_head port_list;
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2018-07-27 09:14:13 +00:00
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struct list_head stream_node;
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2018-04-26 13:08:08 +00:00
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struct list_head bus_node;
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};
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2018-04-26 13:08:17 +00:00
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struct sdw_dpn_prop *sdw_get_slave_dpn_prop(struct sdw_slave *slave,
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2019-05-01 15:57:26 +00:00
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enum sdw_data_direction direction,
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unsigned int port_num);
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2018-04-26 13:08:23 +00:00
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int sdw_configure_dpn_intr(struct sdw_slave *slave, int port,
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2019-05-01 15:57:26 +00:00
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bool enable, int mask);
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2018-04-26 13:08:17 +00:00
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2017-12-14 05:49:37 +00:00
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int sdw_transfer(struct sdw_bus *bus, struct sdw_msg *msg);
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int sdw_transfer_defer(struct sdw_bus *bus, struct sdw_msg *msg,
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2019-05-01 15:57:26 +00:00
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struct sdw_defer *defer);
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2017-12-14 05:49:37 +00:00
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2017-12-14 05:49:40 +00:00
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#define SDW_READ_INTR_CLEAR_RETRY 10
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2017-12-14 05:49:37 +00:00
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int sdw_fill_msg(struct sdw_msg *msg, struct sdw_slave *slave,
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2019-05-01 15:57:26 +00:00
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u32 addr, size_t count, u16 dev_num, u8 flags, u8 *buf);
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2017-12-14 05:49:37 +00:00
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2020-09-08 13:15:20 +00:00
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/* Retrieve and return channel count from channel mask */
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static inline int sdw_ch_mask_to_ch(int ch_mask)
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{
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int c = 0;
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for (c = 0; ch_mask; ch_mask >>= 1)
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c += ch_mask & 1;
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return c;
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}
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/* Fill transport parameter data structure */
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static inline void sdw_fill_xport_params(struct sdw_transport_params *params,
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int port_num, bool grp_ctrl_valid,
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int grp_ctrl, int sample_int,
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int off1, int off2,
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int hstart, int hstop,
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int pack_mode, int lane_ctrl)
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{
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params->port_num = port_num;
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params->blk_grp_ctrl_valid = grp_ctrl_valid;
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params->blk_grp_ctrl = grp_ctrl;
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params->sample_interval = sample_int;
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params->offset1 = off1;
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params->offset2 = off2;
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params->hstart = hstart;
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params->hstop = hstop;
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params->blk_pkg_mode = pack_mode;
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params->lane_ctrl = lane_ctrl;
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}
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/* Fill port parameter data structure */
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static inline void sdw_fill_port_params(struct sdw_port_params *params,
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int port_num, int bps,
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int flow_mode, int data_mode)
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{
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params->num = port_num;
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params->bps = bps;
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params->flow_mode = flow_mode;
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params->data_mode = data_mode;
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}
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2017-12-14 05:49:39 +00:00
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/* Read-Modify-Write Slave register */
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2020-09-08 13:15:20 +00:00
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static inline int sdw_update(struct sdw_slave *slave, u32 addr, u8 mask, u8 val)
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2017-12-14 05:49:39 +00:00
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{
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int tmp;
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tmp = sdw_read(slave, addr);
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if (tmp < 0)
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return tmp;
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tmp = (tmp & ~mask) | val;
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return sdw_write(slave, addr, tmp);
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}
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2020-09-08 13:45:20 +00:00
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/* broadcast read/write for tests */
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int sdw_bread_no_pm_unlocked(struct sdw_bus *bus, u16 dev_num, u32 addr);
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int sdw_bwrite_no_pm_unlocked(struct sdw_bus *bus, u16 dev_num, u32 addr, u8 value);
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2020-01-15 00:08:40 +00:00
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/*
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* At the moment we only track Master-initiated hw_reset.
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* Additional fields can be added as needed
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*/
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#define SDW_UNATTACH_REQUEST_MASTER_RESET BIT(0)
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void sdw_clear_slave_status(struct sdw_bus *bus, u32 request);
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2020-05-18 20:35:51 +00:00
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int sdw_slave_modalias(const struct sdw_slave *slave, char *buf, size_t size);
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2020-01-15 00:08:40 +00:00
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2017-12-14 05:49:34 +00:00
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#endif /* __SDW_BUS_H */
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