2013-01-22 00:36:12 +00:00
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/*
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* Copyright (C) 2012 ARM Ltd.
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* Author: Marc Zyngier <marc.zyngier@arm.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <linux/kvm.h>
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#include <linux/kvm_host.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <asm/kvm_emulate.h>
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2013-01-22 00:36:13 +00:00
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#define VGIC_ADDR_UNDEF (-1)
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#define IS_VGIC_ADDR_UNDEF(_x) ((_x) == VGIC_ADDR_UNDEF)
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2013-01-22 00:36:12 +00:00
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#define ACCESS_READ_VALUE (1 << 0)
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#define ACCESS_READ_RAZ (0 << 0)
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#define ACCESS_READ_MASK(x) ((x) & (1 << 0))
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#define ACCESS_WRITE_IGNORED (0 << 1)
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#define ACCESS_WRITE_SETBIT (1 << 1)
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#define ACCESS_WRITE_CLEARBIT (2 << 1)
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#define ACCESS_WRITE_VALUE (3 << 1)
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#define ACCESS_WRITE_MASK(x) ((x) & (3 << 1))
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static u32 mmio_data_read(struct kvm_exit_mmio *mmio, u32 mask)
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{
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return *((u32 *)mmio->data) & mask;
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}
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static void mmio_data_write(struct kvm_exit_mmio *mmio, u32 mask, u32 value)
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{
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*((u32 *)mmio->data) = value & mask;
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}
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/**
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* vgic_reg_access - access vgic register
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* @mmio: pointer to the data describing the mmio access
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* @reg: pointer to the virtual backing of vgic distributor data
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* @offset: least significant 2 bits used for word offset
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* @mode: ACCESS_ mode (see defines above)
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*
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* Helper to make vgic register access easier using one of the access
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* modes defined for vgic register access
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* (read,raz,write-ignored,setbit,clearbit,write)
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*/
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static void vgic_reg_access(struct kvm_exit_mmio *mmio, u32 *reg,
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phys_addr_t offset, int mode)
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{
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int word_offset = (offset & 3) * 8;
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u32 mask = (1UL << (mmio->len * 8)) - 1;
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u32 regval;
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/*
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* Any alignment fault should have been delivered to the guest
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* directly (ARM ARM B3.12.7 "Prioritization of aborts").
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*/
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if (reg) {
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regval = *reg;
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} else {
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BUG_ON(mode != (ACCESS_READ_RAZ | ACCESS_WRITE_IGNORED));
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regval = 0;
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}
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if (mmio->is_write) {
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u32 data = mmio_data_read(mmio, mask) << word_offset;
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switch (ACCESS_WRITE_MASK(mode)) {
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case ACCESS_WRITE_IGNORED:
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return;
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case ACCESS_WRITE_SETBIT:
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regval |= data;
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break;
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case ACCESS_WRITE_CLEARBIT:
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regval &= ~data;
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break;
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case ACCESS_WRITE_VALUE:
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regval = (regval & ~(mask << word_offset)) | data;
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break;
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}
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*reg = regval;
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} else {
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switch (ACCESS_READ_MASK(mode)) {
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case ACCESS_READ_RAZ:
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regval = 0;
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/* fall through */
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case ACCESS_READ_VALUE:
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mmio_data_write(mmio, mask, regval >> word_offset);
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}
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}
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}
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/*
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* I would have liked to use the kvm_bus_io_*() API instead, but it
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* cannot cope with banked registers (only the VM pointer is passed
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* around, and we need the vcpu). One of these days, someone please
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* fix it!
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*/
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struct mmio_range {
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phys_addr_t base;
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unsigned long len;
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bool (*handle_mmio)(struct kvm_vcpu *vcpu, struct kvm_exit_mmio *mmio,
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phys_addr_t offset);
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};
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static const struct mmio_range vgic_ranges[] = {
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{}
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};
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static const
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struct mmio_range *find_matching_range(const struct mmio_range *ranges,
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struct kvm_exit_mmio *mmio,
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phys_addr_t base)
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{
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const struct mmio_range *r = ranges;
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phys_addr_t addr = mmio->phys_addr - base;
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while (r->len) {
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if (addr >= r->base &&
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(addr + mmio->len) <= (r->base + r->len))
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return r;
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r++;
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}
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return NULL;
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}
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/**
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* vgic_handle_mmio - handle an in-kernel MMIO access
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* @vcpu: pointer to the vcpu performing the access
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* @run: pointer to the kvm_run structure
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* @mmio: pointer to the data describing the access
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*
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* returns true if the MMIO access has been performed in kernel space,
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* and false if it needs to be emulated in user space.
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*/
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bool vgic_handle_mmio(struct kvm_vcpu *vcpu, struct kvm_run *run,
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struct kvm_exit_mmio *mmio)
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{
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return KVM_EXIT_MMIO;
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}
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2013-01-22 00:36:13 +00:00
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static bool vgic_ioaddr_overlap(struct kvm *kvm)
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{
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phys_addr_t dist = kvm->arch.vgic.vgic_dist_base;
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phys_addr_t cpu = kvm->arch.vgic.vgic_cpu_base;
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if (IS_VGIC_ADDR_UNDEF(dist) || IS_VGIC_ADDR_UNDEF(cpu))
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return 0;
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if ((dist <= cpu && dist + KVM_VGIC_V2_DIST_SIZE > cpu) ||
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(cpu <= dist && cpu + KVM_VGIC_V2_CPU_SIZE > dist))
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return -EBUSY;
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return 0;
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}
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static int vgic_ioaddr_assign(struct kvm *kvm, phys_addr_t *ioaddr,
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phys_addr_t addr, phys_addr_t size)
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{
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int ret;
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if (!IS_VGIC_ADDR_UNDEF(*ioaddr))
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return -EEXIST;
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if (addr + size < addr)
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return -EINVAL;
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ret = vgic_ioaddr_overlap(kvm);
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if (ret)
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return ret;
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*ioaddr = addr;
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return ret;
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}
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int kvm_vgic_set_addr(struct kvm *kvm, unsigned long type, u64 addr)
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{
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int r = 0;
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struct vgic_dist *vgic = &kvm->arch.vgic;
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if (addr & ~KVM_PHYS_MASK)
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return -E2BIG;
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if (addr & ~PAGE_MASK)
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return -EINVAL;
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mutex_lock(&kvm->lock);
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switch (type) {
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case KVM_VGIC_V2_ADDR_TYPE_DIST:
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r = vgic_ioaddr_assign(kvm, &vgic->vgic_dist_base,
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addr, KVM_VGIC_V2_DIST_SIZE);
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break;
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case KVM_VGIC_V2_ADDR_TYPE_CPU:
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r = vgic_ioaddr_assign(kvm, &vgic->vgic_cpu_base,
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addr, KVM_VGIC_V2_CPU_SIZE);
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break;
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default:
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r = -ENODEV;
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}
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mutex_unlock(&kvm->lock);
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return r;
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}
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