pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
/*
|
|
|
|
* pinmux driver for CSR SiRFprimaII
|
|
|
|
*
|
2014-02-12 13:54:47 +00:00
|
|
|
* Copyright (c) 2011 - 2014 Cambridge Silicon Radio Limited, a CSR plc group
|
|
|
|
* company.
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
*
|
|
|
|
* Licensed under GPLv2 or later.
|
|
|
|
*/
|
|
|
|
|
|
|
|
#include <linux/init.h>
|
|
|
|
#include <linux/module.h>
|
|
|
|
#include <linux/irq.h>
|
|
|
|
#include <linux/platform_device.h>
|
|
|
|
#include <linux/io.h>
|
|
|
|
#include <linux/slab.h>
|
|
|
|
#include <linux/err.h>
|
|
|
|
#include <linux/pinctrl/pinctrl.h>
|
|
|
|
#include <linux/pinctrl/pinmux.h>
|
|
|
|
#include <linux/pinctrl/consumer.h>
|
|
|
|
#include <linux/pinctrl/machine.h>
|
|
|
|
#include <linux/of.h>
|
|
|
|
#include <linux/of_address.h>
|
|
|
|
#include <linux/of_device.h>
|
|
|
|
#include <linux/of_platform.h>
|
|
|
|
#include <linux/bitops.h>
|
|
|
|
#include <linux/gpio.h>
|
|
|
|
#include <linux/of_gpio.h>
|
|
|
|
|
|
|
|
#include "pinctrl-sirf.h"
|
|
|
|
|
|
|
|
#define DRIVER_NAME "pinmux-sirf"
|
|
|
|
|
|
|
|
struct sirfsoc_gpio_bank {
|
|
|
|
int id;
|
|
|
|
int parent_irq;
|
|
|
|
spinlock_t lock;
|
2014-04-15 06:43:46 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
struct sirfsoc_gpio_chip {
|
|
|
|
struct of_mm_gpio_chip chip;
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
bool is_marco; /* for marco, some registers are different with prima2 */
|
2014-04-15 06:43:46 +00:00
|
|
|
struct sirfsoc_gpio_bank sgpio_bank[SIRFSOC_GPIO_NO_OF_BANKS];
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
static DEFINE_SPINLOCK(sgpio_lock);
|
|
|
|
|
|
|
|
static struct sirfsoc_pin_group *sirfsoc_pin_groups;
|
|
|
|
static int sirfsoc_pingrp_cnt;
|
|
|
|
|
|
|
|
static int sirfsoc_get_groups_count(struct pinctrl_dev *pctldev)
|
|
|
|
{
|
|
|
|
return sirfsoc_pingrp_cnt;
|
|
|
|
}
|
|
|
|
|
|
|
|
static const char *sirfsoc_get_group_name(struct pinctrl_dev *pctldev,
|
|
|
|
unsigned selector)
|
|
|
|
{
|
|
|
|
return sirfsoc_pin_groups[selector].name;
|
|
|
|
}
|
|
|
|
|
2014-08-18 08:49:21 +00:00
|
|
|
static int sirfsoc_get_group_pins(struct pinctrl_dev *pctldev,
|
|
|
|
unsigned selector,
|
|
|
|
const unsigned **pins,
|
|
|
|
unsigned *num_pins)
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
{
|
|
|
|
*pins = sirfsoc_pin_groups[selector].pins;
|
|
|
|
*num_pins = sirfsoc_pin_groups[selector].num_pins;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2014-08-18 08:49:21 +00:00
|
|
|
static void sirfsoc_pin_dbg_show(struct pinctrl_dev *pctldev,
|
|
|
|
struct seq_file *s, unsigned offset)
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
{
|
|
|
|
seq_printf(s, " " DRIVER_NAME);
|
|
|
|
}
|
|
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|
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|
static int sirfsoc_dt_node_to_map(struct pinctrl_dev *pctldev,
|
|
|
|
struct device_node *np_config,
|
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|
|
struct pinctrl_map **map, unsigned *num_maps)
|
|
|
|
{
|
|
|
|
struct sirfsoc_pmx *spmx = pinctrl_dev_get_drvdata(pctldev);
|
|
|
|
struct device_node *np;
|
|
|
|
struct property *prop;
|
|
|
|
const char *function, *group;
|
|
|
|
int ret, index = 0, count = 0;
|
|
|
|
|
|
|
|
/* calculate number of maps required */
|
|
|
|
for_each_child_of_node(np_config, np) {
|
|
|
|
ret = of_property_read_string(np, "sirf,function", &function);
|
|
|
|
if (ret < 0)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
ret = of_property_count_strings(np, "sirf,pins");
|
|
|
|
if (ret < 0)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
count += ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (!count) {
|
|
|
|
dev_err(spmx->dev, "No child nodes passed via DT\n");
|
|
|
|
return -ENODEV;
|
|
|
|
}
|
|
|
|
|
|
|
|
*map = kzalloc(sizeof(**map) * count, GFP_KERNEL);
|
|
|
|
if (!*map)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
for_each_child_of_node(np_config, np) {
|
|
|
|
of_property_read_string(np, "sirf,function", &function);
|
|
|
|
of_property_for_each_string(np, "sirf,pins", prop, group) {
|
|
|
|
(*map)[index].type = PIN_MAP_TYPE_MUX_GROUP;
|
|
|
|
(*map)[index].data.mux.group = group;
|
|
|
|
(*map)[index].data.mux.function = function;
|
|
|
|
index++;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
*num_maps = count;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void sirfsoc_dt_free_map(struct pinctrl_dev *pctldev,
|
|
|
|
struct pinctrl_map *map, unsigned num_maps)
|
|
|
|
{
|
|
|
|
kfree(map);
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct pinctrl_ops sirfsoc_pctrl_ops = {
|
|
|
|
.get_groups_count = sirfsoc_get_groups_count,
|
|
|
|
.get_group_name = sirfsoc_get_group_name,
|
|
|
|
.get_group_pins = sirfsoc_get_group_pins,
|
|
|
|
.pin_dbg_show = sirfsoc_pin_dbg_show,
|
|
|
|
.dt_node_to_map = sirfsoc_dt_node_to_map,
|
|
|
|
.dt_free_map = sirfsoc_dt_free_map,
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct sirfsoc_pmx_func *sirfsoc_pmx_functions;
|
|
|
|
static int sirfsoc_pmxfunc_cnt;
|
|
|
|
|
2014-08-18 08:49:21 +00:00
|
|
|
static void sirfsoc_pinmux_endisable(struct sirfsoc_pmx *spmx,
|
|
|
|
unsigned selector, bool enable)
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
{
|
|
|
|
int i;
|
2014-08-18 08:49:21 +00:00
|
|
|
const struct sirfsoc_padmux *mux =
|
|
|
|
sirfsoc_pmx_functions[selector].padmux;
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
const struct sirfsoc_muxmask *mask = mux->muxmask;
|
|
|
|
|
|
|
|
for (i = 0; i < mux->muxmask_counts; i++) {
|
|
|
|
u32 muxval;
|
|
|
|
if (!spmx->is_marco) {
|
2014-08-18 08:49:21 +00:00
|
|
|
muxval = readl(spmx->gpio_virtbase +
|
|
|
|
SIRFSOC_GPIO_PAD_EN(mask[i].group));
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
if (enable)
|
|
|
|
muxval = muxval & ~mask[i].mask;
|
|
|
|
else
|
|
|
|
muxval = muxval | mask[i].mask;
|
2014-08-18 08:49:21 +00:00
|
|
|
writel(muxval, spmx->gpio_virtbase +
|
|
|
|
SIRFSOC_GPIO_PAD_EN(mask[i].group));
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
} else {
|
|
|
|
if (enable)
|
|
|
|
writel(mask[i].mask, spmx->gpio_virtbase +
|
|
|
|
SIRFSOC_GPIO_PAD_EN_CLR(mask[i].group));
|
|
|
|
else
|
|
|
|
writel(mask[i].mask, spmx->gpio_virtbase +
|
|
|
|
SIRFSOC_GPIO_PAD_EN(mask[i].group));
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (mux->funcmask && enable) {
|
|
|
|
u32 func_en_val;
|
2013-09-29 14:27:59 +00:00
|
|
|
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
func_en_val =
|
2013-09-29 14:27:59 +00:00
|
|
|
readl(spmx->rsc_virtbase + mux->ctrlreg);
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
func_en_val =
|
2013-09-29 14:27:59 +00:00
|
|
|
(func_en_val & ~mux->funcmask) | (mux->funcval);
|
|
|
|
writel(func_en_val, spmx->rsc_virtbase + mux->ctrlreg);
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static int sirfsoc_pinmux_enable(struct pinctrl_dev *pmxdev, unsigned selector,
|
|
|
|
unsigned group)
|
|
|
|
{
|
|
|
|
struct sirfsoc_pmx *spmx;
|
|
|
|
|
|
|
|
spmx = pinctrl_dev_get_drvdata(pmxdev);
|
|
|
|
sirfsoc_pinmux_endisable(spmx, selector, true);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int sirfsoc_pinmux_get_funcs_count(struct pinctrl_dev *pmxdev)
|
|
|
|
{
|
|
|
|
return sirfsoc_pmxfunc_cnt;
|
|
|
|
}
|
|
|
|
|
|
|
|
static const char *sirfsoc_pinmux_get_func_name(struct pinctrl_dev *pctldev,
|
|
|
|
unsigned selector)
|
|
|
|
{
|
|
|
|
return sirfsoc_pmx_functions[selector].name;
|
|
|
|
}
|
|
|
|
|
2014-08-18 08:49:21 +00:00
|
|
|
static int sirfsoc_pinmux_get_groups(struct pinctrl_dev *pctldev,
|
|
|
|
unsigned selector,
|
|
|
|
const char * const **groups,
|
|
|
|
unsigned * const num_groups)
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
{
|
|
|
|
*groups = sirfsoc_pmx_functions[selector].groups;
|
|
|
|
*num_groups = sirfsoc_pmx_functions[selector].num_groups;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int sirfsoc_pinmux_request_gpio(struct pinctrl_dev *pmxdev,
|
|
|
|
struct pinctrl_gpio_range *range, unsigned offset)
|
|
|
|
{
|
|
|
|
struct sirfsoc_pmx *spmx;
|
|
|
|
|
|
|
|
int group = range->id;
|
|
|
|
|
|
|
|
u32 muxval;
|
|
|
|
|
|
|
|
spmx = pinctrl_dev_get_drvdata(pmxdev);
|
|
|
|
|
|
|
|
if (!spmx->is_marco) {
|
2014-08-18 08:49:21 +00:00
|
|
|
muxval = readl(spmx->gpio_virtbase +
|
|
|
|
SIRFSOC_GPIO_PAD_EN(group));
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
muxval = muxval | (1 << (offset - range->pin_base));
|
2014-08-18 08:49:21 +00:00
|
|
|
writel(muxval, spmx->gpio_virtbase +
|
|
|
|
SIRFSOC_GPIO_PAD_EN(group));
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
} else {
|
|
|
|
writel(1 << (offset - range->pin_base), spmx->gpio_virtbase +
|
|
|
|
SIRFSOC_GPIO_PAD_EN(group));
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct pinmux_ops sirfsoc_pinmux_ops = {
|
|
|
|
.enable = sirfsoc_pinmux_enable,
|
|
|
|
.get_functions_count = sirfsoc_pinmux_get_funcs_count,
|
|
|
|
.get_function_name = sirfsoc_pinmux_get_func_name,
|
|
|
|
.get_function_groups = sirfsoc_pinmux_get_groups,
|
|
|
|
.gpio_request_enable = sirfsoc_pinmux_request_gpio,
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct pinctrl_desc sirfsoc_pinmux_desc = {
|
|
|
|
.name = DRIVER_NAME,
|
|
|
|
.pctlops = &sirfsoc_pctrl_ops,
|
|
|
|
.pmxops = &sirfsoc_pinmux_ops,
|
|
|
|
.owner = THIS_MODULE,
|
|
|
|
};
|
|
|
|
|
|
|
|
static void __iomem *sirfsoc_rsc_of_iomap(void)
|
|
|
|
{
|
|
|
|
const struct of_device_id rsc_ids[] = {
|
|
|
|
{ .compatible = "sirf,prima2-rsc" },
|
|
|
|
{ .compatible = "sirf,marco-rsc" },
|
|
|
|
{}
|
|
|
|
};
|
|
|
|
struct device_node *np;
|
|
|
|
|
|
|
|
np = of_find_matching_node(NULL, rsc_ids);
|
|
|
|
if (!np)
|
|
|
|
panic("unable to find compatible rsc node in dtb\n");
|
|
|
|
|
|
|
|
return of_iomap(np, 0);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int sirfsoc_gpio_of_xlate(struct gpio_chip *gc,
|
2014-04-15 06:43:46 +00:00
|
|
|
const struct of_phandle_args *gpiospec,
|
|
|
|
u32 *flags)
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
{
|
2014-04-15 06:43:46 +00:00
|
|
|
if (gpiospec->args[0] > SIRFSOC_GPIO_NO_OF_BANKS * SIRFSOC_GPIO_BANK_SIZE)
|
2013-07-04 07:55:28 +00:00
|
|
|
return -EINVAL;
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
|
2014-04-15 06:43:46 +00:00
|
|
|
if (flags)
|
2013-07-04 07:55:28 +00:00
|
|
|
*flags = gpiospec->args[1];
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
|
2014-04-15 06:43:46 +00:00
|
|
|
return gpiospec->args[0];
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static const struct of_device_id pinmux_ids[] = {
|
|
|
|
{ .compatible = "sirf,prima2-pinctrl", .data = &prima2_pinctrl_data, },
|
|
|
|
{ .compatible = "sirf,atlas6-pinctrl", .data = &atlas6_pinctrl_data, },
|
|
|
|
{ .compatible = "sirf,marco-pinctrl", .data = &prima2_pinctrl_data, },
|
|
|
|
{}
|
|
|
|
};
|
|
|
|
|
|
|
|
static int sirfsoc_pinmux_probe(struct platform_device *pdev)
|
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
struct sirfsoc_pmx *spmx;
|
|
|
|
struct device_node *np = pdev->dev.of_node;
|
|
|
|
const struct sirfsoc_pinctrl_data *pdata;
|
|
|
|
|
|
|
|
/* Create state holders etc for this driver */
|
|
|
|
spmx = devm_kzalloc(&pdev->dev, sizeof(*spmx), GFP_KERNEL);
|
|
|
|
if (!spmx)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
spmx->dev = &pdev->dev;
|
|
|
|
|
|
|
|
platform_set_drvdata(pdev, spmx);
|
|
|
|
|
|
|
|
spmx->gpio_virtbase = of_iomap(np, 0);
|
|
|
|
if (!spmx->gpio_virtbase) {
|
|
|
|
dev_err(&pdev->dev, "can't map gpio registers\n");
|
|
|
|
return -ENOMEM;
|
|
|
|
}
|
|
|
|
|
|
|
|
spmx->rsc_virtbase = sirfsoc_rsc_of_iomap();
|
|
|
|
if (!spmx->rsc_virtbase) {
|
|
|
|
ret = -ENOMEM;
|
|
|
|
dev_err(&pdev->dev, "can't map rsc registers\n");
|
|
|
|
goto out_no_rsc_remap;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (of_device_is_compatible(np, "sirf,marco-pinctrl"))
|
|
|
|
spmx->is_marco = 1;
|
|
|
|
|
|
|
|
pdata = of_match_node(pinmux_ids, np)->data;
|
|
|
|
sirfsoc_pin_groups = pdata->grps;
|
|
|
|
sirfsoc_pingrp_cnt = pdata->grps_cnt;
|
|
|
|
sirfsoc_pmx_functions = pdata->funcs;
|
|
|
|
sirfsoc_pmxfunc_cnt = pdata->funcs_cnt;
|
|
|
|
sirfsoc_pinmux_desc.pins = pdata->pads;
|
|
|
|
sirfsoc_pinmux_desc.npins = pdata->pads_cnt;
|
|
|
|
|
|
|
|
|
|
|
|
/* Now register the pin controller and all pins it handles */
|
|
|
|
spmx->pmx = pinctrl_register(&sirfsoc_pinmux_desc, &pdev->dev, spmx);
|
|
|
|
if (!spmx->pmx) {
|
|
|
|
dev_err(&pdev->dev, "could not register SIRFSOC pinmux driver\n");
|
|
|
|
ret = -EINVAL;
|
|
|
|
goto out_no_pmx;
|
|
|
|
}
|
|
|
|
|
|
|
|
dev_info(&pdev->dev, "initialized SIRFSOC pinmux driver\n");
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
out_no_pmx:
|
|
|
|
iounmap(spmx->rsc_virtbase);
|
|
|
|
out_no_rsc_remap:
|
|
|
|
iounmap(spmx->gpio_virtbase);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2013-05-16 03:17:09 +00:00
|
|
|
#ifdef CONFIG_PM_SLEEP
|
|
|
|
static int sirfsoc_pinmux_suspend_noirq(struct device *dev)
|
|
|
|
{
|
|
|
|
int i, j;
|
|
|
|
struct sirfsoc_pmx *spmx = dev_get_drvdata(dev);
|
|
|
|
|
|
|
|
for (i = 0; i < SIRFSOC_GPIO_NO_OF_BANKS; i++) {
|
|
|
|
for (j = 0; j < SIRFSOC_GPIO_BANK_SIZE; j++) {
|
|
|
|
spmx->gpio_regs[i][j] = readl(spmx->gpio_virtbase +
|
|
|
|
SIRFSOC_GPIO_CTRL(i, j));
|
|
|
|
}
|
|
|
|
spmx->ints_regs[i] = readl(spmx->gpio_virtbase +
|
|
|
|
SIRFSOC_GPIO_INT_STATUS(i));
|
|
|
|
spmx->paden_regs[i] = readl(spmx->gpio_virtbase +
|
|
|
|
SIRFSOC_GPIO_PAD_EN(i));
|
|
|
|
}
|
|
|
|
spmx->dspen_regs = readl(spmx->gpio_virtbase + SIRFSOC_GPIO_DSP_EN0);
|
|
|
|
|
|
|
|
for (i = 0; i < 3; i++)
|
|
|
|
spmx->rsc_regs[i] = readl(spmx->rsc_virtbase + 4 * i);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int sirfsoc_pinmux_resume_noirq(struct device *dev)
|
|
|
|
{
|
|
|
|
int i, j;
|
|
|
|
struct sirfsoc_pmx *spmx = dev_get_drvdata(dev);
|
|
|
|
|
|
|
|
for (i = 0; i < SIRFSOC_GPIO_NO_OF_BANKS; i++) {
|
|
|
|
for (j = 0; j < SIRFSOC_GPIO_BANK_SIZE; j++) {
|
|
|
|
writel(spmx->gpio_regs[i][j], spmx->gpio_virtbase +
|
|
|
|
SIRFSOC_GPIO_CTRL(i, j));
|
|
|
|
}
|
|
|
|
writel(spmx->ints_regs[i], spmx->gpio_virtbase +
|
|
|
|
SIRFSOC_GPIO_INT_STATUS(i));
|
|
|
|
writel(spmx->paden_regs[i], spmx->gpio_virtbase +
|
|
|
|
SIRFSOC_GPIO_PAD_EN(i));
|
|
|
|
}
|
|
|
|
writel(spmx->dspen_regs, spmx->gpio_virtbase + SIRFSOC_GPIO_DSP_EN0);
|
|
|
|
|
|
|
|
for (i = 0; i < 3; i++)
|
|
|
|
writel(spmx->rsc_regs[i], spmx->rsc_virtbase + 4 * i);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static const struct dev_pm_ops sirfsoc_pinmux_pm_ops = {
|
|
|
|
.suspend_noirq = sirfsoc_pinmux_suspend_noirq,
|
|
|
|
.resume_noirq = sirfsoc_pinmux_resume_noirq,
|
2013-07-04 07:59:53 +00:00
|
|
|
.freeze_noirq = sirfsoc_pinmux_suspend_noirq,
|
|
|
|
.restore_noirq = sirfsoc_pinmux_resume_noirq,
|
2013-05-16 03:17:09 +00:00
|
|
|
};
|
|
|
|
#endif
|
|
|
|
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
static struct platform_driver sirfsoc_pinmux_driver = {
|
|
|
|
.driver = {
|
|
|
|
.name = DRIVER_NAME,
|
|
|
|
.owner = THIS_MODULE,
|
|
|
|
.of_match_table = pinmux_ids,
|
2013-05-16 03:17:09 +00:00
|
|
|
#ifdef CONFIG_PM_SLEEP
|
|
|
|
.pm = &sirfsoc_pinmux_pm_ops,
|
|
|
|
#endif
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
},
|
|
|
|
.probe = sirfsoc_pinmux_probe,
|
|
|
|
};
|
|
|
|
|
|
|
|
static int __init sirfsoc_pinmux_init(void)
|
|
|
|
{
|
|
|
|
return platform_driver_register(&sirfsoc_pinmux_driver);
|
|
|
|
}
|
|
|
|
arch_initcall(sirfsoc_pinmux_init);
|
|
|
|
|
2014-04-23 21:08:02 +00:00
|
|
|
static inline struct sirfsoc_gpio_chip *to_sirfsoc_gpio(struct gpio_chip *gc)
|
|
|
|
{
|
|
|
|
return container_of(gc, struct sirfsoc_gpio_chip, chip.gc);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline struct sirfsoc_gpio_bank *
|
|
|
|
sirfsoc_gpio_to_bank(struct sirfsoc_gpio_chip *sgpio, unsigned int offset)
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
{
|
2014-04-23 21:08:02 +00:00
|
|
|
return &sgpio->sgpio_bank[offset / SIRFSOC_GPIO_BANK_SIZE];
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
}
|
|
|
|
|
2014-04-23 21:08:02 +00:00
|
|
|
static inline int sirfsoc_gpio_to_bankoff(unsigned int offset)
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
{
|
2014-04-23 21:08:02 +00:00
|
|
|
return offset % SIRFSOC_GPIO_BANK_SIZE;
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
}
|
2014-04-15 06:43:47 +00:00
|
|
|
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
static void sirfsoc_gpio_irq_ack(struct irq_data *d)
|
|
|
|
{
|
2014-04-23 21:08:02 +00:00
|
|
|
struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
|
|
|
|
struct sirfsoc_gpio_chip *sgpio = to_sirfsoc_gpio(gc);
|
|
|
|
struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, d->hwirq);
|
|
|
|
int idx = sirfsoc_gpio_to_bankoff(d->hwirq);
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
u32 val, offset;
|
|
|
|
unsigned long flags;
|
|
|
|
|
|
|
|
offset = SIRFSOC_GPIO_CTRL(bank->id, idx);
|
|
|
|
|
|
|
|
spin_lock_irqsave(&sgpio_lock, flags);
|
|
|
|
|
2014-04-23 21:08:02 +00:00
|
|
|
val = readl(sgpio->chip.regs + offset);
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
|
2014-04-23 21:08:02 +00:00
|
|
|
writel(val, sgpio->chip.regs + offset);
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
|
|
|
|
spin_unlock_irqrestore(&sgpio_lock, flags);
|
|
|
|
}
|
|
|
|
|
2014-04-23 21:08:02 +00:00
|
|
|
static void __sirfsoc_gpio_irq_mask(struct sirfsoc_gpio_chip *sgpio,
|
|
|
|
struct sirfsoc_gpio_bank *bank,
|
|
|
|
int idx)
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
{
|
|
|
|
u32 val, offset;
|
|
|
|
unsigned long flags;
|
|
|
|
|
|
|
|
offset = SIRFSOC_GPIO_CTRL(bank->id, idx);
|
|
|
|
|
|
|
|
spin_lock_irqsave(&sgpio_lock, flags);
|
|
|
|
|
2014-04-23 21:08:02 +00:00
|
|
|
val = readl(sgpio->chip.regs + offset);
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
val &= ~SIRFSOC_GPIO_CTL_INTR_EN_MASK;
|
|
|
|
val &= ~SIRFSOC_GPIO_CTL_INTR_STS_MASK;
|
2014-04-23 21:08:02 +00:00
|
|
|
writel(val, sgpio->chip.regs + offset);
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
|
|
|
|
spin_unlock_irqrestore(&sgpio_lock, flags);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void sirfsoc_gpio_irq_mask(struct irq_data *d)
|
|
|
|
{
|
2014-04-23 21:08:02 +00:00
|
|
|
struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
|
|
|
|
struct sirfsoc_gpio_chip *sgpio = to_sirfsoc_gpio(gc);
|
|
|
|
struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, d->hwirq);
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
|
2014-04-23 21:08:02 +00:00
|
|
|
__sirfsoc_gpio_irq_mask(sgpio, bank, d->hwirq % SIRFSOC_GPIO_BANK_SIZE);
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static void sirfsoc_gpio_irq_unmask(struct irq_data *d)
|
|
|
|
{
|
2014-04-23 21:08:02 +00:00
|
|
|
struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
|
|
|
|
struct sirfsoc_gpio_chip *sgpio = to_sirfsoc_gpio(gc);
|
|
|
|
struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, d->hwirq);
|
|
|
|
int idx = sirfsoc_gpio_to_bankoff(d->hwirq);
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
u32 val, offset;
|
|
|
|
unsigned long flags;
|
|
|
|
|
|
|
|
offset = SIRFSOC_GPIO_CTRL(bank->id, idx);
|
|
|
|
|
|
|
|
spin_lock_irqsave(&sgpio_lock, flags);
|
|
|
|
|
2014-04-23 21:08:02 +00:00
|
|
|
val = readl(sgpio->chip.regs + offset);
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
val &= ~SIRFSOC_GPIO_CTL_INTR_STS_MASK;
|
|
|
|
val |= SIRFSOC_GPIO_CTL_INTR_EN_MASK;
|
2014-04-23 21:08:02 +00:00
|
|
|
writel(val, sgpio->chip.regs + offset);
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
|
|
|
|
spin_unlock_irqrestore(&sgpio_lock, flags);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int sirfsoc_gpio_irq_type(struct irq_data *d, unsigned type)
|
|
|
|
{
|
2014-04-23 21:08:02 +00:00
|
|
|
struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
|
|
|
|
struct sirfsoc_gpio_chip *sgpio = to_sirfsoc_gpio(gc);
|
|
|
|
struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, d->hwirq);
|
|
|
|
int idx = sirfsoc_gpio_to_bankoff(d->hwirq);
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
u32 val, offset;
|
|
|
|
unsigned long flags;
|
|
|
|
|
|
|
|
offset = SIRFSOC_GPIO_CTRL(bank->id, idx);
|
|
|
|
|
|
|
|
spin_lock_irqsave(&sgpio_lock, flags);
|
|
|
|
|
2014-04-23 21:08:02 +00:00
|
|
|
val = readl(sgpio->chip.regs + offset);
|
2014-01-11 08:48:43 +00:00
|
|
|
val &= ~(SIRFSOC_GPIO_CTL_INTR_STS_MASK | SIRFSOC_GPIO_CTL_OUT_EN_MASK);
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
|
|
|
|
switch (type) {
|
|
|
|
case IRQ_TYPE_NONE:
|
|
|
|
break;
|
|
|
|
case IRQ_TYPE_EDGE_RISING:
|
2014-08-18 08:49:21 +00:00
|
|
|
val |= SIRFSOC_GPIO_CTL_INTR_HIGH_MASK |
|
|
|
|
SIRFSOC_GPIO_CTL_INTR_TYPE_MASK;
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
val &= ~SIRFSOC_GPIO_CTL_INTR_LOW_MASK;
|
|
|
|
break;
|
|
|
|
case IRQ_TYPE_EDGE_FALLING:
|
|
|
|
val &= ~SIRFSOC_GPIO_CTL_INTR_HIGH_MASK;
|
2014-08-18 08:49:21 +00:00
|
|
|
val |= SIRFSOC_GPIO_CTL_INTR_LOW_MASK |
|
|
|
|
SIRFSOC_GPIO_CTL_INTR_TYPE_MASK;
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
break;
|
|
|
|
case IRQ_TYPE_EDGE_BOTH:
|
2014-08-18 08:49:21 +00:00
|
|
|
val |= SIRFSOC_GPIO_CTL_INTR_HIGH_MASK |
|
|
|
|
SIRFSOC_GPIO_CTL_INTR_LOW_MASK |
|
|
|
|
SIRFSOC_GPIO_CTL_INTR_TYPE_MASK;
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
break;
|
|
|
|
case IRQ_TYPE_LEVEL_LOW:
|
2014-08-18 08:49:21 +00:00
|
|
|
val &= ~(SIRFSOC_GPIO_CTL_INTR_HIGH_MASK |
|
|
|
|
SIRFSOC_GPIO_CTL_INTR_TYPE_MASK);
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
val |= SIRFSOC_GPIO_CTL_INTR_LOW_MASK;
|
|
|
|
break;
|
|
|
|
case IRQ_TYPE_LEVEL_HIGH:
|
|
|
|
val |= SIRFSOC_GPIO_CTL_INTR_HIGH_MASK;
|
2014-08-18 08:49:21 +00:00
|
|
|
val &= ~(SIRFSOC_GPIO_CTL_INTR_LOW_MASK |
|
|
|
|
SIRFSOC_GPIO_CTL_INTR_TYPE_MASK);
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
2014-04-23 21:08:02 +00:00
|
|
|
writel(val, sgpio->chip.regs + offset);
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
|
|
|
|
spin_unlock_irqrestore(&sgpio_lock, flags);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct irq_chip sirfsoc_irq_chip = {
|
|
|
|
.name = "sirf-gpio-irq",
|
|
|
|
.irq_ack = sirfsoc_gpio_irq_ack,
|
|
|
|
.irq_mask = sirfsoc_gpio_irq_mask,
|
|
|
|
.irq_unmask = sirfsoc_gpio_irq_unmask,
|
|
|
|
.irq_set_type = sirfsoc_gpio_irq_type,
|
|
|
|
};
|
|
|
|
|
|
|
|
static void sirfsoc_gpio_handle_irq(unsigned int irq, struct irq_desc *desc)
|
|
|
|
{
|
2014-04-23 21:08:02 +00:00
|
|
|
struct gpio_chip *gc = irq_desc_get_handler_data(desc);
|
|
|
|
struct sirfsoc_gpio_chip *sgpio = to_sirfsoc_gpio(gc);
|
2014-04-15 06:43:47 +00:00
|
|
|
struct sirfsoc_gpio_bank *bank;
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
u32 status, ctrl;
|
|
|
|
int idx = 0;
|
|
|
|
struct irq_chip *chip = irq_get_chip(irq);
|
2014-04-15 06:43:47 +00:00
|
|
|
int i;
|
|
|
|
|
2014-05-25 08:54:23 +00:00
|
|
|
for (i = 0; i < SIRFSOC_GPIO_NO_OF_BANKS; i++) {
|
2014-05-30 07:52:43 +00:00
|
|
|
bank = &sgpio->sgpio_bank[i];
|
2014-04-15 06:43:47 +00:00
|
|
|
if (bank->parent_irq == irq)
|
|
|
|
break;
|
|
|
|
}
|
2014-05-25 08:54:23 +00:00
|
|
|
BUG_ON(i == SIRFSOC_GPIO_NO_OF_BANKS);
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
|
|
|
|
chained_irq_enter(chip, desc);
|
|
|
|
|
2014-04-23 21:08:02 +00:00
|
|
|
status = readl(sgpio->chip.regs + SIRFSOC_GPIO_INT_STATUS(bank->id));
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
if (!status) {
|
|
|
|
printk(KERN_WARNING
|
|
|
|
"%s: gpio id %d status %#x no interrupt is flaged\n",
|
|
|
|
__func__, bank->id, status);
|
|
|
|
handle_bad_irq(irq, desc);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
while (status) {
|
2014-04-23 21:08:02 +00:00
|
|
|
ctrl = readl(sgpio->chip.regs + SIRFSOC_GPIO_CTRL(bank->id, idx));
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Here we must check whether the corresponding GPIO's interrupt
|
|
|
|
* has been enabled, otherwise just skip it
|
|
|
|
*/
|
|
|
|
if ((status & 0x1) && (ctrl & SIRFSOC_GPIO_CTL_INTR_EN_MASK)) {
|
|
|
|
pr_debug("%s: gpio id %d idx %d happens\n",
|
|
|
|
__func__, bank->id, idx);
|
2014-04-23 21:08:02 +00:00
|
|
|
generic_handle_irq(irq_find_mapping(gc->irqdomain, idx +
|
pinctrl: sirf: use only one irq_domain for the whole device node
in sirfsoc gpio probe(), we create 5 irq_domains for 5 gpio banks. but
in irq_create_of_mapping() of irqchip core level, irq_find_host() can
only return the 1st irq_domain attached the pinctrl dt device node as
we can see from the codes:
unsigned int irq_create_of_mapping(struct device_node *controller,
const u32 *intspec, unsigned int intsize)
{
struct irq_domain *domain;
...
domain = controller ? irq_find_host(controller) : irq_default_domain;
}
struct irq_domain *irq_find_host(struct device_node *node)
{
struct irq_domain *h, *found = NULL;
int rc;
/* We might want to match the legacy controller last since
* it might potentially be set to match all interrupts in
* the absence of a device node. This isn't a problem so far
* yet though...
*/
mutex_lock(&irq_domain_mutex);
list_for_each_entry(h, &irq_domain_list, link) {
if (h->ops->match)
rc = h->ops->match(h, node);
else
rc = (h->of_node != NULL) && (h->of_node == node);
if (rc) {
found = h;
break;
}
}
mutex_unlock(&irq_domain_mutex);
return found;
}
for sirfsoc, the 1st irq_domain attached to the device_node(controller) only
can do linear for the 1st 32 gpios. so for devices who use gpio hwirq above
32 and put the information in dt like:
tangoc-ts@5c{
compatible = "pixcir,tangoc-ts";
+ interrupt-parent = <&gpio>;
+ interrupts = <34 0>;
};
we will fail to get the virq for these devices as hwirq will be bigger than
domain->revmap_data.linear.size in:
unsigned int irq_linear_revmap(struct irq_domain *domain,
irq_hw_number_t hwirq)
{
/* Check revmap bounds; complain if exceeded */
if (WARN_ON(hwirq >= domain->revmap_data.linear.size))
return 0;
return domain->revmap_data.linear.revmap[hwirq];
}
this patch drops redundant irq_domain and keep only one to fix the problem.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-01-11 08:48:42 +00:00
|
|
|
bank->id * SIRFSOC_GPIO_BANK_SIZE));
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
idx++;
|
|
|
|
status = status >> 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
chained_irq_exit(chip, desc);
|
|
|
|
}
|
|
|
|
|
2014-04-23 21:08:02 +00:00
|
|
|
static inline void sirfsoc_gpio_set_input(struct sirfsoc_gpio_chip *sgpio,
|
|
|
|
unsigned ctrl_offset)
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
{
|
|
|
|
u32 val;
|
|
|
|
|
2014-04-23 21:08:02 +00:00
|
|
|
val = readl(sgpio->chip.regs + ctrl_offset);
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
val &= ~SIRFSOC_GPIO_CTL_OUT_EN_MASK;
|
2014-04-23 21:08:02 +00:00
|
|
|
writel(val, sgpio->chip.regs + ctrl_offset);
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static int sirfsoc_gpio_request(struct gpio_chip *chip, unsigned offset)
|
|
|
|
{
|
2014-04-23 21:08:02 +00:00
|
|
|
struct sirfsoc_gpio_chip *sgpio = to_sirfsoc_gpio(chip);
|
|
|
|
struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, offset);
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
unsigned long flags;
|
|
|
|
|
|
|
|
if (pinctrl_request_gpio(chip->base + offset))
|
|
|
|
return -ENODEV;
|
|
|
|
|
|
|
|
spin_lock_irqsave(&bank->lock, flags);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* default status:
|
|
|
|
* set direction as input and mask irq
|
|
|
|
*/
|
2014-04-23 21:08:02 +00:00
|
|
|
sirfsoc_gpio_set_input(sgpio, SIRFSOC_GPIO_CTRL(bank->id, offset));
|
|
|
|
__sirfsoc_gpio_irq_mask(sgpio, bank, offset);
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
|
|
|
|
spin_unlock_irqrestore(&bank->lock, flags);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void sirfsoc_gpio_free(struct gpio_chip *chip, unsigned offset)
|
|
|
|
{
|
2014-04-23 21:08:02 +00:00
|
|
|
struct sirfsoc_gpio_chip *sgpio = to_sirfsoc_gpio(chip);
|
|
|
|
struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, offset);
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
unsigned long flags;
|
|
|
|
|
|
|
|
spin_lock_irqsave(&bank->lock, flags);
|
|
|
|
|
2014-04-23 21:08:02 +00:00
|
|
|
__sirfsoc_gpio_irq_mask(sgpio, bank, offset);
|
|
|
|
sirfsoc_gpio_set_input(sgpio, SIRFSOC_GPIO_CTRL(bank->id, offset));
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
|
|
|
|
spin_unlock_irqrestore(&bank->lock, flags);
|
|
|
|
|
|
|
|
pinctrl_free_gpio(chip->base + offset);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int sirfsoc_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)
|
|
|
|
{
|
2014-04-23 21:08:02 +00:00
|
|
|
struct sirfsoc_gpio_chip *sgpio = to_sirfsoc_gpio(chip);
|
|
|
|
struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, gpio);
|
2014-04-15 06:43:46 +00:00
|
|
|
int idx = sirfsoc_gpio_to_bankoff(gpio);
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
unsigned long flags;
|
|
|
|
unsigned offset;
|
|
|
|
|
|
|
|
offset = SIRFSOC_GPIO_CTRL(bank->id, idx);
|
|
|
|
|
|
|
|
spin_lock_irqsave(&bank->lock, flags);
|
|
|
|
|
2014-04-23 21:08:02 +00:00
|
|
|
sirfsoc_gpio_set_input(sgpio, offset);
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
|
|
|
|
spin_unlock_irqrestore(&bank->lock, flags);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2014-04-23 21:08:02 +00:00
|
|
|
static inline void sirfsoc_gpio_set_output(struct sirfsoc_gpio_chip *sgpio,
|
|
|
|
struct sirfsoc_gpio_bank *bank,
|
|
|
|
unsigned offset,
|
|
|
|
int value)
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
{
|
|
|
|
u32 out_ctrl;
|
|
|
|
unsigned long flags;
|
|
|
|
|
|
|
|
spin_lock_irqsave(&bank->lock, flags);
|
|
|
|
|
2014-04-23 21:08:02 +00:00
|
|
|
out_ctrl = readl(sgpio->chip.regs + offset);
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
if (value)
|
|
|
|
out_ctrl |= SIRFSOC_GPIO_CTL_DATAOUT_MASK;
|
|
|
|
else
|
|
|
|
out_ctrl &= ~SIRFSOC_GPIO_CTL_DATAOUT_MASK;
|
|
|
|
|
|
|
|
out_ctrl &= ~SIRFSOC_GPIO_CTL_INTR_EN_MASK;
|
|
|
|
out_ctrl |= SIRFSOC_GPIO_CTL_OUT_EN_MASK;
|
2014-04-23 21:08:02 +00:00
|
|
|
writel(out_ctrl, sgpio->chip.regs + offset);
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
|
|
|
|
spin_unlock_irqrestore(&bank->lock, flags);
|
|
|
|
}
|
|
|
|
|
2014-08-18 08:49:21 +00:00
|
|
|
static int sirfsoc_gpio_direction_output(struct gpio_chip *chip,
|
|
|
|
unsigned gpio, int value)
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
{
|
2014-04-23 21:08:02 +00:00
|
|
|
struct sirfsoc_gpio_chip *sgpio = to_sirfsoc_gpio(chip);
|
|
|
|
struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, gpio);
|
2014-04-15 06:43:46 +00:00
|
|
|
int idx = sirfsoc_gpio_to_bankoff(gpio);
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
u32 offset;
|
|
|
|
unsigned long flags;
|
|
|
|
|
|
|
|
offset = SIRFSOC_GPIO_CTRL(bank->id, idx);
|
|
|
|
|
|
|
|
spin_lock_irqsave(&sgpio_lock, flags);
|
|
|
|
|
2014-04-23 21:08:02 +00:00
|
|
|
sirfsoc_gpio_set_output(sgpio, bank, offset, value);
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
|
|
|
|
spin_unlock_irqrestore(&sgpio_lock, flags);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int sirfsoc_gpio_get_value(struct gpio_chip *chip, unsigned offset)
|
|
|
|
{
|
2014-04-23 21:08:02 +00:00
|
|
|
struct sirfsoc_gpio_chip *sgpio = to_sirfsoc_gpio(chip);
|
|
|
|
struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, offset);
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
u32 val;
|
|
|
|
unsigned long flags;
|
|
|
|
|
|
|
|
spin_lock_irqsave(&bank->lock, flags);
|
|
|
|
|
2014-04-23 21:08:02 +00:00
|
|
|
val = readl(sgpio->chip.regs + SIRFSOC_GPIO_CTRL(bank->id, offset));
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
|
|
|
|
spin_unlock_irqrestore(&bank->lock, flags);
|
|
|
|
|
|
|
|
return !!(val & SIRFSOC_GPIO_CTL_DATAIN_MASK);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void sirfsoc_gpio_set_value(struct gpio_chip *chip, unsigned offset,
|
|
|
|
int value)
|
|
|
|
{
|
2014-04-23 21:08:02 +00:00
|
|
|
struct sirfsoc_gpio_chip *sgpio = to_sirfsoc_gpio(chip);
|
|
|
|
struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, offset);
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
u32 ctrl;
|
|
|
|
unsigned long flags;
|
|
|
|
|
|
|
|
spin_lock_irqsave(&bank->lock, flags);
|
|
|
|
|
2014-04-23 21:08:02 +00:00
|
|
|
ctrl = readl(sgpio->chip.regs + SIRFSOC_GPIO_CTRL(bank->id, offset));
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
if (value)
|
|
|
|
ctrl |= SIRFSOC_GPIO_CTL_DATAOUT_MASK;
|
|
|
|
else
|
|
|
|
ctrl &= ~SIRFSOC_GPIO_CTL_DATAOUT_MASK;
|
2014-04-23 21:08:02 +00:00
|
|
|
writel(ctrl, sgpio->chip.regs + SIRFSOC_GPIO_CTRL(bank->id, offset));
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
|
|
|
|
spin_unlock_irqrestore(&bank->lock, flags);
|
|
|
|
}
|
|
|
|
|
2014-04-23 21:08:02 +00:00
|
|
|
static void sirfsoc_gpio_set_pullup(struct sirfsoc_gpio_chip *sgpio,
|
|
|
|
const u32 *pullups)
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
{
|
|
|
|
int i, n;
|
|
|
|
const unsigned long *p = (const unsigned long *)pullups;
|
|
|
|
|
|
|
|
for (i = 0; i < SIRFSOC_GPIO_NO_OF_BANKS; i++) {
|
|
|
|
for_each_set_bit(n, p + i, BITS_PER_LONG) {
|
|
|
|
u32 offset = SIRFSOC_GPIO_CTRL(i, n);
|
2014-04-23 21:08:02 +00:00
|
|
|
u32 val = readl(sgpio->chip.regs + offset);
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
val |= SIRFSOC_GPIO_CTL_PULL_MASK;
|
|
|
|
val |= SIRFSOC_GPIO_CTL_PULL_HIGH;
|
2014-04-23 21:08:02 +00:00
|
|
|
writel(val, sgpio->chip.regs + offset);
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2014-04-23 21:08:02 +00:00
|
|
|
static void sirfsoc_gpio_set_pulldown(struct sirfsoc_gpio_chip *sgpio,
|
|
|
|
const u32 *pulldowns)
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
{
|
|
|
|
int i, n;
|
|
|
|
const unsigned long *p = (const unsigned long *)pulldowns;
|
|
|
|
|
|
|
|
for (i = 0; i < SIRFSOC_GPIO_NO_OF_BANKS; i++) {
|
|
|
|
for_each_set_bit(n, p + i, BITS_PER_LONG) {
|
|
|
|
u32 offset = SIRFSOC_GPIO_CTRL(i, n);
|
2014-04-23 21:08:02 +00:00
|
|
|
u32 val = readl(sgpio->chip.regs + offset);
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
val |= SIRFSOC_GPIO_CTL_PULL_MASK;
|
|
|
|
val &= ~SIRFSOC_GPIO_CTL_PULL_HIGH;
|
2014-04-23 21:08:02 +00:00
|
|
|
writel(val, sgpio->chip.regs + offset);
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static int sirfsoc_gpio_probe(struct device_node *np)
|
|
|
|
{
|
|
|
|
int i, err = 0;
|
2014-04-23 21:08:02 +00:00
|
|
|
static struct sirfsoc_gpio_chip *sgpio;
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
struct sirfsoc_gpio_bank *bank;
|
2013-08-06 09:14:12 +00:00
|
|
|
void __iomem *regs;
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
struct platform_device *pdev;
|
|
|
|
bool is_marco = false;
|
|
|
|
|
|
|
|
u32 pullups[SIRFSOC_GPIO_NO_OF_BANKS], pulldowns[SIRFSOC_GPIO_NO_OF_BANKS];
|
|
|
|
|
|
|
|
pdev = of_find_device_by_node(np);
|
|
|
|
if (!pdev)
|
|
|
|
return -ENODEV;
|
|
|
|
|
2014-04-23 21:08:02 +00:00
|
|
|
sgpio = devm_kzalloc(&pdev->dev, sizeof(*sgpio), GFP_KERNEL);
|
|
|
|
if (!sgpio)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
regs = of_iomap(np, 0);
|
|
|
|
if (!regs)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
if (of_device_is_compatible(np, "sirf,marco-pinctrl"))
|
|
|
|
is_marco = 1;
|
|
|
|
|
2014-04-23 21:08:02 +00:00
|
|
|
sgpio->chip.gc.request = sirfsoc_gpio_request;
|
|
|
|
sgpio->chip.gc.free = sirfsoc_gpio_free;
|
|
|
|
sgpio->chip.gc.direction_input = sirfsoc_gpio_direction_input;
|
|
|
|
sgpio->chip.gc.get = sirfsoc_gpio_get_value;
|
|
|
|
sgpio->chip.gc.direction_output = sirfsoc_gpio_direction_output;
|
|
|
|
sgpio->chip.gc.set = sirfsoc_gpio_set_value;
|
|
|
|
sgpio->chip.gc.base = 0;
|
|
|
|
sgpio->chip.gc.ngpio = SIRFSOC_GPIO_BANK_SIZE * SIRFSOC_GPIO_NO_OF_BANKS;
|
|
|
|
sgpio->chip.gc.label = kstrdup(np->full_name, GFP_KERNEL);
|
|
|
|
sgpio->chip.gc.of_node = np;
|
|
|
|
sgpio->chip.gc.of_xlate = sirfsoc_gpio_of_xlate;
|
|
|
|
sgpio->chip.gc.of_gpio_n_cells = 2;
|
|
|
|
sgpio->chip.gc.dev = &pdev->dev;
|
|
|
|
sgpio->chip.regs = regs;
|
|
|
|
sgpio->is_marco = is_marco;
|
|
|
|
|
|
|
|
err = gpiochip_add(&sgpio->chip.gc);
|
2014-04-15 06:43:46 +00:00
|
|
|
if (err) {
|
2014-04-15 06:43:47 +00:00
|
|
|
dev_err(&pdev->dev, "%s: error in probe function with status %d\n",
|
2014-04-15 06:43:46 +00:00
|
|
|
np->full_name, err);
|
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
|
2014-04-23 21:08:02 +00:00
|
|
|
err = gpiochip_irqchip_add(&sgpio->chip.gc,
|
2014-04-15 06:43:47 +00:00
|
|
|
&sirfsoc_irq_chip,
|
|
|
|
0, handle_level_irq,
|
|
|
|
IRQ_TYPE_NONE);
|
|
|
|
if (err) {
|
|
|
|
dev_err(&pdev->dev,
|
|
|
|
"could not connect irqchip to gpiochip\n");
|
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
for (i = 0; i < SIRFSOC_GPIO_NO_OF_BANKS; i++) {
|
2014-04-23 21:08:02 +00:00
|
|
|
bank = &sgpio->sgpio_bank[i];
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
spin_lock_init(&bank->lock);
|
|
|
|
bank->parent_irq = platform_get_irq(pdev, i);
|
|
|
|
if (bank->parent_irq < 0) {
|
|
|
|
err = bank->parent_irq;
|
2014-04-23 21:08:02 +00:00
|
|
|
goto out_banks;
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
}
|
|
|
|
|
2014-04-23 21:08:02 +00:00
|
|
|
gpiochip_set_chained_irqchip(&sgpio->chip.gc,
|
2014-04-15 06:43:47 +00:00
|
|
|
&sirfsoc_irq_chip,
|
|
|
|
bank->parent_irq,
|
|
|
|
sirfsoc_gpio_handle_irq);
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
}
|
|
|
|
|
2014-04-23 21:08:02 +00:00
|
|
|
err = gpiochip_add_pin_range(&sgpio->chip.gc, dev_name(&pdev->dev),
|
|
|
|
0, 0, SIRFSOC_GPIO_BANK_SIZE * SIRFSOC_GPIO_NO_OF_BANKS);
|
|
|
|
if (err) {
|
|
|
|
dev_err(&pdev->dev,
|
|
|
|
"could not add gpiochip pin range\n");
|
|
|
|
goto out_no_range;
|
|
|
|
}
|
|
|
|
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
if (!of_property_read_u32_array(np, "sirf,pullups", pullups,
|
|
|
|
SIRFSOC_GPIO_NO_OF_BANKS))
|
2014-04-23 21:08:02 +00:00
|
|
|
sirfsoc_gpio_set_pullup(sgpio, pullups);
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
|
|
|
|
if (!of_property_read_u32_array(np, "sirf,pulldowns", pulldowns,
|
|
|
|
SIRFSOC_GPIO_NO_OF_BANKS))
|
2014-04-23 21:08:02 +00:00
|
|
|
sirfsoc_gpio_set_pulldown(sgpio, pulldowns);
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
2014-04-23 21:08:02 +00:00
|
|
|
out_no_range:
|
|
|
|
out_banks:
|
|
|
|
if (gpiochip_remove(&sgpio->chip.gc))
|
|
|
|
dev_err(&pdev->dev, "could not remove gpio chip\n");
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
out:
|
|
|
|
iounmap(regs);
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int __init sirfsoc_gpio_init(void)
|
|
|
|
{
|
|
|
|
|
|
|
|
struct device_node *np;
|
|
|
|
|
|
|
|
np = of_find_matching_node(NULL, pinmux_ids);
|
|
|
|
|
|
|
|
if (!np)
|
|
|
|
return -ENODEV;
|
|
|
|
|
|
|
|
return sirfsoc_gpio_probe(np);
|
|
|
|
}
|
|
|
|
subsys_initcall(sirfsoc_gpio_init);
|
|
|
|
|
2014-08-18 08:49:20 +00:00
|
|
|
MODULE_AUTHOR("Rongjun Ying <rongjun.ying@csr.com>");
|
|
|
|
MODULE_AUTHOR("Yuping Luo <yuping.luo@csr.com>");
|
|
|
|
MODULE_AUTHOR("Barry Song <baohua.song@csr.com>");
|
pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
the related dt compatible node, so the pinctrl-sirf can support
all SiRF SoCs with the config data as private data.
In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
drivers/pinctrl/sirf/pinctrl-prima2.c +
drivers/pinctrl/sirf/pinctrl-sirf.c
drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:17:58 +00:00
|
|
|
MODULE_DESCRIPTION("SIRFSOC pin control driver");
|
|
|
|
MODULE_LICENSE("GPL");
|