2017-08-21 03:36:52 +00:00
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* MediaTek's I2C controller
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2015-05-21 08:53:28 +00:00
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2017-08-21 03:36:52 +00:00
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The MediaTek's I2C controller is used to interface with I2C devices.
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2015-05-21 08:53:28 +00:00
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Required properties:
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- compatible: value should be either of the following.
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2017-08-21 03:36:52 +00:00
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"mediatek,mt2701-i2c", "mediatek,mt6577-i2c": for MediaTek MT2701
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2017-12-19 06:51:01 +00:00
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"mediatek,mt2712-i2c": for MediaTek MT2712
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2017-08-21 03:36:52 +00:00
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"mediatek,mt6577-i2c": for MediaTek MT6577
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"mediatek,mt6589-i2c": for MediaTek MT6589
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2017-08-21 03:36:53 +00:00
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"mediatek,mt7622-i2c": for MediaTek MT7622
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2017-08-21 03:36:52 +00:00
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"mediatek,mt7623-i2c", "mediatek,mt6577-i2c": for MediaTek MT7623
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"mediatek,mt8173-i2c": for MediaTek MT8173
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2015-05-21 08:53:28 +00:00
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- reg: physical base address of the controller and dma base, length of memory
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mapped region.
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- interrupts: interrupt number to the cpu.
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- clock-div: the fixed value for frequency divider of clock source in i2c
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module. Each IC may be different.
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- clocks: clock name from clock manager
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- clock-names: Must include "main" and "dma", if enable have-pmic need include
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"pmic" extra.
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Optional properties:
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- clock-frequency: Frequency in Hz of the bus when transfer, the default value
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is 100000.
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- mediatek,have-pmic: platform can control i2c form special pmic side.
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Only mt6589 and mt8135 support this feature.
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- mediatek,use-push-pull: IO config use push-pull mode.
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Example:
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i2c0: i2c@1100d000 {
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compatible = "mediatek,mt6577-i2c";
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reg = <0x1100d000 0x70>,
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<0x11000300 0x80>;
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interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_LOW>;
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clock-frequency = <400000>;
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mediatek,have-pmic;
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clock-div = <16>;
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clocks = <&i2c0_ck>, <&ap_dma_ck>;
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clock-names = "main", "dma";
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};
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