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57 lines
1.9 KiB
C
57 lines
1.9 KiB
C
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/* Texas Instruments Triple 8-/10-BIT 165-/110-MSPS Video and Graphics
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* Digitizer with Horizontal PLL registers
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*
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* Copyright (C) 2009 Texas Instruments Inc
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* Author: Santiago Nunez-Corrales <santiago.nunez@ridgerun.com>
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*
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* This code is partially based upon the TVP5150 driver
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* written by Mauro Carvalho Chehab (mchehab@infradead.org),
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* the TVP514x driver written by Vaibhav Hiremath <hvaibhav@ti.com>
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* and the TVP7002 driver in the TI LSP 2.10.00.14
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#ifndef _TVP7002_H_
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#define _TVP7002_H_
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/* Platform-dependent data
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*
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* clk_polarity:
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* 0 -> data clocked out on rising edge of DATACLK signal
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* 1 -> data clocked out on falling edge of DATACLK signal
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* hs_polarity:
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* 0 -> active low HSYNC output
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* 1 -> active high HSYNC output
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* sog_polarity:
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* 0 -> normal operation
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* 1 -> operation with polarity inverted
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* vs_polarity:
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* 0 -> active low VSYNC output
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* 1 -> active high VSYNC output
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* fid_polarity:
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* 0 -> the field ID output is set to logic 1 for an odd
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* field (field 1) and set to logic 0 for an even
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* field (field 0).
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* 1 -> operation with polarity inverted.
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*/
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struct tvp7002_config {
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u8 clk_polarity;
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u8 hs_polarity;
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u8 vs_polarity;
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u8 fid_polarity;
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u8 sog_polarity;
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};
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#endif
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