2012-03-31 13:26:57 +00:00
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/*
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* Copyright 2012 Freescale Semiconductor, Inc.
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* Copyright 2012 Linaro Ltd.
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*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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#include <linux/clk.h>
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2013-03-29 05:36:05 +00:00
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#include <linux/clk/mxs.h>
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2012-03-31 13:26:57 +00:00
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#include <linux/clkdev.h>
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2012-07-13 06:15:34 +00:00
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#include <linux/delay.h>
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2012-03-31 13:26:57 +00:00
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#include <linux/err.h>
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2012-07-13 06:15:34 +00:00
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#include <linux/gpio.h>
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2012-03-31 13:26:57 +00:00
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#include <linux/init.h>
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2013-03-25 13:34:51 +00:00
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#include <linux/irqchip/mxs.h>
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2013-07-08 23:01:40 +00:00
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#include <linux/reboot.h>
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2012-07-07 15:12:03 +00:00
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#include <linux/micrel_phy.h>
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2013-03-29 01:45:31 +00:00
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#include <linux/of_address.h>
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2012-03-31 13:26:57 +00:00
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#include <linux/of_platform.h>
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2012-07-07 15:12:03 +00:00
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#include <linux/phy.h>
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2012-07-13 06:15:34 +00:00
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#include <linux/pinctrl/consumer.h>
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2013-06-04 13:18:45 +00:00
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#include <linux/sys_soc.h>
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2012-03-31 13:26:57 +00:00
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#include <asm/mach/arch.h>
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2013-03-29 05:07:34 +00:00
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#include <asm/mach/map.h>
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2012-03-31 13:26:57 +00:00
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#include <asm/mach/time.h>
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2013-03-29 01:45:31 +00:00
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#include <asm/system_misc.h>
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2013-03-29 05:53:11 +00:00
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2013-03-29 06:41:27 +00:00
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#include "pm.h"
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2013-03-29 05:53:11 +00:00
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/* MXS DIGCTL SAIF CLKMUX */
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#define MXS_DIGCTL_SAIF_CLKMUX_DIRECT 0x0
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#define MXS_DIGCTL_SAIF_CLKMUX_CROSSINPUT 0x1
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#define MXS_DIGCTL_SAIF_CLKMUX_EXTMSTR0 0x2
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#define MXS_DIGCTL_SAIF_CLKMUX_EXTMSTR1 0x3
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2013-06-04 13:18:45 +00:00
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#define HW_DIGCTL_CHIPID 0x310
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#define HW_DIGCTL_CHIPID_MASK (0xffff << 16)
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#define HW_DIGCTL_REV_MASK 0xff
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#define HW_DIGCTL_CHIPID_MX23 (0x3780 << 16)
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#define HW_DIGCTL_CHIPID_MX28 (0x2800 << 16)
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#define MXS_CHIP_REVISION_1_0 0x10
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#define MXS_CHIP_REVISION_1_1 0x11
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#define MXS_CHIP_REVISION_1_2 0x12
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#define MXS_CHIP_REVISION_1_3 0x13
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#define MXS_CHIP_REVISION_1_4 0x14
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#define MXS_CHIP_REV_UNKNOWN 0xff
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2013-03-29 05:53:11 +00:00
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#define MXS_GPIO_NR(bank, nr) ((bank) * 32 + (nr))
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#define MXS_SET_ADDR 0x4
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#define MXS_CLR_ADDR 0x8
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#define MXS_TOG_ADDR 0xc
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2013-06-04 13:18:45 +00:00
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static u32 chipid;
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static u32 socid;
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2013-08-05 08:51:14 +00:00
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static void __iomem *reset_addr;
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2013-03-29 05:53:11 +00:00
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static inline void __mxs_setl(u32 mask, void __iomem *reg)
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{
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__raw_writel(mask, reg + MXS_SET_ADDR);
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}
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static inline void __mxs_clrl(u32 mask, void __iomem *reg)
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{
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__raw_writel(mask, reg + MXS_CLR_ADDR);
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}
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static inline void __mxs_togl(u32 mask, void __iomem *reg)
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{
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__raw_writel(mask, reg + MXS_TOG_ADDR);
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}
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2012-03-31 13:26:57 +00:00
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2013-03-29 05:27:55 +00:00
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#define OCOTP_WORD_OFFSET 0x20
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#define OCOTP_WORD_COUNT 0x20
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#define BM_OCOTP_CTRL_BUSY (1 << 8)
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#define BM_OCOTP_CTRL_ERROR (1 << 9)
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#define BM_OCOTP_CTRL_RD_BANK_OPEN (1 << 12)
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static DEFINE_MUTEX(ocotp_mutex);
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static u32 ocotp_words[OCOTP_WORD_COUNT];
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static const u32 *mxs_get_ocotp(void)
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{
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struct device_node *np;
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void __iomem *ocotp_base;
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int timeout = 0x400;
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size_t i;
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static int once;
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if (once)
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return ocotp_words;
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np = of_find_compatible_node(NULL, NULL, "fsl,ocotp");
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ocotp_base = of_iomap(np, 0);
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WARN_ON(!ocotp_base);
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mutex_lock(&ocotp_mutex);
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/*
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* clk_enable(hbus_clk) for ocotp can be skipped
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* as it must be on when system is running.
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*/
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/* try to clear ERROR bit */
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__mxs_clrl(BM_OCOTP_CTRL_ERROR, ocotp_base);
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/* check both BUSY and ERROR cleared */
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while ((__raw_readl(ocotp_base) &
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(BM_OCOTP_CTRL_BUSY | BM_OCOTP_CTRL_ERROR)) && --timeout)
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cpu_relax();
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if (unlikely(!timeout))
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goto error_unlock;
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/* open OCOTP banks for read */
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__mxs_setl(BM_OCOTP_CTRL_RD_BANK_OPEN, ocotp_base);
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/* approximately wait 32 hclk cycles */
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udelay(1);
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/* poll BUSY bit becoming cleared */
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timeout = 0x400;
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while ((__raw_readl(ocotp_base) & BM_OCOTP_CTRL_BUSY) && --timeout)
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cpu_relax();
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if (unlikely(!timeout))
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goto error_unlock;
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for (i = 0; i < OCOTP_WORD_COUNT; i++)
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ocotp_words[i] = __raw_readl(ocotp_base + OCOTP_WORD_OFFSET +
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i * 0x10);
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/* close banks for power saving */
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__mxs_clrl(BM_OCOTP_CTRL_RD_BANK_OPEN, ocotp_base);
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once = 1;
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mutex_unlock(&ocotp_mutex);
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return ocotp_words;
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error_unlock:
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mutex_unlock(&ocotp_mutex);
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pr_err("%s: timeout in reading OCOTP\n", __func__);
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return NULL;
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}
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2012-06-19 14:38:14 +00:00
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enum mac_oui {
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OUI_FSL,
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OUI_DENX,
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2012-10-07 02:36:28 +00:00
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OUI_CRYSTALFONTZ,
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2013-11-09 11:14:16 +00:00
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OUI_I2SE,
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2012-06-19 14:38:14 +00:00
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};
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static void __init update_fec_mac_prop(enum mac_oui oui)
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{
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struct device_node *np, *from = NULL;
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2012-07-13 06:13:55 +00:00
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struct property *newmac;
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2012-06-19 14:38:14 +00:00
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const u32 *ocotp = mxs_get_ocotp();
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u8 *macaddr;
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u32 val;
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int i;
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for (i = 0; i < 2; i++) {
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np = of_find_compatible_node(from, NULL, "fsl,imx28-fec");
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if (!np)
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return;
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2012-09-25 11:32:18 +00:00
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2012-06-19 14:38:14 +00:00
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from = np;
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2012-09-25 11:32:18 +00:00
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if (of_get_property(np, "local-mac-address", NULL))
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continue;
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2012-06-19 14:38:14 +00:00
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newmac = kzalloc(sizeof(*newmac) + 6, GFP_KERNEL);
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if (!newmac)
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return;
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newmac->value = newmac + 1;
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newmac->length = 6;
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newmac->name = kstrdup("local-mac-address", GFP_KERNEL);
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if (!newmac->name) {
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kfree(newmac);
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return;
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}
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/*
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* OCOTP only stores the last 4 octets for each mac address,
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* so hard-code OUI here.
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*/
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macaddr = newmac->value;
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switch (oui) {
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case OUI_FSL:
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macaddr[0] = 0x00;
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macaddr[1] = 0x04;
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macaddr[2] = 0x9f;
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break;
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case OUI_DENX:
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macaddr[0] = 0xc0;
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macaddr[1] = 0xe5;
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macaddr[2] = 0x4e;
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break;
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2012-10-07 02:36:28 +00:00
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case OUI_CRYSTALFONTZ:
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macaddr[0] = 0x58;
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macaddr[1] = 0xb9;
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macaddr[2] = 0xe1;
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break;
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2013-11-09 11:14:16 +00:00
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case OUI_I2SE:
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macaddr[0] = 0x00;
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macaddr[1] = 0x01;
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macaddr[2] = 0x87;
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break;
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2012-06-19 14:38:14 +00:00
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}
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val = ocotp[i];
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macaddr[3] = (val >> 16) & 0xff;
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macaddr[4] = (val >> 8) & 0xff;
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macaddr[5] = (val >> 0) & 0xff;
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2012-10-02 16:58:46 +00:00
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of_update_property(np, newmac);
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2012-06-19 14:38:14 +00:00
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}
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}
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2012-07-07 13:21:38 +00:00
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static inline void enable_clk_enet_out(void)
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2012-03-31 13:26:57 +00:00
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{
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2012-07-07 13:21:38 +00:00
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struct clk *clk = clk_get_sys("enet_out", NULL);
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2012-03-31 13:26:57 +00:00
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if (!IS_ERR(clk))
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clk_prepare_enable(clk);
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2012-07-07 13:21:38 +00:00
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}
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2012-06-19 14:38:14 +00:00
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2012-07-07 13:21:38 +00:00
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static void __init imx28_evk_init(void)
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{
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2012-06-19 14:38:14 +00:00
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update_fec_mac_prop(OUI_FSL);
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2012-06-25 13:21:46 +00:00
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2012-08-01 03:20:16 +00:00
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mxs_saif_clkmux_select(MXS_DIGCTL_SAIF_CLKMUX_EXTMSTR0);
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2012-03-31 13:26:57 +00:00
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}
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2012-07-07 15:12:03 +00:00
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static int apx4devkit_phy_fixup(struct phy_device *phy)
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{
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phy->dev_flags |= MICREL_PHY_50MHZ_CLK;
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return 0;
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}
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static void __init apx4devkit_init(void)
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{
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enable_clk_enet_out();
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if (IS_BUILTIN(CONFIG_PHYLIB))
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2012-09-23 16:58:50 +00:00
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phy_register_fixup_for_uid(PHY_ID_KSZ8051, MICREL_PHY_ID_MASK,
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2012-07-07 15:12:03 +00:00
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apx4devkit_phy_fixup);
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}
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2012-07-13 06:15:34 +00:00
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#define ENET0_MDC__GPIO_4_0 MXS_GPIO_NR(4, 0)
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#define ENET0_MDIO__GPIO_4_1 MXS_GPIO_NR(4, 1)
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#define ENET0_RX_EN__GPIO_4_2 MXS_GPIO_NR(4, 2)
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#define ENET0_RXD0__GPIO_4_3 MXS_GPIO_NR(4, 3)
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#define ENET0_RXD1__GPIO_4_4 MXS_GPIO_NR(4, 4)
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#define ENET0_TX_EN__GPIO_4_6 MXS_GPIO_NR(4, 6)
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#define ENET0_TXD0__GPIO_4_7 MXS_GPIO_NR(4, 7)
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#define ENET0_TXD1__GPIO_4_8 MXS_GPIO_NR(4, 8)
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#define ENET_CLK__GPIO_4_16 MXS_GPIO_NR(4, 16)
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#define TX28_FEC_PHY_POWER MXS_GPIO_NR(3, 29)
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#define TX28_FEC_PHY_RESET MXS_GPIO_NR(4, 13)
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#define TX28_FEC_nINT MXS_GPIO_NR(4, 5)
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static const struct gpio tx28_gpios[] __initconst = {
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{ ENET0_MDC__GPIO_4_0, GPIOF_OUT_INIT_LOW, "GPIO_4_0" },
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{ ENET0_MDIO__GPIO_4_1, GPIOF_OUT_INIT_LOW, "GPIO_4_1" },
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{ ENET0_RX_EN__GPIO_4_2, GPIOF_OUT_INIT_LOW, "GPIO_4_2" },
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{ ENET0_RXD0__GPIO_4_3, GPIOF_OUT_INIT_LOW, "GPIO_4_3" },
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{ ENET0_RXD1__GPIO_4_4, GPIOF_OUT_INIT_LOW, "GPIO_4_4" },
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{ ENET0_TX_EN__GPIO_4_6, GPIOF_OUT_INIT_LOW, "GPIO_4_6" },
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{ ENET0_TXD0__GPIO_4_7, GPIOF_OUT_INIT_LOW, "GPIO_4_7" },
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{ ENET0_TXD1__GPIO_4_8, GPIOF_OUT_INIT_LOW, "GPIO_4_8" },
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{ ENET_CLK__GPIO_4_16, GPIOF_OUT_INIT_LOW, "GPIO_4_16" },
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{ TX28_FEC_PHY_POWER, GPIOF_OUT_INIT_LOW, "fec-phy-power" },
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{ TX28_FEC_PHY_RESET, GPIOF_OUT_INIT_LOW, "fec-phy-reset" },
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{ TX28_FEC_nINT, GPIOF_DIR_IN, "fec-int" },
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};
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static void __init tx28_post_init(void)
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{
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struct device_node *np;
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struct platform_device *pdev;
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struct pinctrl *pctl;
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int ret;
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enable_clk_enet_out();
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np = of_find_compatible_node(NULL, NULL, "fsl,imx28-fec");
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pdev = of_find_device_by_node(np);
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if (!pdev) {
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pr_err("%s: failed to find fec device\n", __func__);
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return;
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}
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pctl = pinctrl_get_select(&pdev->dev, "gpio_mode");
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if (IS_ERR(pctl)) {
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pr_err("%s: failed to get pinctrl state\n", __func__);
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return;
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}
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|
|
ret = gpio_request_array(tx28_gpios, ARRAY_SIZE(tx28_gpios));
|
|
|
|
if (ret) {
|
|
|
|
pr_err("%s: failed to request gpios: %d\n", __func__, ret);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Power up fec phy */
|
|
|
|
gpio_set_value(TX28_FEC_PHY_POWER, 1);
|
|
|
|
msleep(26); /* 25ms according to data sheet */
|
|
|
|
|
|
|
|
/* Mode strap pins */
|
|
|
|
gpio_set_value(ENET0_RX_EN__GPIO_4_2, 1);
|
|
|
|
gpio_set_value(ENET0_RXD0__GPIO_4_3, 1);
|
|
|
|
gpio_set_value(ENET0_RXD1__GPIO_4_4, 1);
|
|
|
|
|
|
|
|
udelay(100); /* minimum assertion time for nRST */
|
|
|
|
|
|
|
|
/* Deasserting FEC PHY RESET */
|
|
|
|
gpio_set_value(TX28_FEC_PHY_RESET, 1);
|
|
|
|
|
|
|
|
pinctrl_put(pctl);
|
|
|
|
}
|
|
|
|
|
2013-06-13 13:43:44 +00:00
|
|
|
static void __init crystalfontz_init(void)
|
2012-10-07 02:36:28 +00:00
|
|
|
{
|
|
|
|
update_fec_mac_prop(OUI_CRYSTALFONTZ);
|
|
|
|
}
|
|
|
|
|
2013-11-09 11:14:16 +00:00
|
|
|
static void __init duckbill_init(void)
|
|
|
|
{
|
|
|
|
update_fec_mac_prop(OUI_I2SE);
|
|
|
|
}
|
|
|
|
|
2013-09-29 22:41:29 +00:00
|
|
|
static void __init m28cu3_init(void)
|
|
|
|
{
|
|
|
|
update_fec_mac_prop(OUI_DENX);
|
|
|
|
}
|
|
|
|
|
2013-06-04 13:18:45 +00:00
|
|
|
static const char __init *mxs_get_soc_id(void)
|
2013-01-26 05:40:37 +00:00
|
|
|
{
|
2013-06-04 13:18:45 +00:00
|
|
|
struct device_node *np;
|
|
|
|
void __iomem *digctl_base;
|
|
|
|
|
|
|
|
np = of_find_compatible_node(NULL, NULL, "fsl,imx23-digctl");
|
|
|
|
digctl_base = of_iomap(np, 0);
|
|
|
|
WARN_ON(!digctl_base);
|
|
|
|
|
|
|
|
chipid = readl(digctl_base + HW_DIGCTL_CHIPID);
|
|
|
|
socid = chipid & HW_DIGCTL_CHIPID_MASK;
|
|
|
|
|
|
|
|
iounmap(digctl_base);
|
|
|
|
of_node_put(np);
|
|
|
|
|
|
|
|
switch (socid) {
|
|
|
|
case HW_DIGCTL_CHIPID_MX23:
|
|
|
|
return "i.MX23";
|
|
|
|
case HW_DIGCTL_CHIPID_MX28:
|
|
|
|
return "i.MX28";
|
|
|
|
default:
|
|
|
|
return "Unknown";
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static u32 __init mxs_get_cpu_rev(void)
|
|
|
|
{
|
|
|
|
u32 rev = chipid & HW_DIGCTL_REV_MASK;
|
|
|
|
|
|
|
|
switch (socid) {
|
|
|
|
case HW_DIGCTL_CHIPID_MX23:
|
|
|
|
switch (rev) {
|
|
|
|
case 0x0:
|
|
|
|
return MXS_CHIP_REVISION_1_0;
|
|
|
|
case 0x1:
|
|
|
|
return MXS_CHIP_REVISION_1_1;
|
|
|
|
case 0x2:
|
|
|
|
return MXS_CHIP_REVISION_1_2;
|
|
|
|
case 0x3:
|
|
|
|
return MXS_CHIP_REVISION_1_3;
|
|
|
|
case 0x4:
|
|
|
|
return MXS_CHIP_REVISION_1_4;
|
|
|
|
default:
|
|
|
|
return MXS_CHIP_REV_UNKNOWN;
|
|
|
|
}
|
|
|
|
case HW_DIGCTL_CHIPID_MX28:
|
|
|
|
switch (rev) {
|
|
|
|
case 0x0:
|
|
|
|
return MXS_CHIP_REVISION_1_1;
|
|
|
|
case 0x1:
|
|
|
|
return MXS_CHIP_REVISION_1_2;
|
|
|
|
default:
|
|
|
|
return MXS_CHIP_REV_UNKNOWN;
|
|
|
|
}
|
|
|
|
default:
|
|
|
|
return MXS_CHIP_REV_UNKNOWN;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static const char __init *mxs_get_revision(void)
|
|
|
|
{
|
|
|
|
u32 rev = mxs_get_cpu_rev();
|
|
|
|
|
|
|
|
if (rev != MXS_CHIP_REV_UNKNOWN)
|
2013-08-13 13:28:02 +00:00
|
|
|
return kasprintf(GFP_KERNEL, "%d.%d", (rev >> 4) & 0xf,
|
2013-06-04 13:18:45 +00:00
|
|
|
rev & 0xf);
|
|
|
|
else
|
|
|
|
return kasprintf(GFP_KERNEL, "%s", "Unknown");
|
2013-01-26 05:40:37 +00:00
|
|
|
}
|
|
|
|
|
2013-08-05 08:51:14 +00:00
|
|
|
#define MX23_CLKCTRL_RESET_OFFSET 0x120
|
|
|
|
#define MX28_CLKCTRL_RESET_OFFSET 0x1e0
|
|
|
|
|
|
|
|
static int __init mxs_restart_init(void)
|
|
|
|
{
|
|
|
|
struct device_node *np;
|
|
|
|
|
|
|
|
np = of_find_compatible_node(NULL, NULL, "fsl,clkctrl");
|
|
|
|
reset_addr = of_iomap(np, 0);
|
|
|
|
if (!reset_addr)
|
|
|
|
return -ENODEV;
|
|
|
|
|
|
|
|
if (of_device_is_compatible(np, "fsl,imx23-clkctrl"))
|
|
|
|
reset_addr += MX23_CLKCTRL_RESET_OFFSET;
|
|
|
|
else
|
|
|
|
reset_addr += MX28_CLKCTRL_RESET_OFFSET;
|
|
|
|
of_node_put(np);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2012-03-31 13:26:57 +00:00
|
|
|
static void __init mxs_machine_init(void)
|
|
|
|
{
|
2013-06-04 13:18:45 +00:00
|
|
|
struct device_node *root;
|
|
|
|
struct device *parent;
|
|
|
|
struct soc_device *soc_dev;
|
|
|
|
struct soc_device_attribute *soc_dev_attr;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
|
|
|
|
if (!soc_dev_attr)
|
|
|
|
return;
|
|
|
|
|
|
|
|
root = of_find_node_by_path("/");
|
|
|
|
ret = of_property_read_string(root, "model", &soc_dev_attr->machine);
|
|
|
|
if (ret)
|
|
|
|
return;
|
|
|
|
|
|
|
|
soc_dev_attr->family = "Freescale MXS Family";
|
|
|
|
soc_dev_attr->soc_id = mxs_get_soc_id();
|
|
|
|
soc_dev_attr->revision = mxs_get_revision();
|
|
|
|
|
|
|
|
soc_dev = soc_device_register(soc_dev_attr);
|
|
|
|
if (IS_ERR(soc_dev)) {
|
|
|
|
kfree(soc_dev_attr->revision);
|
|
|
|
kfree(soc_dev_attr);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
parent = soc_device_to_device(soc_dev);
|
|
|
|
|
2012-03-31 13:26:57 +00:00
|
|
|
if (of_machine_is_compatible("fsl,imx28-evk"))
|
|
|
|
imx28_evk_init();
|
2012-07-07 15:12:03 +00:00
|
|
|
else if (of_machine_is_compatible("bluegiga,apx4devkit"))
|
|
|
|
apx4devkit_init();
|
2013-07-01 13:23:22 +00:00
|
|
|
else if (of_machine_is_compatible("crystalfontz,cfa10036"))
|
2013-06-13 13:43:44 +00:00
|
|
|
crystalfontz_init();
|
2013-11-09 11:14:16 +00:00
|
|
|
else if (of_machine_is_compatible("i2se,duckbill"))
|
|
|
|
duckbill_init();
|
2013-09-29 22:41:29 +00:00
|
|
|
else if (of_machine_is_compatible("msr,m28cu3"))
|
|
|
|
m28cu3_init();
|
2012-03-31 13:26:57 +00:00
|
|
|
|
|
|
|
of_platform_populate(NULL, of_default_bus_match_table,
|
Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next
Pull networking updates from David Miller:
"This is a re-do of the net-next pull request for the current merge
window. The only difference from the one I made the other day is that
this has Eliezer's interface renames and the timeout handling changes
made based upon your feedback, as well as a few bug fixes that have
trickeled in.
Highlights:
1) Low latency device polling, eliminating the cost of interrupt
handling and context switches. Allows direct polling of a network
device from socket operations, such as recvmsg() and poll().
Currently ixgbe, mlx4, and bnx2x support this feature.
Full high level description, performance numbers, and design in
commit 0a4db187a999 ("Merge branch 'll_poll'")
From Eliezer Tamir.
2) With the routing cache removed, ip_check_mc_rcu() gets exercised
more than ever before in the case where we have lots of multicast
addresses. Use a hash table instead of a simple linked list, from
Eric Dumazet.
3) Add driver for Atheros CQA98xx 802.11ac wireless devices, from
Bartosz Markowski, Janusz Dziedzic, Kalle Valo, Marek Kwaczynski,
Marek Puzyniak, Michal Kazior, and Sujith Manoharan.
4) Support reporting the TUN device persist flag to userspace, from
Pavel Emelyanov.
5) Allow controlling network device VF link state using netlink, from
Rony Efraim.
6) Support GRE tunneling in openvswitch, from Pravin B Shelar.
7) Adjust SOCK_MIN_RCVBUF and SOCK_MIN_SNDBUF for modern times, from
Daniel Borkmann and Eric Dumazet.
8) Allow controlling of TCP quickack behavior on a per-route basis,
from Cong Wang.
9) Several bug fixes and improvements to vxlan from Stephen
Hemminger, Pravin B Shelar, and Mike Rapoport. In particular,
support receiving on multiple UDP ports.
10) Major cleanups, particular in the area of debugging and cookie
lifetime handline, to the SCTP protocol code. From Daniel
Borkmann.
11) Allow packets to cross network namespaces when traversing tunnel
devices. From Nicolas Dichtel.
12) Allow monitoring netlink traffic via AF_PACKET sockets, in a
manner akin to how we monitor real network traffic via ptype_all.
From Daniel Borkmann.
13) Several bug fixes and improvements for the new alx device driver,
from Johannes Berg.
14) Fix scalability issues in the netem packet scheduler's time queue,
by using an rbtree. From Eric Dumazet.
15) Several bug fixes in TCP loss recovery handling, from Yuchung
Cheng.
16) Add support for GSO segmentation of MPLS packets, from Simon
Horman.
17) Make network notifiers have a real data type for the opaque
pointer that's passed into them. Use this to properly handle
network device flag changes in arp_netdev_event(). From Jiri
Pirko and Timo Teräs.
18) Convert several drivers over to module_pci_driver(), from Peter
Huewe.
19) tcp_fixup_rcvbuf() can loop 500 times over loopback, just use a
O(1) calculation instead. From Eric Dumazet.
20) Support setting of explicit tunnel peer addresses in ipv6, just
like ipv4. From Nicolas Dichtel.
21) Protect x86 BPF JIT against spraying attacks, from Eric Dumazet.
22) Prevent a single high rate flow from overruning an individual cpu
during RX packet processing via selective flow shedding. From
Willem de Bruijn.
23) Don't use spinlocks in TCP md5 signing fast paths, from Eric
Dumazet.
24) Don't just drop GSO packets which are above the TBF scheduler's
burst limit, chop them up so they are in-bounds instead. Also
from Eric Dumazet.
25) VLAN offloads are missed when configured on top of a bridge, fix
from Vlad Yasevich.
26) Support IPV6 in ping sockets. From Lorenzo Colitti.
27) Receive flow steering targets should be updated at poll() time
too, from David Majnemer.
28) Fix several corner case regressions in PMTU/redirect handling due
to the routing cache removal, from Timo Teräs.
29) We have to be mindful of ipv4 mapped ipv6 sockets in
upd_v6_push_pending_frames(). From Hannes Frederic Sowa.
30) Fix L2TP sequence number handling bugs, from James Chapman."
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next: (1214 commits)
drivers/net: caif: fix wrong rtnl_is_locked() usage
drivers/net: enic: release rtnl_lock on error-path
vhost-net: fix use-after-free in vhost_net_flush
net: mv643xx_eth: do not use port number as platform device id
net: sctp: confirm route during forward progress
virtio_net: fix race in RX VQ processing
virtio: support unlocked queue poll
net/cadence/macb: fix bug/typo in extracting gem_irq_read_clear bit
Documentation: Fix references to defunct linux-net@vger.kernel.org
net/fs: change busy poll time accounting
net: rename low latency sockets functions to busy poll
bridge: fix some kernel warning in multicast timer
sfc: Fix memory leak when discarding scattered packets
sit: fix tunnel update via netlink
dt:net:stmmac: Add dt specific phy reset callback support.
dt:net:stmmac: Add support to dwmac version 3.610 and 3.710
dt:net:stmmac: Allocate platform data only if its NULL.
net:stmmac: fix memleak in the open method
ipv6: rt6_check_neigh should successfully verify neigh if no NUD information are available
net: ipv6: fix wrong ping_v6_sendmsg return value
...
2013-07-10 01:24:39 +00:00
|
|
|
NULL, parent);
|
2012-07-13 06:15:34 +00:00
|
|
|
|
2013-08-05 08:51:14 +00:00
|
|
|
mxs_restart_init();
|
|
|
|
|
2012-07-13 06:15:34 +00:00
|
|
|
if (of_machine_is_compatible("karo,tx28"))
|
|
|
|
tx28_post_init();
|
2012-03-31 13:26:57 +00:00
|
|
|
}
|
|
|
|
|
2013-03-29 01:45:31 +00:00
|
|
|
#define MXS_CLKCTRL_RESET_CHIP (1 << 1)
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Reset the system. It is called by machine_restart().
|
|
|
|
*/
|
2013-07-08 23:01:40 +00:00
|
|
|
static void mxs_restart(enum reboot_mode mode, const char *cmd)
|
2013-03-29 01:45:31 +00:00
|
|
|
{
|
2013-08-05 08:51:14 +00:00
|
|
|
if (reset_addr) {
|
|
|
|
/* reset the chip */
|
|
|
|
__mxs_setl(MXS_CLKCTRL_RESET_CHIP, reset_addr);
|
2013-03-29 01:45:31 +00:00
|
|
|
|
2013-08-05 08:51:14 +00:00
|
|
|
pr_err("Failed to assert the chip reset\n");
|
2013-03-29 01:45:31 +00:00
|
|
|
|
2013-08-05 08:51:14 +00:00
|
|
|
/* Delay to allow the serial port to show the message */
|
|
|
|
mdelay(50);
|
|
|
|
}
|
2013-03-29 01:45:31 +00:00
|
|
|
|
|
|
|
/* We'll take a jump through zero as a poor second */
|
|
|
|
soft_restart(0);
|
|
|
|
}
|
|
|
|
|
2013-03-29 06:04:07 +00:00
|
|
|
static const char *mxs_dt_compat[] __initdata = {
|
2012-03-31 13:26:57 +00:00
|
|
|
"fsl,imx28",
|
2013-03-29 06:04:07 +00:00
|
|
|
"fsl,imx23",
|
2012-03-31 13:26:57 +00:00
|
|
|
NULL,
|
|
|
|
};
|
|
|
|
|
2013-03-29 06:04:07 +00:00
|
|
|
DT_MACHINE_START(MXS, "Freescale MXS (Device Tree)")
|
2012-08-20 02:14:56 +00:00
|
|
|
.handle_irq = icoll_handle_irq,
|
2012-03-31 13:26:57 +00:00
|
|
|
.init_machine = mxs_machine_init,
|
2013-03-29 06:41:27 +00:00
|
|
|
.init_late = mxs_pm_init,
|
2013-03-29 06:04:07 +00:00
|
|
|
.dt_compat = mxs_dt_compat,
|
2012-03-31 13:26:57 +00:00
|
|
|
.restart = mxs_restart,
|
|
|
|
MACHINE_END
|