linux/drivers/soc/xilinx/Kconfig

# SPDX-License-Identifier: GPL-2.0
menu "Xilinx SoC drivers"

config XILINX_VCU
        tristate "Xilinx VCU logicoreIP Init"
	depends on HAS_IOMEM
        help
          Provides the driver to enable and disable the isolation between the
          processing system and programmable logic part by using the logicoreIP
          register set. This driver also configures the frequency based on the
          clock information from the logicoreIP register set.

          If you say yes here you get support for the logicoreIP.

          If unsure, say N.

          To compile this driver as a module, choose M here: the
          module will be called xlnx_vcu.

endmenu
soc: xilinx: Create folder structure for soc specific drivers Create directory structure with Makefile/Kconfig for adding xilinx soc specific drivers. Signed-off-by: Michal Simek <michal.simek@xilinx.com> 2017-12-19 13:15:25 +00:00			`# SPDX-License-Identifier: GPL-2.0`
			`menu "Xilinx SoC drivers"`

soc: xilinx: xlnx_vcu: Add Xilinx ZYNQMP VCU logicoreIP init driver Xilinx ZYNQMP logicoreIP Init driver is based on the new LogiCoreIP design created. This driver provides the processing system and programmable logic isolation. Set the frequency based on the clock information get from the logicoreIP register set. Signed-off-by: Dhaval Shah <dshah@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> 2017-12-21 18:33:06 +00:00			`config XILINX_VCU`
			`tristate "Xilinx VCU logicoreIP Init"`
soc: xilinx: xlnx_vcu: Depends on HAS_IOMEM for xlnx_vcu xlnx_vcu driver uses devm_ioremap_nocache, which is included only when HAS_IOMEM is enabled. drivers/soc/xilinx/xlnx_vcu.o: In function `xvcu_probe': xlnx_vcu.c:(.text+0x116): undefined reference to `devm_ioremap_nocache' xlnx_vcu.c:(.text+0x1ae): undefined reference to `devm_ioremap_nocache' Signed-off-by: Dhaval Shah <dshah@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> 2018-01-16 06:34:48 +00:00			`depends on HAS_IOMEM`
soc: xilinx: xlnx_vcu: Add Xilinx ZYNQMP VCU logicoreIP init driver Xilinx ZYNQMP logicoreIP Init driver is based on the new LogiCoreIP design created. This driver provides the processing system and programmable logic isolation. Set the frequency based on the clock information get from the logicoreIP register set. Signed-off-by: Dhaval Shah <dshah@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> 2017-12-21 18:33:06 +00:00			`help`
			`Provides the driver to enable and disable the isolation between the`
			`processing system and programmable logic part by using the logicoreIP`
			`register set. This driver also configures the frequency based on the`
			`clock information from the logicoreIP register set.`

			`If you say yes here you get support for the logicoreIP.`

			`If unsure, say N.`

			`To compile this driver as a module, choose M here: the`
			`module will be called xlnx_vcu.`

soc: xilinx: Create folder structure for soc specific drivers Create directory structure with Makefile/Kconfig for adding xilinx soc specific drivers. Signed-off-by: Michal Simek <michal.simek@xilinx.com> 2017-12-19 13:15:25 +00:00			`endmenu`