2008-08-19 08:08:43 +00:00
|
|
|
/*
|
|
|
|
|
* OMAP2/3 clockdomain framework functions
|
|
|
|
|
*
|
ARM: OMAP2+: clockdomain/hwmod: add workaround for EMU clockdomain idle problems
The idle status of the IP blocks and clocks inside the EMU clockdomain
isn't taken into account by the PRCM hardware when deciding whether
the clockdomain is idle. Add a workaround flag in the clockdomain
code, CLKDM_MISSING_IDLE_REPORTING, to deal with this problem, and add
the code necessary to support it.
If CLKDM_MISSING_IDLE_REPORTING is set on a clockdomain, the
clockdomain will be forced active whenever an IP block inside that
clockdomain is in use, even if the clockdomain supports
hardware-supervised idle. When the kernel indicates that the last
active IP block inside the clockdomain is no longer used, the
clockdomain will be forced idle, or, if that mode is not supported in
the hardware, it will be placed into hardware-supervised idle.
This patch is an equal collaboration with Jon Hunter
<jon-hunter@ti.com>. Ming Lei <ming.lei@canonical.com>, Will Deacon
<will.deacon@arm.com>, Madhav Vij <mvij@ti.com>, Kevin Hilman
<khilman@ti.com>, Benoît Cousson <b-cousson@ti.com>, and Santosh
Shilimkar <santosh.shilimkar@ti.com> all made essential contributions
to the understanding of EMU clockdomain power management on OMAP.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Jon Hunter <jon-hunter@ti.com>
Cc: Ming Lei <ming.lei@canonical.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Madhav Vij <mvij@ti.com>
Cc: Kevin Hilman <khilman@ti.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Jon Hunter <jon-hunter@ti.com>
2012-09-23 23:28:28 +00:00
|
|
|
* Copyright (C) 2008, 2012 Texas Instruments, Inc.
|
2011-03-10 10:50:09 +00:00
|
|
|
* Copyright (C) 2008-2011 Nokia Corporation
|
2008-08-19 08:08:43 +00:00
|
|
|
*
|
2010-12-22 03:01:20 +00:00
|
|
|
* Paul Walmsley
|
2008-08-19 08:08:43 +00:00
|
|
|
*
|
|
|
|
|
* This program is free software; you can redistribute it and/or modify
|
|
|
|
|
* it under the terms of the GNU General Public License version 2 as
|
|
|
|
|
* published by the Free Software Foundation.
|
|
|
|
|
*/
|
|
|
|
|
|
2010-12-22 04:05:15 +00:00
|
|
|
#ifndef __ARCH_ARM_MACH_OMAP2_CLOCKDOMAIN_H
|
|
|
|
|
#define __ARCH_ARM_MACH_OMAP2_CLOCKDOMAIN_H
|
2008-08-19 08:08:43 +00:00
|
|
|
|
2010-12-22 03:01:20 +00:00
|
|
|
#include <linux/init.h>
|
|
|
|
|
|
2010-12-22 04:05:16 +00:00
|
|
|
#include "powerdomain.h"
|
2012-09-27 16:33:34 +00:00
|
|
|
#include "clock.h"
|
2008-08-19 08:08:43 +00:00
|
|
|
|
2011-03-10 10:50:09 +00:00
|
|
|
/*
|
|
|
|
|
* Clockdomain flags
|
|
|
|
|
*
|
|
|
|
|
* XXX Document CLKDM_CAN_* flags
|
|
|
|
|
*
|
|
|
|
|
* CLKDM_NO_AUTODEPS: Prevent "autodeps" from being added/removed from this
|
|
|
|
|
* clockdomain. (Currently, this applies to OMAP3 clockdomains only.)
|
ARM: OMAP2+: hwmod code/clockdomain data: fix 32K sync timer
Kevin discovered that commit c8d82ff68fb6873691536cf33021977efbf5593c
("ARM: OMAP2/3: hwmod data: Add 32k-sync timer data to hwmod
database") broke CORE idle on OMAP3. This prevents device low power
states.
The root cause is that the 32K sync timer IP block does not support
smart-idle mode[1], and so the hwmod code keeps the IP block in
no-idle mode while it is active. This in turn prevents the WKUP
clockdomain from transitioning to idle. There is a hardcoded sleep
dependency that prevents the CORE_L3 and CORE_CM clockdomains from
transitioning to idle when the WKUP clockdomain is active[2], so the
chip cannot enter any device low power states.
It turns out that there is no need to take the 32k sync timer out of
idle. The IP block itself probably does not have any native idle
handling at all, due to its simplicity. Furthermore, the PRCM will
never request target idle for this IP block while the kernel is
running, due to the sleep dependency that prevents the WKUP
clockdomain from idling while the CORE_L3 clockdomain is active. So
we can safely leave the 32k sync timer in target-force-idle mode, even
while we continue to access it.
This workaround is implemented by defining a new clockdomain flag,
CLKDM_ACTIVE_WITH_MPU, that indicates that the clockdomain is
guaranteed to be active whenever the MPU is inactive. If an IP
block's main functional clock exists inside this clockdomain, and the
IP block does not support smart-idle modes, then the hwmod code will
place the IP block into target force-idle mode even when enabled. The
WKUP clockdomains on OMAP3/4 are marked with this flag. (On OMAP2xxx,
no OCP header existed on the 32k sync timer.) Other clockdomains also
should be marked with this flag, but those changes are deferred until
a later merge window, to create a minimal fix.
Another theoretically clean fix for this problem would be to implement
PM runtime-based control for 32k sync timer accesses. These PM
runtime calls would need to located in a custom clocksource, since the
32k sync timer is currently used as an MMIO clocksource. But in
practice, there would be little benefit to doing so; and there would
be some cost, due to the addition of unnecessary lines of code and the
additional CPU overhead of the PM runtime and hwmod code - unnecessary
in this case.
Another possible fix would have been to modify the pm34xx.c code to
force the IP block idle before entering WFI. But this would not have
been an acceptable approach: we are trying to remove this type of
centralized IP block idle control from the PM code.
This patch is a collaboration between Kevin Hilman <khilman@ti.com>
and Paul Walmsley <paul@pwsan.com>.
Thanks to Vaibhav Hiremath <hvaibhav@ti.com> for providing comments on
an earlier version of this patch. Thanks to Tero Kristo
<t-kristo@ti.com> for identifying a bug in an earlier version of this
patch. Thanks to Benoît Cousson <b-cousson@ti.com> for identifying
some bugs in several versions of this patch and for implementation
comments.
References:
1. Table 16-96 "REG_32KSYNCNT_SYSCONFIG" of the OMAP34xx TRM Rev. ZU
(SWPU223U), available from:
http://www.ti.com/pdfs/wtbu/OMAP34x_ES3.1.x_PUBLIC_TRM_vzU.zip
2. Table 4-72 "Sleep Dependencies" of the OMAP34xx TRM Rev. ZU
(SWPU223U)
3. ibid.
Cc: Tony Lindgren <tony@atomide.com>
Cc: Vaibhav Hiremath <hvaibhav@ti.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
2012-07-04 11:22:53 +00:00
|
|
|
* CLKDM_ACTIVE_WITH_MPU: The PRCM guarantees that this clockdomain is
|
|
|
|
|
* active whenever the MPU is active. True for interconnects and
|
|
|
|
|
* the WKUP clockdomains.
|
ARM: OMAP2+: clockdomain/hwmod: add workaround for EMU clockdomain idle problems
The idle status of the IP blocks and clocks inside the EMU clockdomain
isn't taken into account by the PRCM hardware when deciding whether
the clockdomain is idle. Add a workaround flag in the clockdomain
code, CLKDM_MISSING_IDLE_REPORTING, to deal with this problem, and add
the code necessary to support it.
If CLKDM_MISSING_IDLE_REPORTING is set on a clockdomain, the
clockdomain will be forced active whenever an IP block inside that
clockdomain is in use, even if the clockdomain supports
hardware-supervised idle. When the kernel indicates that the last
active IP block inside the clockdomain is no longer used, the
clockdomain will be forced idle, or, if that mode is not supported in
the hardware, it will be placed into hardware-supervised idle.
This patch is an equal collaboration with Jon Hunter
<jon-hunter@ti.com>. Ming Lei <ming.lei@canonical.com>, Will Deacon
<will.deacon@arm.com>, Madhav Vij <mvij@ti.com>, Kevin Hilman
<khilman@ti.com>, Benoît Cousson <b-cousson@ti.com>, and Santosh
Shilimkar <santosh.shilimkar@ti.com> all made essential contributions
to the understanding of EMU clockdomain power management on OMAP.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Jon Hunter <jon-hunter@ti.com>
Cc: Ming Lei <ming.lei@canonical.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Madhav Vij <mvij@ti.com>
Cc: Kevin Hilman <khilman@ti.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Jon Hunter <jon-hunter@ti.com>
2012-09-23 23:28:28 +00:00
|
|
|
* CLKDM_MISSING_IDLE_REPORTING: The idle status of the IP blocks and
|
|
|
|
|
* clocks inside this clockdomain are not taken into account by
|
|
|
|
|
* the PRCM when determining whether the clockdomain is idle.
|
|
|
|
|
* Without this flag, if the clockdomain is set to
|
|
|
|
|
* hardware-supervised idle mode, the PRCM may transition the
|
|
|
|
|
* enclosing powerdomain to a low power state, even when devices
|
|
|
|
|
* inside the clockdomain and powerdomain are in use. (An example
|
|
|
|
|
* of such a clockdomain is the EMU clockdomain on OMAP3/4.) If
|
|
|
|
|
* this flag is set, and the clockdomain does not support the
|
|
|
|
|
* force-sleep mode, then the HW_AUTO mode will be used to put the
|
|
|
|
|
* clockdomain to sleep. Similarly, if the clockdomain supports
|
|
|
|
|
* the force-wakeup mode, then it will be used whenever a clock or
|
|
|
|
|
* IP block inside the clockdomain is active, rather than the
|
|
|
|
|
* HW_AUTO mode.
|
2011-03-10 10:50:09 +00:00
|
|
|
*/
|
2008-08-19 08:08:43 +00:00
|
|
|
#define CLKDM_CAN_FORCE_SLEEP (1 << 0)
|
|
|
|
|
#define CLKDM_CAN_FORCE_WAKEUP (1 << 1)
|
|
|
|
|
#define CLKDM_CAN_ENABLE_AUTO (1 << 2)
|
|
|
|
|
#define CLKDM_CAN_DISABLE_AUTO (1 << 3)
|
2011-03-10 10:50:09 +00:00
|
|
|
#define CLKDM_NO_AUTODEPS (1 << 4)
|
ARM: OMAP2+: hwmod code/clockdomain data: fix 32K sync timer
Kevin discovered that commit c8d82ff68fb6873691536cf33021977efbf5593c
("ARM: OMAP2/3: hwmod data: Add 32k-sync timer data to hwmod
database") broke CORE idle on OMAP3. This prevents device low power
states.
The root cause is that the 32K sync timer IP block does not support
smart-idle mode[1], and so the hwmod code keeps the IP block in
no-idle mode while it is active. This in turn prevents the WKUP
clockdomain from transitioning to idle. There is a hardcoded sleep
dependency that prevents the CORE_L3 and CORE_CM clockdomains from
transitioning to idle when the WKUP clockdomain is active[2], so the
chip cannot enter any device low power states.
It turns out that there is no need to take the 32k sync timer out of
idle. The IP block itself probably does not have any native idle
handling at all, due to its simplicity. Furthermore, the PRCM will
never request target idle for this IP block while the kernel is
running, due to the sleep dependency that prevents the WKUP
clockdomain from idling while the CORE_L3 clockdomain is active. So
we can safely leave the 32k sync timer in target-force-idle mode, even
while we continue to access it.
This workaround is implemented by defining a new clockdomain flag,
CLKDM_ACTIVE_WITH_MPU, that indicates that the clockdomain is
guaranteed to be active whenever the MPU is inactive. If an IP
block's main functional clock exists inside this clockdomain, and the
IP block does not support smart-idle modes, then the hwmod code will
place the IP block into target force-idle mode even when enabled. The
WKUP clockdomains on OMAP3/4 are marked with this flag. (On OMAP2xxx,
no OCP header existed on the 32k sync timer.) Other clockdomains also
should be marked with this flag, but those changes are deferred until
a later merge window, to create a minimal fix.
Another theoretically clean fix for this problem would be to implement
PM runtime-based control for 32k sync timer accesses. These PM
runtime calls would need to located in a custom clocksource, since the
32k sync timer is currently used as an MMIO clocksource. But in
practice, there would be little benefit to doing so; and there would
be some cost, due to the addition of unnecessary lines of code and the
additional CPU overhead of the PM runtime and hwmod code - unnecessary
in this case.
Another possible fix would have been to modify the pm34xx.c code to
force the IP block idle before entering WFI. But this would not have
been an acceptable approach: we are trying to remove this type of
centralized IP block idle control from the PM code.
This patch is a collaboration between Kevin Hilman <khilman@ti.com>
and Paul Walmsley <paul@pwsan.com>.
Thanks to Vaibhav Hiremath <hvaibhav@ti.com> for providing comments on
an earlier version of this patch. Thanks to Tero Kristo
<t-kristo@ti.com> for identifying a bug in an earlier version of this
patch. Thanks to Benoît Cousson <b-cousson@ti.com> for identifying
some bugs in several versions of this patch and for implementation
comments.
References:
1. Table 16-96 "REG_32KSYNCNT_SYSCONFIG" of the OMAP34xx TRM Rev. ZU
(SWPU223U), available from:
http://www.ti.com/pdfs/wtbu/OMAP34x_ES3.1.x_PUBLIC_TRM_vzU.zip
2. Table 4-72 "Sleep Dependencies" of the OMAP34xx TRM Rev. ZU
(SWPU223U)
3. ibid.
Cc: Tony Lindgren <tony@atomide.com>
Cc: Vaibhav Hiremath <hvaibhav@ti.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
2012-07-04 11:22:53 +00:00
|
|
|
#define CLKDM_ACTIVE_WITH_MPU (1 << 5)
|
ARM: OMAP2+: clockdomain/hwmod: add workaround for EMU clockdomain idle problems
The idle status of the IP blocks and clocks inside the EMU clockdomain
isn't taken into account by the PRCM hardware when deciding whether
the clockdomain is idle. Add a workaround flag in the clockdomain
code, CLKDM_MISSING_IDLE_REPORTING, to deal with this problem, and add
the code necessary to support it.
If CLKDM_MISSING_IDLE_REPORTING is set on a clockdomain, the
clockdomain will be forced active whenever an IP block inside that
clockdomain is in use, even if the clockdomain supports
hardware-supervised idle. When the kernel indicates that the last
active IP block inside the clockdomain is no longer used, the
clockdomain will be forced idle, or, if that mode is not supported in
the hardware, it will be placed into hardware-supervised idle.
This patch is an equal collaboration with Jon Hunter
<jon-hunter@ti.com>. Ming Lei <ming.lei@canonical.com>, Will Deacon
<will.deacon@arm.com>, Madhav Vij <mvij@ti.com>, Kevin Hilman
<khilman@ti.com>, Benoît Cousson <b-cousson@ti.com>, and Santosh
Shilimkar <santosh.shilimkar@ti.com> all made essential contributions
to the understanding of EMU clockdomain power management on OMAP.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Jon Hunter <jon-hunter@ti.com>
Cc: Ming Lei <ming.lei@canonical.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Madhav Vij <mvij@ti.com>
Cc: Kevin Hilman <khilman@ti.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Jon Hunter <jon-hunter@ti.com>
2012-09-23 23:28:28 +00:00
|
|
|
#define CLKDM_MISSING_IDLE_REPORTING (1 << 6)
|
2008-08-19 08:08:43 +00:00
|
|
|
|
|
|
|
|
#define CLKDM_CAN_HWSUP (CLKDM_CAN_ENABLE_AUTO | CLKDM_CAN_DISABLE_AUTO)
|
|
|
|
|
#define CLKDM_CAN_SWSUP (CLKDM_CAN_FORCE_SLEEP | CLKDM_CAN_FORCE_WAKEUP)
|
|
|
|
|
#define CLKDM_CAN_HWSUP_SWSUP (CLKDM_CAN_SWSUP | CLKDM_CAN_HWSUP)
|
|
|
|
|
|
2010-01-27 03:13:02 +00:00
|
|
|
/**
|
|
|
|
|
* struct clkdm_autodep - clkdm deps to add when entering/exiting hwsup mode
|
|
|
|
|
* @clkdm: clockdomain to add wkdep+sleepdep on - set name member only
|
|
|
|
|
*
|
|
|
|
|
* A clockdomain that should have wkdeps and sleepdeps added when a
|
|
|
|
|
* clockdomain should stay active in hwsup mode; and conversely,
|
|
|
|
|
* removed when the clockdomain should be allowed to go inactive in
|
|
|
|
|
* hwsup mode.
|
|
|
|
|
*
|
|
|
|
|
* Autodeps are deprecated and should be removed after
|
|
|
|
|
* omap_hwmod-based fine-grained module idle control is added.
|
2008-08-19 08:08:43 +00:00
|
|
|
*/
|
2010-01-27 03:12:59 +00:00
|
|
|
struct clkdm_autodep {
|
2009-02-03 09:10:03 +00:00
|
|
|
union {
|
|
|
|
|
const char *name;
|
2010-01-27 03:12:59 +00:00
|
|
|
struct clockdomain *ptr;
|
|
|
|
|
} clkdm;
|
2008-08-19 08:08:43 +00:00
|
|
|
};
|
|
|
|
|
|
2010-01-27 03:13:02 +00:00
|
|
|
/**
|
|
|
|
|
* struct clkdm_dep - encode dependencies between clockdomains
|
|
|
|
|
* @clkdm_name: clockdomain name
|
|
|
|
|
* @clkdm: pointer to the struct clockdomain of @clkdm_name
|
|
|
|
|
* @wkdep_usecount: Number of wakeup dependencies causing this clkdm to wake
|
|
|
|
|
* @sleepdep_usecount: Number of sleep deps that could prevent clkdm from idle
|
|
|
|
|
*
|
|
|
|
|
* Statically defined. @clkdm is resolved from @clkdm_name at runtime and
|
|
|
|
|
* should not be pre-initialized.
|
|
|
|
|
*
|
|
|
|
|
* XXX Should also include hardware (fixed) dependencies.
|
|
|
|
|
*/
|
2010-01-27 03:12:59 +00:00
|
|
|
struct clkdm_dep {
|
|
|
|
|
const char *clkdm_name;
|
|
|
|
|
struct clockdomain *clkdm;
|
2013-01-26 07:58:17 +00:00
|
|
|
s16 wkdep_usecount;
|
|
|
|
|
s16 sleepdep_usecount;
|
2010-01-27 03:12:59 +00:00
|
|
|
};
|
|
|
|
|
|
2011-07-10 11:56:54 +00:00
|
|
|
/* Possible flags for struct clockdomain._flags */
|
|
|
|
|
#define _CLKDM_FLAG_HWSUP_ENABLED BIT(0)
|
|
|
|
|
|
2014-05-12 01:41:50 +00:00
|
|
|
struct omap_hwmod;
|
|
|
|
|
|
2010-01-27 03:13:02 +00:00
|
|
|
/**
|
|
|
|
|
* struct clockdomain - OMAP clockdomain
|
|
|
|
|
* @name: clockdomain name
|
|
|
|
|
* @pwrdm: powerdomain containing this clockdomain
|
|
|
|
|
* @clktrctrl_reg: CLKSTCTRL reg for the given clock domain
|
|
|
|
|
* @clktrctrl_mask: CLKTRCTRL/AUTOSTATE field mask in CM_CLKSTCTRL reg
|
|
|
|
|
* @flags: Clockdomain capability flags
|
2011-07-10 11:56:54 +00:00
|
|
|
* @_flags: Flags for use only by internal clockdomain code
|
2010-01-27 03:13:02 +00:00
|
|
|
* @dep_bit: Bit shift of this clockdomain's PM_WKDEP/CM_SLEEPDEP bit
|
2010-12-22 04:05:15 +00:00
|
|
|
* @prcm_partition: (OMAP4 only) PRCM partition ID for this clkdm's registers
|
|
|
|
|
* @cm_inst: (OMAP4 only) CM instance register offset
|
|
|
|
|
* @clkdm_offs: (OMAP4 only) CM clockdomain register offset
|
2010-01-27 03:13:02 +00:00
|
|
|
* @wkdep_srcs: Clockdomains that can be told to wake this powerdomain up
|
|
|
|
|
* @sleepdep_srcs: Clockdomains that can be told to keep this clkdm from inact
|
|
|
|
|
* @usecount: Usecount tracking
|
|
|
|
|
* @node: list_head to link all clockdomains together
|
2010-12-22 04:05:15 +00:00
|
|
|
*
|
|
|
|
|
* @prcm_partition should be a macro from mach-omap2/prcm44xx.h (OMAP4 only)
|
|
|
|
|
* @cm_inst should be a macro ending in _INST from the OMAP4 CM instance
|
|
|
|
|
* definitions (OMAP4 only)
|
|
|
|
|
* @clkdm_offs should be a macro ending in _CDOFFS from the OMAP4 CM instance
|
|
|
|
|
* definitions (OMAP4 only)
|
2010-01-27 03:13:02 +00:00
|
|
|
*/
|
2008-08-19 08:08:43 +00:00
|
|
|
struct clockdomain {
|
|
|
|
|
const char *name;
|
2009-02-03 09:10:03 +00:00
|
|
|
union {
|
|
|
|
|
const char *name;
|
|
|
|
|
struct powerdomain *ptr;
|
|
|
|
|
} pwrdm;
|
2008-08-19 08:08:43 +00:00
|
|
|
const u16 clktrctrl_mask;
|
|
|
|
|
const u8 flags;
|
2011-07-10 11:56:54 +00:00
|
|
|
u8 _flags;
|
2010-01-27 03:12:59 +00:00
|
|
|
const u8 dep_bit;
|
2010-12-22 04:05:15 +00:00
|
|
|
const u8 prcm_partition;
|
2013-10-12 10:14:21 +00:00
|
|
|
const u16 cm_inst;
|
2010-12-22 04:05:15 +00:00
|
|
|
const u16 clkdm_offs;
|
2010-01-27 03:12:59 +00:00
|
|
|
struct clkdm_dep *wkdep_srcs;
|
|
|
|
|
struct clkdm_dep *sleepdep_srcs;
|
2013-01-26 07:58:17 +00:00
|
|
|
int usecount;
|
2008-08-19 08:08:43 +00:00
|
|
|
struct list_head node;
|
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};
|
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2011-02-25 23:06:47 +00:00
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/**
|
2011-03-31 01:57:33 +00:00
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* struct clkdm_ops - Arch specific function implementations
|
2011-02-25 23:06:47 +00:00
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* @clkdm_add_wkdep: Add a wakeup dependency between clk domains
|
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* @clkdm_del_wkdep: Delete a wakeup dependency between clk domains
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* @clkdm_read_wkdep: Read wakeup dependency state between clk domains
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* @clkdm_clear_all_wkdeps: Remove all wakeup dependencies from the clk domain
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* @clkdm_add_sleepdep: Add a sleep dependency between clk domains
|
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* @clkdm_del_sleepdep: Delete a sleep dependency between clk domains
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* @clkdm_read_sleepdep: Read sleep dependency state between clk domains
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* @clkdm_clear_all_sleepdeps: Remove all sleep dependencies from the clk domain
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* @clkdm_sleep: Force a clockdomain to sleep
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* @clkdm_wakeup: Force a clockdomain to wakeup
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* @clkdm_allow_idle: Enable hw supervised idle transitions for clock domain
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* @clkdm_deny_idle: Disable hw supervised idle transitions for clock domain
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* @clkdm_clk_enable: Put the clkdm in right state for a clock enable
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* @clkdm_clk_disable: Put the clkdm in right state for a clock disable
|
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*/
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struct clkdm_ops {
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int (*clkdm_add_wkdep)(struct clockdomain *clkdm1, struct clockdomain *clkdm2);
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int (*clkdm_del_wkdep)(struct clockdomain *clkdm1, struct clockdomain *clkdm2);
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int (*clkdm_read_wkdep)(struct clockdomain *clkdm1, struct clockdomain *clkdm2);
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int (*clkdm_clear_all_wkdeps)(struct clockdomain *clkdm);
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int (*clkdm_add_sleepdep)(struct clockdomain *clkdm1, struct clockdomain *clkdm2);
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int (*clkdm_del_sleepdep)(struct clockdomain *clkdm1, struct clockdomain *clkdm2);
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int (*clkdm_read_sleepdep)(struct clockdomain *clkdm1, struct clockdomain *clkdm2);
|
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|
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int (*clkdm_clear_all_sleepdeps)(struct clockdomain *clkdm);
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|
|
int (*clkdm_sleep)(struct clockdomain *clkdm);
|
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|
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int (*clkdm_wakeup)(struct clockdomain *clkdm);
|
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|
|
|
void (*clkdm_allow_idle)(struct clockdomain *clkdm);
|
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|
|
void (*clkdm_deny_idle)(struct clockdomain *clkdm);
|
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|
|
|
int (*clkdm_clk_enable)(struct clockdomain *clkdm);
|
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|
int (*clkdm_clk_disable)(struct clockdomain *clkdm);
|
|
|
|
|
};
|
|
|
|
|
|
2011-09-14 22:01:20 +00:00
|
|
|
int clkdm_register_platform_funcs(struct clkdm_ops *co);
|
|
|
|
|
int clkdm_register_autodeps(struct clkdm_autodep *ia);
|
|
|
|
|
int clkdm_register_clkdms(struct clockdomain **c);
|
|
|
|
|
int clkdm_complete_init(void);
|
|
|
|
|
|
2008-08-19 08:08:43 +00:00
|
|
|
struct clockdomain *clkdm_lookup(const char *name);
|
|
|
|
|
|
2008-10-15 15:13:47 +00:00
|
|
|
int clkdm_for_each(int (*fn)(struct clockdomain *clkdm, void *user),
|
|
|
|
|
void *user);
|
2008-08-19 08:08:43 +00:00
|
|
|
struct powerdomain *clkdm_get_pwrdm(struct clockdomain *clkdm);
|
|
|
|
|
|
2010-01-27 03:12:59 +00:00
|
|
|
int clkdm_add_wkdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2);
|
|
|
|
|
int clkdm_del_wkdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2);
|
|
|
|
|
int clkdm_read_wkdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2);
|
OMAP clockdomains: add usecounting for wakeup and sleep dependencies
Add usecounting for wakeup and sleep dependencies. In the current
situation, if several functions add dependencies on the same
clockdomains, when the first dependency removal function is called,
the dependency will be incorrectly removed from the hardware.
Add clkdm_clear_all_wkdeps() and clkdm_clear_all_sleepdeps(), which
provide a fast and usecounting-consistent way to clear all hardware
clockdomain dependencies, since accesses to these registers can be
quite slow. pm{2,3}4xx.c has been updated to use these new functions.
The original version of this patch did not touch these files, which
previously wrote directly to the wkdep registers, and thus confused
the usecounting code. This problem was found by Kevin Hilman
<khilman@deeprootsystems.com>.
N.B.: This patch introduces one significant functional difference over
the previous pm34xx.c code: sleepdeps are now cleared during
clockdomain initialization, whereas previously they were left
untouched. This has been tested by Kevin and confirmed to work.
The original version of this patch also did not take into
consideration that some clockdomains do not have sleep or wakeup
dependency sources, which caused NULL pointer dereferences. This
problem was debugged and fixed by Kevin Hilman
<khilman@deeprootsystems.com>.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Jouni Högander <jouni.hogander@nokia.com>
2010-01-27 03:13:01 +00:00
|
|
|
int clkdm_clear_all_wkdeps(struct clockdomain *clkdm);
|
2010-01-27 03:12:59 +00:00
|
|
|
int clkdm_add_sleepdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2);
|
|
|
|
|
int clkdm_del_sleepdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2);
|
|
|
|
|
int clkdm_read_sleepdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2);
|
OMAP clockdomains: add usecounting for wakeup and sleep dependencies
Add usecounting for wakeup and sleep dependencies. In the current
situation, if several functions add dependencies on the same
clockdomains, when the first dependency removal function is called,
the dependency will be incorrectly removed from the hardware.
Add clkdm_clear_all_wkdeps() and clkdm_clear_all_sleepdeps(), which
provide a fast and usecounting-consistent way to clear all hardware
clockdomain dependencies, since accesses to these registers can be
quite slow. pm{2,3}4xx.c has been updated to use these new functions.
The original version of this patch did not touch these files, which
previously wrote directly to the wkdep registers, and thus confused
the usecounting code. This problem was found by Kevin Hilman
<khilman@deeprootsystems.com>.
N.B.: This patch introduces one significant functional difference over
the previous pm34xx.c code: sleepdeps are now cleared during
clockdomain initialization, whereas previously they were left
untouched. This has been tested by Kevin and confirmed to work.
The original version of this patch also did not take into
consideration that some clockdomains do not have sleep or wakeup
dependency sources, which caused NULL pointer dereferences. This
problem was debugged and fixed by Kevin Hilman
<khilman@deeprootsystems.com>.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Jouni Högander <jouni.hogander@nokia.com>
2010-01-27 03:13:01 +00:00
|
|
|
int clkdm_clear_all_sleepdeps(struct clockdomain *clkdm);
|
2010-01-27 03:12:59 +00:00
|
|
|
|
2013-01-26 07:58:16 +00:00
|
|
|
void clkdm_allow_idle_nolock(struct clockdomain *clkdm);
|
2011-02-25 23:06:48 +00:00
|
|
|
void clkdm_allow_idle(struct clockdomain *clkdm);
|
2013-01-26 07:58:16 +00:00
|
|
|
void clkdm_deny_idle_nolock(struct clockdomain *clkdm);
|
2011-02-25 23:06:48 +00:00
|
|
|
void clkdm_deny_idle(struct clockdomain *clkdm);
|
2011-07-10 11:56:54 +00:00
|
|
|
bool clkdm_in_hwsup(struct clockdomain *clkdm);
|
ARM: OMAP2+: clockdomain/hwmod: add workaround for EMU clockdomain idle problems
The idle status of the IP blocks and clocks inside the EMU clockdomain
isn't taken into account by the PRCM hardware when deciding whether
the clockdomain is idle. Add a workaround flag in the clockdomain
code, CLKDM_MISSING_IDLE_REPORTING, to deal with this problem, and add
the code necessary to support it.
If CLKDM_MISSING_IDLE_REPORTING is set on a clockdomain, the
clockdomain will be forced active whenever an IP block inside that
clockdomain is in use, even if the clockdomain supports
hardware-supervised idle. When the kernel indicates that the last
active IP block inside the clockdomain is no longer used, the
clockdomain will be forced idle, or, if that mode is not supported in
the hardware, it will be placed into hardware-supervised idle.
This patch is an equal collaboration with Jon Hunter
<jon-hunter@ti.com>. Ming Lei <ming.lei@canonical.com>, Will Deacon
<will.deacon@arm.com>, Madhav Vij <mvij@ti.com>, Kevin Hilman
<khilman@ti.com>, Benoît Cousson <b-cousson@ti.com>, and Santosh
Shilimkar <santosh.shilimkar@ti.com> all made essential contributions
to the understanding of EMU clockdomain power management on OMAP.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Jon Hunter <jon-hunter@ti.com>
Cc: Ming Lei <ming.lei@canonical.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Madhav Vij <mvij@ti.com>
Cc: Kevin Hilman <khilman@ti.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Jon Hunter <jon-hunter@ti.com>
2012-09-23 23:28:28 +00:00
|
|
|
bool clkdm_missing_idle_reporting(struct clockdomain *clkdm);
|
2008-08-19 08:08:43 +00:00
|
|
|
|
2013-01-26 07:58:16 +00:00
|
|
|
int clkdm_wakeup_nolock(struct clockdomain *clkdm);
|
2011-02-25 23:06:47 +00:00
|
|
|
int clkdm_wakeup(struct clockdomain *clkdm);
|
2013-01-26 07:58:16 +00:00
|
|
|
int clkdm_sleep_nolock(struct clockdomain *clkdm);
|
2011-02-25 23:06:47 +00:00
|
|
|
int clkdm_sleep(struct clockdomain *clkdm);
|
2008-08-19 08:08:43 +00:00
|
|
|
|
2011-02-25 23:06:48 +00:00
|
|
|
int clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk);
|
|
|
|
|
int clkdm_clk_disable(struct clockdomain *clkdm, struct clk *clk);
|
2011-07-10 11:56:54 +00:00
|
|
|
int clkdm_hwmod_enable(struct clockdomain *clkdm, struct omap_hwmod *oh);
|
|
|
|
|
int clkdm_hwmod_disable(struct clockdomain *clkdm, struct omap_hwmod *oh);
|
2008-08-19 08:08:43 +00:00
|
|
|
|
2011-09-14 22:01:21 +00:00
|
|
|
extern void __init omap242x_clockdomains_init(void);
|
|
|
|
|
extern void __init omap243x_clockdomains_init(void);
|
2011-02-25 23:06:47 +00:00
|
|
|
extern void __init omap3xxx_clockdomains_init(void);
|
2012-06-18 06:47:27 +00:00
|
|
|
extern void __init am33xx_clockdomains_init(void);
|
2015-07-16 08:55:57 +00:00
|
|
|
extern void __init ti814x_clockdomains_init(void);
|
|
|
|
|
extern void __init ti816x_clockdomains_init(void);
|
2010-12-22 03:01:20 +00:00
|
|
|
extern void __init omap44xx_clockdomains_init(void);
|
2013-05-29 16:38:08 +00:00
|
|
|
extern void __init omap54xx_clockdomains_init(void);
|
2013-07-09 07:32:12 +00:00
|
|
|
extern void __init dra7xx_clockdomains_init(void);
|
2013-10-12 10:16:03 +00:00
|
|
|
void am43xx_clockdomains_init(void);
|
2013-01-26 07:58:17 +00:00
|
|
|
|
|
|
|
|
extern void clkdm_add_autodeps(struct clockdomain *clkdm);
|
|
|
|
|
extern void clkdm_del_autodeps(struct clockdomain *clkdm);
|
2010-12-22 03:01:20 +00:00
|
|
|
|
2011-02-25 23:06:47 +00:00
|
|
|
extern struct clkdm_ops omap2_clkdm_operations;
|
|
|
|
|
extern struct clkdm_ops omap3_clkdm_operations;
|
2011-02-25 23:06:47 +00:00
|
|
|
extern struct clkdm_ops omap4_clkdm_operations;
|
2012-06-18 06:47:27 +00:00
|
|
|
extern struct clkdm_ops am33xx_clkdm_operations;
|
2013-10-12 10:16:03 +00:00
|
|
|
extern struct clkdm_ops am43xx_clkdm_operations;
|
2010-12-22 03:01:20 +00:00
|
|
|
|
2011-09-14 22:01:21 +00:00
|
|
|
extern struct clkdm_dep gfx_24xx_wkdeps[];
|
|
|
|
|
extern struct clkdm_dep dsp_24xx_wkdeps[];
|
|
|
|
|
extern struct clockdomain wkup_common_clkdm;
|
|
|
|
|
|
2008-08-19 08:08:43 +00:00
|
|
|
#endif
|
