2020-11-20 09:02:32 +00:00
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// SPDX-License-Identifier: GPL-2.0
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/* Copyright (c) 2019 HiSilicon Limited. */
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#include <linux/acpi.h>
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2020-11-20 09:02:33 +00:00
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#include <linux/crypto.h>
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2020-11-20 09:02:32 +00:00
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#include <linux/err.h>
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#include <linux/hw_random.h>
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#include <linux/io.h>
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#include <linux/iopoll.h>
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#include <linux/kernel.h>
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2020-11-20 09:02:33 +00:00
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#include <linux/list.h>
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2020-11-20 09:02:32 +00:00
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#include <linux/module.h>
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2020-11-20 09:02:33 +00:00
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#include <linux/mutex.h>
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2020-11-20 09:02:32 +00:00
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#include <linux/platform_device.h>
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#include <linux/random.h>
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2020-11-20 09:02:33 +00:00
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#include <crypto/internal/rng.h>
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2020-11-20 09:02:32 +00:00
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#define HISI_TRNG_REG 0x00F0
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#define HISI_TRNG_BYTES 4
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#define HISI_TRNG_QUALITY 512
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2021-04-07 09:44:33 +00:00
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#define HISI_TRNG_VERSION 0x01B8
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#define HISI_TRNG_VER_V1 GENMASK(31, 0)
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2020-11-20 09:02:32 +00:00
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#define SLEEP_US 10
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#define TIMEOUT_US 10000
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2020-11-20 09:02:33 +00:00
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#define SW_DRBG_NUM_SHIFT 2
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#define SW_DRBG_KEY_BASE 0x082C
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#define SW_DRBG_SEED(n) (SW_DRBG_KEY_BASE - ((n) << SW_DRBG_NUM_SHIFT))
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#define SW_DRBG_SEED_REGS_NUM 12
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#define SW_DRBG_SEED_SIZE 48
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#define SW_DRBG_BLOCKS 0x0830
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#define SW_DRBG_INIT 0x0834
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#define SW_DRBG_GEN 0x083c
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#define SW_DRBG_STATUS 0x0840
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#define SW_DRBG_BLOCKS_NUM 4095
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#define SW_DRBG_DATA_BASE 0x0850
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#define SW_DRBG_DATA_NUM 4
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#define SW_DRBG_DATA(n) (SW_DRBG_DATA_BASE - ((n) << SW_DRBG_NUM_SHIFT))
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#define SW_DRBG_BYTES 16
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#define SW_DRBG_ENABLE_SHIFT 12
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#define SEED_SHIFT_24 24
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#define SEED_SHIFT_16 16
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#define SEED_SHIFT_8 8
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struct hisi_trng_list {
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struct mutex lock;
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struct list_head list;
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bool is_init;
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};
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2020-11-20 09:02:32 +00:00
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struct hisi_trng {
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void __iomem *base;
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2020-11-20 09:02:33 +00:00
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struct hisi_trng_list *trng_list;
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struct list_head list;
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2020-11-20 09:02:32 +00:00
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struct hwrng rng;
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2021-04-07 09:44:33 +00:00
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u32 ver;
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2020-11-20 09:02:33 +00:00
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bool is_used;
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struct mutex mutex;
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};
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struct hisi_trng_ctx {
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struct hisi_trng *trng;
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2020-11-20 09:02:32 +00:00
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};
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2020-11-20 09:02:33 +00:00
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static atomic_t trng_active_devs;
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static struct hisi_trng_list trng_devices;
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static void hisi_trng_set_seed(struct hisi_trng *trng, const u8 *seed)
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{
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u32 val, seed_reg, i;
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for (i = 0; i < SW_DRBG_SEED_SIZE;
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i += SW_DRBG_SEED_SIZE / SW_DRBG_SEED_REGS_NUM) {
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val = seed[i] << SEED_SHIFT_24;
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val |= seed[i + 1UL] << SEED_SHIFT_16;
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val |= seed[i + 2UL] << SEED_SHIFT_8;
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val |= seed[i + 3UL];
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seed_reg = (i >> SW_DRBG_NUM_SHIFT) % SW_DRBG_SEED_REGS_NUM;
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writel(val, trng->base + SW_DRBG_SEED(seed_reg));
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}
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}
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static int hisi_trng_seed(struct crypto_rng *tfm, const u8 *seed,
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unsigned int slen)
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{
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struct hisi_trng_ctx *ctx = crypto_rng_ctx(tfm);
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struct hisi_trng *trng = ctx->trng;
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u32 val = 0;
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int ret = 0;
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if (slen < SW_DRBG_SEED_SIZE) {
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pr_err("slen(%u) is not matched with trng(%d)\n", slen,
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SW_DRBG_SEED_SIZE);
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return -EINVAL;
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}
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writel(0x0, trng->base + SW_DRBG_BLOCKS);
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hisi_trng_set_seed(trng, seed);
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writel(SW_DRBG_BLOCKS_NUM | (0x1 << SW_DRBG_ENABLE_SHIFT),
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trng->base + SW_DRBG_BLOCKS);
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writel(0x1, trng->base + SW_DRBG_INIT);
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ret = readl_relaxed_poll_timeout(trng->base + SW_DRBG_STATUS,
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val, val & BIT(0), SLEEP_US, TIMEOUT_US);
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if (ret)
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pr_err("fail to init trng(%d)\n", ret);
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return ret;
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}
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static int hisi_trng_generate(struct crypto_rng *tfm, const u8 *src,
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unsigned int slen, u8 *dstn, unsigned int dlen)
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{
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struct hisi_trng_ctx *ctx = crypto_rng_ctx(tfm);
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struct hisi_trng *trng = ctx->trng;
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u32 data[SW_DRBG_DATA_NUM];
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u32 currsize = 0;
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u32 val = 0;
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int ret;
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u32 i;
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if (dlen > SW_DRBG_BLOCKS_NUM * SW_DRBG_BYTES || dlen == 0) {
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pr_err("dlen(%d) exceeds limit(%d)!\n", dlen,
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SW_DRBG_BLOCKS_NUM * SW_DRBG_BYTES);
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return -EINVAL;
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}
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do {
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ret = readl_relaxed_poll_timeout(trng->base + SW_DRBG_STATUS,
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val, val & BIT(1), SLEEP_US, TIMEOUT_US);
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if (ret) {
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pr_err("fail to generate random number(%d)!\n", ret);
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break;
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}
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for (i = 0; i < SW_DRBG_DATA_NUM; i++)
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data[i] = readl(trng->base + SW_DRBG_DATA(i));
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if (dlen - currsize >= SW_DRBG_BYTES) {
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memcpy(dstn + currsize, data, SW_DRBG_BYTES);
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currsize += SW_DRBG_BYTES;
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} else {
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memcpy(dstn + currsize, data, dlen - currsize);
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currsize = dlen;
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}
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writel(0x1, trng->base + SW_DRBG_GEN);
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} while (currsize < dlen);
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return ret;
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}
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static int hisi_trng_init(struct crypto_tfm *tfm)
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{
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struct hisi_trng_ctx *ctx = crypto_tfm_ctx(tfm);
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struct hisi_trng *trng;
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int ret = -EBUSY;
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mutex_lock(&trng_devices.lock);
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list_for_each_entry(trng, &trng_devices.list, list) {
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if (!trng->is_used) {
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trng->is_used = true;
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ctx->trng = trng;
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ret = 0;
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break;
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}
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}
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mutex_unlock(&trng_devices.lock);
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return ret;
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}
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static void hisi_trng_exit(struct crypto_tfm *tfm)
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{
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struct hisi_trng_ctx *ctx = crypto_tfm_ctx(tfm);
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mutex_lock(&trng_devices.lock);
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ctx->trng->is_used = false;
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mutex_unlock(&trng_devices.lock);
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}
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2020-11-20 09:02:32 +00:00
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static int hisi_trng_read(struct hwrng *rng, void *buf, size_t max, bool wait)
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{
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struct hisi_trng *trng;
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int currsize = 0;
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u32 val = 0;
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2022-06-09 11:18:19 +00:00
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int ret;
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2020-11-20 09:02:32 +00:00
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trng = container_of(rng, struct hisi_trng, rng);
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do {
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ret = readl_poll_timeout(trng->base + HISI_TRNG_REG, val,
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val, SLEEP_US, TIMEOUT_US);
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if (ret)
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return currsize;
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if (max - currsize >= HISI_TRNG_BYTES) {
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memcpy(buf + currsize, &val, HISI_TRNG_BYTES);
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currsize += HISI_TRNG_BYTES;
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if (currsize == max)
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return currsize;
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continue;
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}
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/* copy remaining bytes */
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memcpy(buf + currsize, &val, max - currsize);
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currsize = max;
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} while (currsize < max);
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return currsize;
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}
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2020-11-20 09:02:33 +00:00
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static struct rng_alg hisi_trng_alg = {
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.generate = hisi_trng_generate,
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.seed = hisi_trng_seed,
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.seedsize = SW_DRBG_SEED_SIZE,
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.base = {
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.cra_name = "stdrng",
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.cra_driver_name = "hisi_stdrng",
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.cra_priority = 300,
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.cra_ctxsize = sizeof(struct hisi_trng_ctx),
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.cra_module = THIS_MODULE,
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.cra_init = hisi_trng_init,
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.cra_exit = hisi_trng_exit,
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},
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};
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static void hisi_trng_add_to_list(struct hisi_trng *trng)
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{
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mutex_lock(&trng_devices.lock);
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list_add_tail(&trng->list, &trng_devices.list);
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mutex_unlock(&trng_devices.lock);
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}
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static int hisi_trng_del_from_list(struct hisi_trng *trng)
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{
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int ret = -EBUSY;
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mutex_lock(&trng_devices.lock);
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if (!trng->is_used) {
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list_del(&trng->list);
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ret = 0;
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}
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mutex_unlock(&trng_devices.lock);
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return ret;
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}
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2020-11-20 09:02:32 +00:00
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static int hisi_trng_probe(struct platform_device *pdev)
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{
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struct hisi_trng *trng;
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int ret;
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trng = devm_kzalloc(&pdev->dev, sizeof(*trng), GFP_KERNEL);
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if (!trng)
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return -ENOMEM;
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2020-11-20 09:02:33 +00:00
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platform_set_drvdata(pdev, trng);
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2020-11-20 09:02:32 +00:00
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trng->base = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(trng->base))
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return PTR_ERR(trng->base);
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2020-11-20 09:02:33 +00:00
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trng->is_used = false;
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2021-04-07 09:44:33 +00:00
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trng->ver = readl(trng->base + HISI_TRNG_VERSION);
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2020-11-20 09:02:33 +00:00
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if (!trng_devices.is_init) {
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INIT_LIST_HEAD(&trng_devices.list);
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mutex_init(&trng_devices.lock);
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trng_devices.is_init = true;
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}
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hisi_trng_add_to_list(trng);
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2021-04-07 09:44:33 +00:00
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if (trng->ver != HISI_TRNG_VER_V1 &&
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atomic_inc_return(&trng_active_devs) == 1) {
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2020-11-20 09:02:33 +00:00
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ret = crypto_register_rng(&hisi_trng_alg);
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if (ret) {
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dev_err(&pdev->dev,
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"failed to register crypto(%d)\n", ret);
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2020-12-01 06:50:18 +00:00
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atomic_dec_return(&trng_active_devs);
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2020-11-20 09:02:33 +00:00
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goto err_remove_from_list;
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}
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}
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2020-11-20 09:02:32 +00:00
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trng->rng.name = pdev->name;
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trng->rng.read = hisi_trng_read;
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trng->rng.quality = HISI_TRNG_QUALITY;
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ret = devm_hwrng_register(&pdev->dev, &trng->rng);
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2020-11-20 09:02:33 +00:00
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if (ret) {
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dev_err(&pdev->dev, "failed to register hwrng: %d!\n", ret);
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goto err_crypto_unregister;
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}
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2020-11-20 09:02:32 +00:00
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return ret;
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2020-11-20 09:02:33 +00:00
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err_crypto_unregister:
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2021-04-07 09:44:33 +00:00
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if (trng->ver != HISI_TRNG_VER_V1 &&
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atomic_dec_return(&trng_active_devs) == 0)
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2020-11-20 09:02:33 +00:00
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crypto_unregister_rng(&hisi_trng_alg);
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err_remove_from_list:
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hisi_trng_del_from_list(trng);
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return ret;
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}
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2023-10-20 07:55:41 +00:00
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static void hisi_trng_remove(struct platform_device *pdev)
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2020-11-20 09:02:33 +00:00
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{
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struct hisi_trng *trng = platform_get_drvdata(pdev);
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/* Wait until the task is finished */
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while (hisi_trng_del_from_list(trng))
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;
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2021-04-07 09:44:33 +00:00
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if (trng->ver != HISI_TRNG_VER_V1 &&
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atomic_dec_return(&trng_active_devs) == 0)
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2020-11-20 09:02:33 +00:00
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crypto_unregister_rng(&hisi_trng_alg);
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2020-11-20 09:02:32 +00:00
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}
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static const struct acpi_device_id hisi_trng_acpi_match[] = {
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{ "HISI02B3", 0 },
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{ }
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};
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MODULE_DEVICE_TABLE(acpi, hisi_trng_acpi_match);
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static struct platform_driver hisi_trng_driver = {
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.probe = hisi_trng_probe,
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2023-10-20 07:55:41 +00:00
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.remove_new = hisi_trng_remove,
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2020-11-20 09:02:32 +00:00
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.driver = {
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.name = "hisi-trng-v2",
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.acpi_match_table = ACPI_PTR(hisi_trng_acpi_match),
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},
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};
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module_platform_driver(hisi_trng_driver);
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MODULE_LICENSE("GPL v2");
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MODULE_AUTHOR("Weili Qian <qianweili@huawei.com>");
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MODULE_AUTHOR("Zaibo Xu <xuzaibo@huawei.com>");
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MODULE_DESCRIPTION("HiSilicon true random number generator V2 driver");
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