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75 lines
1.7 KiB
YAML
75 lines
1.7 KiB
YAML
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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# Copyright (C) 2021 Texas Instruments Incorporated - http://www.ti.com/
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/pci/ti,am65-pci-ep.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: TI AM65 PCI Endpoint
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maintainers:
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- Kishon Vijay Abraham I <kishon@ti.com>
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allOf:
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- $ref: pci-ep.yaml#
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properties:
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compatible:
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enum:
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- ti,am654-pcie-ep
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reg:
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maxItems: 4
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reg-names:
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items:
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- const: app
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- const: dbics
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- const: addr_space
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- const: atu
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power-domains:
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maxItems: 1
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ti,syscon-pcie-mode:
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description: Phandle to the SYSCON entry required for configuring PCIe in RC or EP mode.
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$ref: /schemas/types.yaml#/definitions/phandle
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interrupts:
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minItems: 1
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dma-coherent: true
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required:
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- compatible
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- reg
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- reg-names
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- max-link-speed
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- power-domains
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- ti,syscon-pcie-mode
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- dma-coherent
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/soc/ti,sci_pm_domain.h>
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pcie0_ep: pcie-ep@5500000 {
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compatible = "ti,am654-pcie-ep";
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reg = <0x5500000 0x1000>,
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<0x5501000 0x1000>,
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<0x10000000 0x8000000>,
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<0x5506000 0x1000>;
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reg-names = "app", "dbics", "addr_space", "atu";
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power-domains = <&k3_pds 120 TI_SCI_PD_EXCLUSIVE>;
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ti,syscon-pcie-mode = <&pcie0_mode>;
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num-ib-windows = <16>;
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num-ob-windows = <16>;
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max-link-speed = <2>;
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dma-coherent;
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interrupts = <GIC_SPI 340 IRQ_TYPE_EDGE_RISING>;
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};
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